Now there are 2 mode for downscale thumbnail frame buffer
1.MPP_FRAME_THUMBNAIL_MIXED (already use on RK3528 box):
Each buffer contains original output frame and 2x2 downscale
small frame, small image's buffer offset will be set in frame
meta info;
2.MPP_FRAME_THUMBNAIL_ONLY (newly added for rk3576 8K video):
for rk3576: vop & gpu does not support 8K frame,
in this case, mpp use 4K downscale buffer as decoder output
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I3acf9486a657fa3e999ca16140f40b2a01ebcaf4
Flip disable_fast_play to enable_fast_play,
Fast play is disabled by default.
Change-Id: I168e02a9d84590c3b2b92fe75b2b37c655c8c63e
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
When the poc of the idr frame is 0, the subsequent frames with poc<0 are
discarded, which will cause the screen to flicker.
Add parameters in mpp as switches for immediate output of idr frames.
Change-Id: I522334dd1e81fc6aeeb60e71404f3a7071a5ecae
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
1. Move mpp_start / mpp_stop function to control command.
2. Add pause / resume control command.
Change-Id: I525668a2831eb8f23e12fbd7c1cb29c11fdcc868
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Add MppEncRefCfg for reference frame relationship configure.
MppEncRefCfg is for user to setup its own gop reference hierarchy.
Setup flow:
mpp_enc_ref_cfg_get_preset (can be ommitted, helper for setup lt/st cfg)
mpp_enc_ref_cfg_init
mpp_enc_ref_cfg_set_cfg_cnt
mpp_enc_ref_cfg_add_lt_cfg (can be omitted)
mpp_enc_ref_cfg_add_st_cfg
mpp_enc_ref_cfg_check (IMPORTANT: need to check before contol to mpp)
control to mpp
mpp_enc_ref_cfg_deinit
Change-Id: Ia0f5c4c713a4b11d8e4e5581609f8501f36549cc
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
We are going to use new configure method for all encoders.
Change-Id: Id478d2567714ee9c6ddee3d410a4a855825f1c42
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
1. Update OSD palette config API. User must specify palette is default
or user defined.
2. OSD palette config will go through control and OSD data (region)
config will go through meta data in each frame.
3. Remove unused code.
4. Add mpi_enc_utils for mpi_enc_test cases
Change-Id: Ib4aeb60789a3e999446212841508e604533efb3c
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
1. Default output mode is output header only on config changed.
2. Add new mode to output header on each intra frame.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Iea8dd1e6bb377318b88300d6a013f2c736b15afc
User can define its own rate control stategy function and can use them
in MPP encoder flow.
Change-Id: I9573ab8cb5a63c543e17faf07e89f64f5d7013ef
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Add encoder misc config for later extension.
Change-Id: Ie67b2d5e74227e5089b16752d8088a9502142ddd
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
1. rk_mpi_cmd.h will contain cmd value only.
2. rk_venc_cmd.h will contain all the encoder command structure.
3. Move MppCtxType and MppCodingType to rk_type.h for better include
dependency.
4. Add MppEncRefCfg to MppEncCfgSet.
5. Remove rk_mpi.h dependency inside mpp.
Change-Id: I6b972738100fb60c0a6a9b7cfe0a012abf4205b7
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Use MppPollType as block control MPP_SET_INPUT_TIMEOUT and
MPP_SET_OUTPUT_TIMEOUT 's parameter.
Deprecate old block/block_timeout control.
Next step is to change MppPollType to RK_S64 for compatible in different
platform.
Change-Id: I02974f0b8eeb23ff43687448d6c3271ea7dd0a2c
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
1. Unify the hal thread output process to mpp_dec_put_frame
2. Add vproc path for field source.
3. Reserve one more buffer when deinterlace is enabled.
4. Default enable for normal mpp path but disable on vpuapi path for the
reason that rk_ffplayer has done deinterlace process internally.
Change-Id: I02e7cece844fde01c2d249dafe6f7ce6a325593f
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
tips: this command is used to set decoded frame immediate out,
whehter is in display order or not.
Change-Id: I0b6b2c34fde722fe724019118c7af142b4b2e6f1
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
tips: the timestamp in slice header is not useful, except for
calculate increment of dispaly frame. so, it cannot use to
dispaly, and remove it.
Change-Id: I748d553d40c4736e2f5ef98d8a8519fcc5e533e0
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
tips: when input timestamp has not pts, and set pts=dts,
it should use input timestamp order for output.
Change-Id: I8b3ef9a8d150e5729a3fa94df6c1b448edb8f1fd
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
1. Disable error default is not set for normal error detection.
2. On special case like drone streaming the user prefers to ignore
all error and continue decoding. Then disable error flag will be set
to fullfill this requirement.
3. When disable error flag is set H.264/H.265 decoding will ignore
hardware error and mark all output frame as no error.
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
Change-Id: I8fd619511c53ee744ae973ab3fe015565106dd37
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
Allocate buffers before encoding so that we can save
some time when encoding first frame.
Change-Id: I02d67347313e2050896b545b861bc5fa0bba495d
Signed-off-by: timkingh.huang <timkingh.huang@rock-chips.com>
When retrieving frames current API only allows to define wether
the API should block without any timeout or not block at all.
This allows to specify a block timeout via the
MPP_SET_OUTPUT_BLOCK_TIMEOUT control operation.
Change-Id: Id35ad3d48f72881184009f830c406c3a655e1a90
Signed-off-by: LongChair <LongChair@hotmail.com>
Signed-off-by: Randy Li <randy.li@rock-chips.com>
1. Interface change:
Separate normal config into three basic config and several runtime config:
Three basic config -
a. rate control config
b. preprocess config
c. video codec protocol config
More flexible rate control interfaces are provided.
More codec configure interfaces are provided.
Change flag with bitmap is provided for further optimization.
2. Remove old codec config from controller and left rate control module only
Encoder controller only handle user rate control requirement and bit allocation.
Hal hardware encoder only handle qp calculation according given target bit.
Remove all old codec code.
3. Move codec process to hal
Different hardware will share same codec process function in common protocol
directory. And different hardware api will register to same api set. Codec
header generation is moved to separate hal directory.
4. Encoder will return length by task
Encoder will NOT get stream information feedback from controller. All
information required by encoder will be all stored in Task.
5. Add mpp_rc for rate control
Move some common rate control utils to mpp_base.
6. Update mpi_enc_test and mpi_rc_test with new interface
Change-Id: Iebb5e276a48f547167e1bed4673f21cc2f0c8ad5
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Signed-off-by: Lin Kesheng <lks@rock-chips.com>
1. cfg sharpen parameters
export h264e_hal_debug=0x8001, to open log
export h264e_hal_debug=0x1, to close log
Change-Id: I97322f9819cfbb6909b86afc25f84bacac9841af
Signed-off-by: Lin Kesheng <lks@rock-chips.com>
1. add SEI writting interface
2. write extra_info_cfg and rc_cfg to SEI
3. stream_get_pos use s->buf_plus8 rather than s->p_start
Change-Id: I71de4d6f5dc31f21c0a32dc5ded275ced260d861
Signed-off-by: Lin Kesheng <lks@rock-chips.com>
1. add description for OSD cmd in rk_mpi_cmd.h
2. judge if input MppBuffer for OSD is NULL
Change-Id: I6d674c81790d9cf57acdfa23f20c929b56f263e9
Signed-off-by: Lin Kesheng <lks@rock-chips.com>
1. add osd control interface
2. remove h264e_hal_rkv_coveragetest_cfg.osd
3. add h264e_hal_test & mpi_enc_test for osd
4. use tool to format code
Change-Id: Iadb3453d8e6976e5f718253f762d144864419e94
Signed-off-by: Lin Kesheng <lks@rock-chips.com>
1. Separate encoder configure to four parts
2. Add Preprocess / OSD / Extra configs
3. Implement mv_info interface
Change-Id: I2350a25c9f40b199cee8ef6c75ac6ca099f143c4
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Signed-off-by: Lin Kesheng <lks@rock-chips.com>
