[h265e]: add h265 encoder code

Change-Id: I08350dc76d3040bc1a16a3d8234f836f5fbf69d0
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
This commit is contained in:
Ding Wei
2018-09-13 15:47:08 +08:00
committed by Herman Chen
parent 4553fac11e
commit 3e5ad4fed3
26 changed files with 4968 additions and 4 deletions

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@@ -131,6 +131,7 @@ typedef enum {
MPP_ENC_PRE_ALLOC_BUFF, /* allocate buffers before encoding */
MPP_ENC_SET_QP_RANGE, /* used for adjusting qp range, the parameter can be 1 or 2 */
MPP_ENC_SET_ROI_CFG, /* set MppEncROICfg structure */
MPP_ENC_SET_CTU_QP, /* for H265 Encoder,set CTU's size and QP */
MPP_ENC_CMD_END,
MPP_ISP_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ISP,
@@ -811,6 +812,77 @@ typedef struct MppEncH264Cfg_t {
MppEncH264RefCfg ref;
} MppEncH264Cfg;
#define H265E_MAX_ROI_NUMBER 64
typedef struct H265eRect_t {
RK_S32 left;
RK_S32 right;
RK_S32 top;
RK_S32 bottom;
} H265eRect;
typedef struct H265eRoi_Region_t {
RK_U8 level;
H265eRect rect;
} H265eRoiRegion;
/*
* roi region only can be setting when rc_enable = 1
*/
typedef struct MppEncH265RoiCfg_t {
/*
* the value is defined by H265eCtuMethod
*/
RK_U8 method;
/*
* the number of roi,the value must less than H265E_MAX_ROI_NUMBER
*/
RK_S32 num;
/* delat qp using in roi region*/
RK_U32 delta_qp;
/* roi region */
H265eRoiRegion region[H265E_MAX_ROI_NUMBER];
} MppEncH265RoiCfg;
typedef struct H265eCtuQp_t {
/* the qp value using in ctu region */
RK_U32 qp;
/*
* define the ctu region
* method = H265E_METHOD_CUT_SIZE, the value of rect is in ctu size
* method = H264E_METHOD_COORDINATE,the value of rect is in coordinates
*/
H265eRect rect;
} H265eCtu;
typedef struct H265eCtuRegion_t {
/*
* the value is defined by H265eCtuMethod
*/
RK_U8 method;
/*
* the number of ctu,the value must less than H265E_MAX_ROI_NUMBER
*/
RK_S32 num;
/* ctu region */
H265eCtu ctu[H265E_MAX_ROI_NUMBER];
} MppEncH265CtuCfg;
/*
* define the method when set CTU/ROI parameters
* this value is using by method in H265eCtuRegion or H265eRoi struct
*/
typedef enum {
H265E_METHOD_CTU_SIZE,
H264E_METHOD_COORDINATE,
} H265eCtuMethod;
/*
* H.265 configurable parameter
*/
@@ -827,6 +899,23 @@ typedef struct MppEncH265SeiCfg_t {
RK_U32 change;
} MppEncH265SeiCfg;
typedef enum MppEncH265CfgChange_e {
/* change on stream type */
MPP_ENC_H265_CFG_PROFILE_LEVEL_TILER_CHANGE = (1 << 0),
MPP_ENC_H265_CFG_INTRA_QP_CHANGE = (1 << 1),
MPP_ENC_H265_CFG_FRAME_RATE_CHANGE = (1 << 2),
MPP_ENC_H265_CFG_BITRATE_CHANGE = (1 << 3),
MPP_ENC_H265_CFG_GOP_SIZE = (1 << 4),
MPP_ENC_H265_CFG_RC_QP_CHANGE = (1 << 5),
MPP_ENC_H265_CFG_INTRA_REFRESH_CHANGE = (1 << 6),
MPP_ENC_H265_CFG_INDEPEND_SLICE_CHANGE = (1 << 7),
MPP_ENC_H265_CFG_DEPEND_SLICE_CHANGE = (1 << 8),
MPP_ENC_H265_CFG_CTU_CHANGE = (1 << 9),
MPP_ENC_H265_CFG_ROI_CHANGE = (1 << 10),
MPP_ENC_H265_CFG_CHANGE_ALL = (0xFFFFFFFF),
} MppEncH265CfgChange;
typedef struct MppEncH265Cfg_t {
RK_U32 change;
@@ -845,6 +934,8 @@ typedef struct MppEncH265Cfg_t {
RK_S32 max_qp;
RK_S32 min_qp;
RK_S32 max_delta_qp;
RK_S32 intra_qp;
RK_S32 gop_delta_qp;
/* intra fresh config */
RK_S32 intra_refresh_mode;
@@ -859,6 +950,9 @@ typedef struct MppEncH265Cfg_t {
/* extra info */
MppEncH265VuiCfg vui;
MppEncH265SeiCfg sei;
MppEncH265CtuCfg ctu;
MppEncH265RoiCfg roi;
} MppEncH265Cfg;
/*

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@@ -50,6 +50,7 @@ typedef enum {
VPU_DEC_RKV = 0x5,
VPU_ENC_RKV = 0x6,
VPU_DEC_AVS = 0x7,
VPU_ENC_H265E = 0x8,
VPU_TYPE_BUTT ,
} VPU_CLIENT_TYPE;

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@@ -92,7 +92,14 @@ typedef enum VPU_API_CMD {
VPU_API_GET_FRAME_INFO,
VPU_API_SET_OUTPUT_BLOCK,
VPU_API_GET_EOS_STATUS,
VPU_API_SET_IMMEDIATE_OUT = 0x1000,
VPU_API_ENC_VEPU22_START = 0x2000,
VPU_API_ENC_SET_VEPU22_CFG,
VPU_API_ENC_GET_VEPU22_CFG,
VPU_API_ENC_SET_VEPU22_CTU_QP,
VPU_API_ENC_SET_VEPU22_ROI,
} VPU_API_CMD;
typedef struct {

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@@ -30,6 +30,7 @@ target_link_libraries(mpp_codec
${CODEC_JPEGD}
${CODEC_H264E}
${CODEC_JPEGE}
${CODEC_H265E}
codec_dummy_enc
codec_dummy_dec
mpp_vproc

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@@ -10,3 +10,7 @@ if(HAVE_JPEGE)
add_subdirectory(jpeg)
endif()
if(HAVE_H265E)
add_subdirectory(h265)
endif()

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@@ -0,0 +1,9 @@
# vim: syntax=cmake
include_directories(.)
add_library(${CODEC_H265E} STATIC
h265e_api.c
)
target_link_libraries(${CODEC_H265E} mpp_base)
set_target_properties(${CODEC_H265E} PROPERTIES FOLDER "mpp/codec")

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@@ -0,0 +1,212 @@
/*
* Copyright 2015 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define MODULE_TAG "h265e_api"
#include <string.h>
#include "mpp_err.h"
#include "mpp_log.h"
#include "mpp_env.h"
#include "mpp_common.h"
#include "h265e_api.h"
#include "h265e_syntax.h"
#define H265E_DBG_FUNCTION (0x00000001)
#define H265E_DBG_INPUT (0x00000010)
#define H265E_DBG_OUTPUT (0x00000020)
RK_U32 h265e_debug = 0;
#define h265e_dbg(flag, fmt, ...) _mpp_dbg(h265e_debug, flag, fmt, ## __VA_ARGS__)
#define h265e_dbg_f(flag, fmt, ...) _mpp_dbg_f(h265e_debug, flag, fmt, ## __VA_ARGS__)
#define h265e_dbg_func(fmt, ...) h265e_dbg_f(H265E_DBG_FUNCTION, fmt, ## __VA_ARGS__)
#define h265e_dbg_input(fmt, ...) h265e_dbg(H265E_DBG_INPUT, fmt, ## __VA_ARGS__)
#define h265e_dbg_output(fmt, ...) h265e_dbg(H265E_DBG_OUTPUT, fmt, ## __VA_ARGS__)
#define H265E_BIG_ENDIAN 1
#define H265E_LITTLE_ENDIAN 0
typedef struct {
MppEncCfgSet *cfg;
MppEncCfgSet *set;
H265eSyntax syntax;
H265eFeedback feedback;
} H265eCtx;
MPP_RET h265e_init(void *ctx, ControllerCfg *ctrlCfg)
{
H265eCtx *p = (H265eCtx *)ctx;
MppEncCodecCfg *codec = NULL;
if (p == NULL) {
mpp_err_f("error: p == NULL");
return MPP_NOK;
}
mpp_assert(ctrlCfg->coding = MPP_VIDEO_CodingHEVC);
p->cfg = ctrlCfg->cfg;
p->set = ctrlCfg->set;
mpp_env_get_u32("h265e_debug", &h265e_debug, 0);
h265e_dbg_func("enter ctx %p\n", ctx);
memset(&p->syntax, 0, sizeof(p->syntax));
ctrlCfg->task_count = 1;
/* set defualt value of codec */
codec = &p->cfg->codec;
codec->h265.intra_qp = 26;
codec->h265.max_qp = 51;
codec->h265.min_qp = 10;
codec->h265.max_delta_qp = 10;
codec->h265.const_intra_pred = 0;
codec->h265.sao_enable = 1;
codec->h265.gop_delta_qp = 0;
codec->h265.intra_refresh_mode = 0;
codec->h265.intra_refresh_arg = 0;
codec->h265.independ_slice_mode = 0;
codec->h265.independ_slice_arg = 0;
codec->h265.depend_slice_mode = 0;
codec->h265.depend_slice_arg = 0;
h265e_dbg_func("leave ctx %p\n", ctx);
(void)ctx;
(void)ctrlCfg;
return MPP_OK;
}
MPP_RET h265e_deinit(void *ctx)
{
H265eCtx *p = (H265eCtx *)ctx;
if (p == NULL) {
mpp_err_f("error: p == NULL");
return MPP_NOK;
}
h265e_dbg_func("enter ctx %p\n", ctx);
h265e_dbg_func("leave ctx %p\n", ctx);
(void)ctx;
return MPP_OK;
}
MPP_RET h265e_encode(void *ctx, HalEncTask *task)
{
H265eCtx *p = (H265eCtx *)ctx;
H265eSyntax* syntax = NULL;
if (p == NULL) {
mpp_err_f("error: p == NULL");
return MPP_NOK;
}
h265e_dbg_func("enter ctx %p\n", ctx);
syntax = &p->syntax;
task->valid = 1;
// syntax->eos = task->eos;
task->syntax.data = syntax;
h265e_dbg_func("leave ctx %p\n", ctx);
(void)ctx;
(void)task;
return MPP_OK;
}
MPP_RET h265e_reset(void *ctx)
{
H265eCtx *p = (H265eCtx *)ctx;
if (p == NULL) {
mpp_err_f("error: p == NULL");
return MPP_NOK;
}
h265e_dbg_func("enter ctx %p\n", ctx);
h265e_dbg_func("leave ctx %p\n", ctx);
(void)ctx;
return MPP_OK;
}
MPP_RET h265e_flush(void *ctx)
{
H265eCtx *p = (H265eCtx *)ctx;
if (p == NULL) {
mpp_err_f("error: p == NULL");
return MPP_NOK;
}
h265e_dbg_func("enter ctx %p\n", ctx);
h265e_dbg_func("leave ctx %p\n", ctx);
(void)ctx;
return MPP_OK;
}
MPP_RET h265e_config(void *ctx, RK_S32 cmd, void *param)
{
H265eCtx *p = (H265eCtx *)ctx;
MPP_RET ret = MPP_NOK;
(void)param;
h265e_dbg_func("enter ctx %p, cmd = %d\n", ctx, cmd);
switch (cmd) {
case SET_IDR_FRAME : {
p->syntax.idr_request++;
} break;
case MPP_ENC_SET_RC_CFG : {
ret = MPP_OK;
} break;
default:
mpp_err("No correspond cmd found, and can not config!");
ret = MPP_NOK;
break;
}
h265e_dbg_func("leave ctx %p\n", ctx);
return ret;
}
MPP_RET h265e_callback(void *ctx, void *feedback)
{
H265eCtx *p = (H265eCtx *)ctx;
H265eFeedback *result = NULL;
H265eFeedback *back = (H265eFeedback*)feedback;
if (p == NULL || feedback == NULL) {
mpp_err_f("error: p == NULL");
return MPP_NOK;
}
result = &p->feedback;
h265e_dbg_func("enter ctx %p\n", ctx);
memcpy(result, back, sizeof(H265eFeedback));
h265e_dbg_func("***********************h265 encoder result************************\n");
h265e_dbg_func("status size pic_cnt pic_type poc src_idx gop_idx avg_qp\n");
h265e_dbg_func("[%4d] [%6d] [%4d] [%4d] [%4d] [%4d] [%4d] [%4d]\n", result->status, result->bs_size,
result->enc_pic_cnt, result->pic_type, result->poc, result->src_idx, result->gop_idx, result->avg_ctu_qp);
h265e_dbg_func("******************************************************************\n");
h265e_dbg_func("leave ctx %p\n", ctx);
return MPP_OK;
}
const ControlApi api_h265e_controller = {
"h265e_control",
MPP_VIDEO_CodingHEVC,
sizeof(H265eCtx),
0,
h265e_init,
h265e_deinit,
h265e_encode,
h265e_reset,
h265e_flush,
h265e_config,
h265e_callback,
};

32
mpp/codec/inc/h265e_api.h Normal file
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@@ -0,0 +1,32 @@
/*
* Copyright 2015 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __H265E_API_H__
#define __H265E_API_H__
#include "encoder_codec_api.h"
#ifdef __cplusplus
extern "C" {
#endif
extern const ControlApi api_h265e_controller;
#ifdef __cplusplus
}
#endif
#endif /*__H265E_API_H__*/

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@@ -22,6 +22,7 @@
#include "h264e_api.h"
#include "jpege_api.h"
#include "h265e_api.h"
#include "mpp_controller.h"
/*
@@ -34,6 +35,9 @@ static const ControlApi *controllers[] = {
#if HAVE_JPEGE
&api_jpege_controller,
#endif
#if HAVE_H265E
&api_h265e_controller,
#endif
};
typedef struct ControllerImpl_t {

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@@ -479,6 +479,10 @@ MPP_RET mpp_enc_control(MppEnc *enc, MpiCmd cmd, void *param)
mpp_enc_dbg_ctrl("set qp range\n");
ret = mpp_hal_control(enc->hal, cmd, param);
} break;
case MPP_ENC_SET_CTU_QP: {
mpp_enc_dbg_ctrl("set ctu qp\n");
ret = mpp_hal_control(enc->hal, cmd, param);
} break;
default : {
mpp_log_f("unsupported cmd id %08x param %p\n", cmd, param);
ret = MPP_NOK;

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@@ -99,3 +99,12 @@ if( ENABLE_JPEGE )
set(HAL_JPEGE hal_jpege)
add_definitions(-DHAVE_JPEGE)
endif()
# h265 encoder
option(ENABLE_H265E "Enable h265 encoder" ON)
if( ENABLE_H265E )
set(HAVE_H265E true)
set(CODEC_H265E codec_h265e)
set(HAL_H265E hal_h265e)
add_definitions(-DHAVE_H265E)
endif()

38
mpp/common/h265e_syntax.h Normal file
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@@ -0,0 +1,38 @@
/*
* Copyright 2015 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __H265E_SYNTAX_H__
#define __H265E_SYNTAX_H__
#include "mpp_frame.h"
typedef struct H265eSyntax_t {
RK_S32 idr_request;
// RK_S32 eos;
} H265eSyntax;
typedef struct H265eFeedback_t {
RK_U32 bs_size;
RK_U32 enc_pic_cnt;
RK_U32 pic_type;
RK_U32 avg_ctu_qp;
RK_U32 gop_idx;
RK_U32 poc;
RK_U32 src_idx;
RK_U32 status;
} H265eFeedback;
#endif

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@@ -40,6 +40,7 @@ target_link_libraries(mpp_hal
${HAL_JPEGD}
${HAL_H264E}
${HAL_JPEGE}
${HAL_H265E}
hal_dummy
mpp_device
)

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@@ -0,0 +1,32 @@
/*
* Copyright 2015 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __HAL_H265E_API_H__
#define __HAL_H265E_API_H__
#include "mpp_hal.h"
#ifdef __cplusplus
extern "C" {
#endif
extern const MppHalApi hal_api_h265e;
#ifdef __cplusplus
}
#endif
#endif /*__HAL_H265E_API_H__*/

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@@ -35,6 +35,7 @@
#include "hal_mpg4d_api.h"
#include "hal_jpegd_api.h"
#include "hal_jpege_api.h"
#include "hal_h265e_api.h"
// for test and demo
#include "hal_dummy_dec_api.h"
@@ -76,6 +77,9 @@ static const MppHalApi *hw_apis[] = {
#endif
#if HAVE_JPEGE
&hal_api_jpege,
#endif
#if HAVE_H265E
&hal_api_h265e,
#endif
&hal_api_dummy_dec,
&hal_api_dummy_enc,

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@@ -1,2 +1,3 @@
# vim: syntax=cmake
add_subdirectory(h264e)
add_subdirectory(h265e)

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@@ -0,0 +1,14 @@
# vim: syntax=cmake
# hal h265e reg
set(HAL_H265E_SRC
hal_h265e_api.c
hal_h265e_vepu22.c
)
add_library(${HAL_H265E} STATIC
${HAL_H265E_SRC}
)
set_target_properties(${HAL_H265E} PROPERTIES FOLDER "mpp/hal")
target_link_libraries(${HAL_H265E} mpp_base)

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@@ -0,0 +1,136 @@
/*
* Copyright 2017 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define MODULE_TAG "hal_h265e_api"
#include <string.h>
#include "mpp_env.h"
#include "mpp_log.h"
#include "mpp_common.h"
#include "mpp_platform.h"
#include "hal_h265e_api.h"
#include "hal_h265e_base.h"
#include "hal_h265e_vepu22.h"
RK_U32 hal_h265e_debug = 0;
MPP_RET hal_h265e_init(void *hal, MppHalCfg *cfg)
{
MPP_RET ret = MPP_NOK;
MppHalApi *p_api = NULL;
HalH265eCtx* ctx = (HalH265eCtx*)hal;
if (ctx == NULL) {
mpp_err_f("error: ctx == NULL");
return MPP_NOK;
}
mpp_env_get_u32("hal_h265e_debug", &hal_h265e_debug, 0);
hal_h265e_dbg_func("enter hal\n", hal);
memset(ctx, 0, sizeof(HalH265eCtx));
p_api = &ctx->hal_api;
// NOTE: rk3036 and rk3228 do NOT have jpeg encoder
if (NULL == mpp_get_vcodec_dev_name(MPP_CTX_ENC, MPP_VIDEO_CodingHEVC)) {
mpp_err("SOC %s do NOT support h265 encoding\n", mpp_get_soc_name());
ret = MPP_ERR_INIT;
goto FAIL;
}
if (!(mpp_get_vcodec_type() & HAVE_H265ENC)) {
mpp_err("cannot find hardware.\n");
ret = MPP_ERR_INIT;
goto FAIL;
}
p_api->init = hal_h265e_vepu22_init;
p_api->deinit = hal_h265e_vepu22_deinit;
p_api->reg_gen = hal_h265e_vepu22_gen_regs;
p_api->start = hal_h265e_vepu22_start;
p_api->wait = hal_h265e_vepu22_wait;
p_api->reset = hal_h265e_vepu22_reset;
p_api->flush = hal_h265e_vepu22_flush;
p_api->control = hal_h265e_vepu22_control;
p_api->init(ctx, cfg);
hal_h265e_dbg_func("leave hal %p\n", hal);
return MPP_OK;
FAIL:
return ret;
}
MPP_RET hal_h265e_deinit(void *hal)
{
HalH265eCtx* ctx = (HalH265eCtx*)hal;
return ctx->hal_api.deinit(hal);
}
MPP_RET hal_h265e_gen_regs(void *hal, HalTaskInfo *task)
{
HalH265eCtx* ctx = (HalH265eCtx*)hal;
return ctx->hal_api.reg_gen(hal, task);
}
MPP_RET hal_h265e_start(void *hal, HalTaskInfo *task)
{
HalH265eCtx* ctx = (HalH265eCtx*)hal;
return ctx->hal_api.start(hal, task);
}
MPP_RET hal_h265e_wait(void *hal, HalTaskInfo *task)
{
HalH265eCtx* ctx = (HalH265eCtx*)hal;
return ctx->hal_api.wait(hal, task);
}
MPP_RET hal_h265e_reset(void *hal)
{
HalH265eCtx* ctx = (HalH265eCtx*)hal;
return ctx->hal_api.reset(hal);
}
MPP_RET hal_h265e_flush(void *hal)
{
HalH265eCtx* ctx = (HalH265eCtx*)hal;
return ctx->hal_api.flush(hal);
}
MPP_RET hal_h265e_control(void *hal, RK_S32 cmd_type, void *param)
{
HalH265eCtx* ctx = (HalH265eCtx*)hal;
return ctx->hal_api.control(hal, cmd_type, param);
}
const MppHalApi hal_api_h265e = {
"h265e_rkv",
MPP_CTX_ENC,
MPP_VIDEO_CodingHEVC,
sizeof(HalH265eCtx),
0,
hal_h265e_init,
hal_h265e_deinit,
hal_h265e_gen_regs,
hal_h265e_start,
hal_h265e_wait,
hal_h265e_reset,
hal_h265e_flush,
hal_h265e_control,
};

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@@ -0,0 +1,91 @@
/*
* Copyright 2017 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __HAL_H265E_BASE_H__
#define __HAL_H265E_BASE_H__
#include "mpp_env.h"
#include "mpp_log.h"
#include "mpp_common.h"
#include "mpp_device.h"
#include "mpp_hal.h"
extern RK_U32 hal_h265e_debug ;
#define HAL_H265E_DBG_FUNCTION (0x00010000)
#define HAL_H265E_DBG_INPUT (0x00020000)
#define HAL_H265E_DBG_OUTPUT (0x00040000)
#define HAL_H265E_DBG_WRITE_IN_STREAM (0x00080000)
#define HAL_H265E_DBG_WRITE_OUT_STREAM (0x00100000)
#define hal_h265e_dbg(flag, fmt, ...) _mpp_dbg(hal_h265e_debug, flag, fmt, ## __VA_ARGS__)
#define hal_h265e_dbg_f(flag, fmt, ...) _mpp_dbg_f(hal_h265e_debug, flag, fmt, ## __VA_ARGS__)
#define hal_h265e_dbg_func(fmt, ...) hal_h265e_dbg_f(HAL_H265E_DBG_FUNCTION, fmt, ## __VA_ARGS__)
#define hal_h265e_dbg_input(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_INPUT, fmt, ## __VA_ARGS__)
#define hal_h265e_dbg_output(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_OUTPUT, fmt, ## __VA_ARGS__)
typedef struct hal_h265e_ctx {
MppHalApi hal_api;
MppDevCtx dev_ctx;
MppBufferGroup buf_grp;
/*
* the ion buffer's fd of ROI map
* ROI map holds importance levels for CTUs within a picture. The memory size is the number of CTUs of picture in bytes.
* For example, if there are 64 CTUs within a picture, the size of ROI map is 64 bytes.
* All CTUs have their ROI importance level (0 ~ 8 ; 1 byte) in raster order.
* A CTU with a high ROI important level is encoded with a lower QP for higher quality.
* It should be given when hw_cfg.ctu.roi_enable is 1.
*/
MppBuffer roi;
/*
* Sthe ion buffer's fd of CTU qp map
* The memory size is the number of CTUs of picture in bytes.
* For example if there are 64 CTUs within a picture, the size of CTU map is 64 bytes.
* It should be given when hw_cfg.ctu.ctu_qp_enable is 1.
* The content of ctuQpMap directly is mapped to the Qp used to encode the CTU. I.e,
* if (ctuQpMap[k]==5], it means that CTU(k) is encoded with Qp=5.
*/
MppBuffer ctu;
void *en_info;
RK_U32 option;
RK_U32 user_cfg;
void *hw_cfg;
IOInterruptCB int_cb;
MppEncCfgSet *cfg;
MppEncCfgSet *set;
RK_U32 init;
/*
* write yuv data(only for debug)
*/
FILE* mInFile;
/*
* write bit stram data(only for debug)
*/
FILE* mOutFile;
} HalH265eCtx;
#endif

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@@ -0,0 +1,39 @@
/*
* Copyright 2017 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "rk_type.h"
#ifndef __HAL_H265E_VEPU22_H__
#define __HAL_H265E_VEPU22_H__
#ifdef __cplusplus
extern "C"
{
#endif
MPP_RET hal_h265e_vepu22_init (void *hal, MppHalCfg *cfg);
MPP_RET hal_h265e_vepu22_deinit (void *hal);
MPP_RET hal_h265e_vepu22_gen_regs(void *hal, HalTaskInfo *task);
MPP_RET hal_h265e_vepu22_start (void *hal, HalTaskInfo *task);
MPP_RET hal_h265e_vepu22_wait (void *hal, HalTaskInfo *task);
MPP_RET hal_h265e_vepu22_reset (void *hal);
MPP_RET hal_h265e_vepu22_flush (void *hal);
MPP_RET hal_h265e_vepu22_control (void *hal, RK_S32 cmd_type, void *param);
#ifdef __cplusplus
}
#endif
#endif

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@@ -102,7 +102,8 @@ static MPP_RET vpu_api_set_enc_cfg(MppCtx mpp_ctx, MppApi *mpi,
RK_S32 gop = (cfg->intraPicRate) ? (cfg->intraPicRate) : (fps_out);
RK_S32 qp_init = (coding == MPP_VIDEO_CodingAVC) ? (26) :
(coding == MPP_VIDEO_CodingMJPEG) ? (10) :
(coding == MPP_VIDEO_CodingVP8) ? (56) : (0);
(coding == MPP_VIDEO_CodingVP8) ? (56) :
(coding == MPP_VIDEO_CodingHEVC) ? (26) : (0);
RK_S32 qp = (cfg->qp) ? (cfg->qp) : (qp_init);
RK_S32 profile = cfg->profileIdc;
RK_S32 level = cfg->levelIdc;
@@ -198,8 +199,11 @@ static MPP_RET vpu_api_set_enc_cfg(MppCtx mpp_ctx, MppApi *mpi,
codec_cfg->jpeg.change = MPP_ENC_JPEG_CFG_CHANGE_QP;
codec_cfg->jpeg.quant = qp;
} break;
case MPP_VIDEO_CodingHEVC : {
codec_cfg->h265.change = MPP_ENC_H265_CFG_INTRA_QP_CHANGE;
codec_cfg->h265.intra_qp = qp;
} break;
case MPP_VIDEO_CodingVP8 :
case MPP_VIDEO_CodingHEVC :
default : {
mpp_err_f("support encoder coding type %d\n", coding);
} break;
@@ -1391,6 +1395,18 @@ RK_S32 VpuApiLegacy::control(VpuCodecContext *ctx, VPU_API_CMD cmd, void *param)
case VPU_API_SET_IMMEDIATE_OUT: {
mpicmd = MPP_DEC_SET_IMMEDIATE_OUT;
} break;
case VPU_API_ENC_SET_VEPU22_CFG: {
mpicmd = MPP_ENC_SET_CODEC_CFG;
} break;
case VPU_API_ENC_GET_VEPU22_CFG: {
mpicmd = MPP_ENC_GET_CODEC_CFG;
} break;
case VPU_API_ENC_SET_VEPU22_CTU_QP: {
mpicmd = MPP_ENC_SET_CTU_QP;
} break;
case VPU_API_ENC_SET_VEPU22_ROI: {
mpicmd = MPP_ENC_SET_ROI_CFG;
} break;
default: {
} break;
}

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@@ -71,6 +71,9 @@ static MppCodingTypeInfo support_list[] = {
#if HAVE_JPEGE
{ MPP_CTX_ENC, MPP_VIDEO_CodingMJPEG, "enc", "jpeg", },
#endif
#if HAVE_H265E
{ MPP_CTX_ENC, MPP_VIDEO_CodingHEVC, "enc", "h265", },
#endif
};
#define check_mpp_ctx(ctx) _check_mpp_ctx(ctx, __FUNCTION__)

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@@ -296,8 +296,12 @@ MPP_RET test_mpp_setup(MpiEncTestData *p)
codec_cfg->jpeg.change = MPP_ENC_JPEG_CFG_CHANGE_QP;
codec_cfg->jpeg.quant = 10;
} break;
case MPP_VIDEO_CodingVP8 :
case MPP_VIDEO_CodingHEVC :
case MPP_VIDEO_CodingVP8 : {
} break;
case MPP_VIDEO_CodingHEVC : {
codec_cfg->h265.change = MPP_ENC_H265_CFG_INTRA_QP_CHANGE;
codec_cfg->h265.intra_qp = 26;
} break;
default : {
mpp_err_f("support encoder coding type %d\n", codec_cfg->coding);
} break;