mirror of
https://github.com/nyanmisaka/mpp.git
synced 2025-10-04 08:46:24 +08:00
089660baa8
1. add osd control interface 2. remove h264e_hal_rkv_coveragetest_cfg.osd 3. add h264e_hal_test & mpi_enc_test for osd 4. use tool to format code Change-Id: Iadb3453d8e6976e5f718253f762d144864419e94 Signed-off-by: Lin Kesheng <lks@rock-chips.com>
403 lines
16 KiB
C
403 lines
16 KiB
C
/*
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* Copyright 2015 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __RK_MPI_CMD_H__
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#define __RK_MPI_CMD_H__
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#include "rk_type.h"
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/*
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* Command id bit usage is defined as follows:
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* bit 20 - 23 - module id
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* bit 16 - 19 - contex id
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* bit 0 - 15 - command id
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*/
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#define CMD_MODULE_ID_MASK (0x00F00000)
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#define CMD_MODULE_OSAL (0x00100000)
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#define CMD_MODULE_MPP (0x00200000)
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#define CMD_MODULE_CODEC (0x00300000)
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#define CMD_MODULE_HAL (0x00400000)
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#define CMD_CTX_ID_MASK (0x000F0000)
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#define CMD_CTX_ID_DEC (0x00010000)
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#define CMD_CTX_ID_ENC (0x00020000)
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#define CMD_CTX_ID_ISP (0x00030000)
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#define CMD_ID_MASK (0x0000FFFF)
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#define MPP_ENC_OSD_PLT_WHITE ((255<<24)|(128<<16)|(128<<8)|235)
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#define MPP_ENC_OSD_PLT_YELLOW ((255<<24)|(146<<16)|( 16<<8 )|210)
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#define MPP_ENC_OSD_PLT_CYAN ((255<<24)|( 16<<16 )|(166<<8)|170)
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#define MPP_ENC_OSD_PLT_GREEN ((255<<24)|( 34<<16 )|( 54<<8 )|145)
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#define MPP_ENC_OSD_PLT_TRANS (( 0<<24)|(222<<16)|(202<<8)|106)
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#define MPP_ENC_OSD_PLT_RED ((255<<24)|(240<<16)|( 90<<8 )|81)
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#define MPP_ENC_OSD_PLT_BLUE ((255<<24)|(110<<16)|(240<<8)|41)
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#define MPP_ENC_OSD_PLT_BLACK ((255<<24)|(128<<16)|(128<<8)|16)
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typedef enum {
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MPP_OSAL_CMD_BASE = CMD_MODULE_OSAL,
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MPP_OSAL_CMD_END,
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MPP_CMD_BASE = CMD_MODULE_MPP,
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MPP_ENABLE_DEINTERLACE,
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MPP_SET_INPUT_BLOCK,
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MPP_SET_OUTPUT_BLOCK,
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MPP_CMD_END,
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MPP_CODEC_CMD_BASE = CMD_MODULE_CODEC,
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MPP_CODEC_GET_FRAME_INFO,
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MPP_CODEC_CMD_END,
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MPP_DEC_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_DEC,
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MPP_DEC_SET_FRAME_INFO, /* vpu api legacy control for buffer slot dimension init */
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MPP_DEC_SET_EXT_BUF_GROUP, /* IMPORTANT: set external buffer group to mpp decoder */
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MPP_DEC_SET_INFO_CHANGE_READY,
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MPP_DEC_SET_INTERNAL_PTS_ENABLE,
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MPP_DEC_SET_PARSER_SPLIT_MODE, /* Need to setup before init */
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MPP_DEC_SET_PARSER_FAST_MODE, /* Need to setup before init */
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MPP_DEC_GET_STREAM_COUNT,
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MPP_DEC_GET_VPUMEM_USED_COUNT,
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MPP_DEC_SET_VC1_EXTRA_DATA,
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MPP_DEC_SET_OUTPUT_FORMAT,
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MPP_DEC_CMD_END,
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MPP_ENC_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ENC,
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MPP_ENC_SET_RC_CFG,
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MPP_ENC_GET_RC_CFG,
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MPP_ENC_SET_PREP_CFG,
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MPP_ENC_GET_PREP_CFG,
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MPP_ENC_SET_OSD_PLT_CFG,
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MPP_ENC_SET_OSD_DATA_CFG,
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MPP_ENC_GET_OSD_CFG,
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MPP_ENC_SET_CFG,
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MPP_ENC_GET_CFG,
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MPP_ENC_SET_EXTRA_INFO,
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MPP_ENC_GET_EXTRA_INFO,
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MPP_ENC_SET_FORMAT,
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MPP_ENC_SET_IDR_FRAME,
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MPP_ENC_CMD_END,
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MPP_ISP_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ISP,
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MPP_ISP_CMD_END,
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MPP_HAL_CMD_BASE = CMD_MODULE_HAL,
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MPP_HAL_CMD_END,
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MPI_CMD_BUTT,
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} MpiCmd;
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/*
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* Configure of encoder is separated into four parts.
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*
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* 1. Rate control parameter
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* This is quality and bitrate request from user.
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* For controller only
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*
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* 2. Data source MppFrame parameter
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* This is data source buffer information.
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* For both controller and hal
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*
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* 3. Video codec infomation
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* This is user custormized stream information.
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* For hal only
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*
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* 4. Extra parameter
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* including:
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* PreP : encoder Preprocess configuration
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* ROI : Region Of Interest
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* OSD : On Screen Display
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* MD : Motion Detection
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* extra : SEI for h.264 / Exif for mjpeg
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* For hal only
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*
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* The module transcation flow is as follows:
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*
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* + +
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* User | Mpi/Mpp | Controller
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* | | Hal
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* | |
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* +----------+ | +---------+ | +------------+
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* | | | | +-----RcCfg-----> |
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* | RcCfg +---------> | | | Controller |
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* | | | | | +-Frame-----> |
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* +----------+ | | | | | +---+-----^--+
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* | | | | | | |
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* | | | | | | |
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* +----------+ | | | | | syntax |
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* | | | | | | | | |
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* | MppFrame +---------> MppEnc +---+ | | result
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* | | | | | | | | |
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* +----------+ | | | | | | |
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* | | | | | +---v-----+--+
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* | | | +-Frame-----> |
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* +----------+ | | | | | |
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* | | | | +---CodecCfg----> Hal |
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* | CodecCfg +---------> | | | |
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* | | | | <-----Extra-----> |
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* +----------+ | +---------+ | +------------+
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* | |
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* | |
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* + +
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*
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* The function call flow is shown below:
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*
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* mpi mpp_enc controller hal
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* + + + +
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* | | | |
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* | | | |
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* +----------init------------> | |
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* | | | |
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* | | | |
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* | MppFrame | | |
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* +---------control----------> MppFrame | |
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* | +-----control-----> |
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* | | | MppFrame |
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* | +--------------------------control-------->
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* | | | allocate
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* | | | buffer
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* | | | |
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* | RcCfg | | |
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* +---------control----------> RcCfg | |
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* | +-----control-----> |
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* | | rc_init |
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* | | | |
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* | | | |
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* | CodecCfg | | |
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* +---------control----------> | CodecCfg |
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* | +--------------------------control-------->
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* | | | generate
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* | | | sps/pps
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* | | | Get extra info |
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* | +--------------------------control-------->
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* | Get extra info | | |
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* +---------control----------> | |
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* | | | |
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* | | | |
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* | PrepCfg | | |
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* +---------control----------> | PrepCfg |
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* | +--------------------------control-------->
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* | | | |
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* | ROICfg | | |
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* +---------control----------> | ROICfg |
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* | +--------------------------control-------->
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* | | | |
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* | OSDCfg | | |
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* +---------control----------> | OSDCfg |
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* | +--------------------------control-------->
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* | | | |
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* | MDCfg | | |
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* +---------control----------> | MDCfg |
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* | +--------------------------control-------->
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* | | | |
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* | Set extra info | | |
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* +---------control----------> | Set extra info |
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* | +--------------------------control-------->
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* | | | |
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* | task | | |
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* +----------encode----------> task | |
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* | +-----encode------> |
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* | | encode |
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* | | | syntax |
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* | +--------------------------gen_reg-------->
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* | | | |
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* | | | |
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* | +---------------------------start--------->
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* | | | |
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* | | | |
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* | +---------------------------wait---------->
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* | | | |
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* | | callback | |
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* | +-----------------> |
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* +--OSD-MD--encode----------> | |
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* | . | | |
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* | . | | |
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* | . | | |
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* +--OSD-MD--encode----------> | |
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* | | | |
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* +----------deinit----------> | |
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* + + + +
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*/
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/*
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* Rate control parameter
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*
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* rc_mode - rate control mode
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* Mpp balances quality and bit rate by the mode index
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* Mpp provide 5 level of balance mode of quality and bit rate
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* 1 - only quality mode: only quality parameter takes effect
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* 2 - more quality mode: quality parameter takes more effect
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* 3 - balance mode : balance quality and bitrate 50 to 50
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* 4 - more bitrate mode: bitrate parameter takes more effect
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* 5 - only bitrate mode: only bitrate parameter takes effect
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*
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* quality - quality parameter
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* mpp does not give the direct parameter in different protocol.
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* mpp provide total 5 quality level 1 ~ 5
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* 0 - auto
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* 1 - worst
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* 2 - worse
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* 3 - medium
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* 4 - better
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* 5 - best
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*
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* bit rate parameters
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* mpp gives three bit rate control parameter for control
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* bps_target - target bit rate, unit: bit per second
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* bps_max - maximun bit rate, unit: bit per second
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* bps_min - minimun bit rate, unit: bit per second
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* if user need constant bit rate set parameters to the similar value
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* if user need variable bit rate set parameters as they need
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*
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* frame rate parameters have great effect on rate control
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* all fps parameter is in 32bit
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* low 16bit is denominator
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* high 16bit is numerator
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* if high 16bit is zero then the whole integer is just fps
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* fps_in - input frame rate, unit: frame per second
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* if 0 then default set to 30
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* fps_out - output frame rate, unit: frame per second
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* if 0 then default set to fps_in
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* gop - gap between Intra frame
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* 0 for only 1 I frame the rest are all P frames
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* 1 for all I frame
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* 2 for I P I P I P
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* 3 for I P P I P P
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* etc...
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* skip_cnt - max continuous frame skip count
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* 0 - frame skip is not allow
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*
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*/
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typedef struct MppEncRcCfg_t {
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RK_S32 rc_mode;
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RK_S32 quality;
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RK_S32 bps_target;
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RK_S32 bps_max;
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RK_S32 bps_min;
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RK_S32 fps_in;
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RK_S32 fps_out;
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RK_S32 gop;
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RK_S32 skip_cnt;
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} MppEncRcCfg;
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/*
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* Mpp frame parameter
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* direct use MppFrame to store information
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*/
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/*
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* Mpp codec parameter
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* parameter is defined in different syntax header
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*/
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/*
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* Mpp preprocess parameter
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*/
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typedef struct MppEncPrepCfg_t {
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MppFrameFormat format_in;
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MppFrameFormat format_out;
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RK_U32 rotation;
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} MppEncPrepCfg;
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/*
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* Mpp ROI parameter
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* Region configture define a rectangle as ROI
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*/
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typedef struct MppEncROIRegion_t {
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RK_U16 x;
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RK_U16 y;
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RK_U16 w;
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RK_U16 h;
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RK_U16 intra;
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RK_U16 quality;
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} MppEncROIRegion;
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typedef struct MppEncROICfg_t {
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RK_U32 number;
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MppEncROIRegion *regions;
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} MppEncROICfg;
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/*
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* Mpp OSD parameter
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*
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* Mpp OSD support total 8 regions
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* Mpp OSD support 256-color palette two mode palette:
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* 1. Configurable OSD palette
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* When palette is set.
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* 2. fixed OSD palette
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* When palette is NULL.
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*
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* if MppEncOSDPlt.buf != NULL , palette includes maximun 256 levels,
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* every level composed of 32 bits defined below:
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* Y : 8 bits
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* U : 8 bits
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* V : 8 bits
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* alpha : 8 bits
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*/
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typedef struct MppEncOSDPlt_t {
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RK_U32 buf[256];
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} MppEncOSDPlt;
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/* position info is unit in 16 pixels(one MB), and
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* x-directon range in pixels = (rd_pos_x - lt_pos_x + 1) * 16;
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* y-directon range in pixels = (rd_pos_y - lt_pos_y + 1) * 16;
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*/
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typedef struct MppEncOSDRegion_t {
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RK_U32 enable;
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RK_U32 inverse;
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RK_U32 start_mb_x;
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RK_U32 start_mb_y;
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RK_U32 num_mb_x;
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RK_U32 num_mb_y;
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RK_U32 buf_offset;
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} MppEncOSDRegion;
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/* if num_region > 0 && region==NULL
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* use old osd data
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*/
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typedef struct MppEncOSDData_t {
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MppBuffer buf;
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RK_U32 num_region;
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MppEncOSDRegion region[8];
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} MppEncOSDData;
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/*
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* Mpp Motion Detection parameter
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*
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* Mpp can output Motion Detection infomation for each frame.
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* If user euqueue a encode task with KEY_MOTION_INFO by following function
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* then encoder will output Motion Detection information to the buffer.
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*
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* mpp_task_meta_set_buffer(task, KEY_MOTION_INFO, buffer);
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*
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* Motion Detection information will be organized in this way:
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* 1. Each 16x16 block will have a 32 bit block information which contains
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* 15 bit SAD(Sum of Abstract Difference value
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* 9 bit signed horizontal motion vector
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* 8 bit signed vertical motion vector
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* 2. The sequence of MD information in the buffer is corresponding to the
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* block position in the frame, left-to right, top-to-bottom.
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* 3. If the width of the frame is not a multiple of 256 pixels (16 macro
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* blocks), DMA would extend the frame to a multiple of 256 pixels and
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* the extended blocks' MD information are 32'h0000_0000.
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* 4. Buffer must be ion buffer and 1024 byte aligned.
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*/
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typedef struct MppEncMDBlkInfo_t {
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RK_U32 sad : 15; /* bit 0~14 - SAD */
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RK_S32 mvx : 9; /* bit 15~23 - signed horizontal mv */
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RK_S32 mvy : 8; /* bit 24~31 - signed vertical mv */
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} MppEncMDBlkInfo;
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#endif /*__RK_MPI_CMD_H__*/
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