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Author SHA1 Message Date
Yandong Lin
bc327c2241 [mpp_dec_cfg]: add scale down cfg for dec 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Iafd9cd10af20e3e97c76f3be8fb0dc7e98bbf5fb
 2022-11-25 18:07:05 +08:00
Herman Chen
21f8fe1062 [avspd]: Fix version check on I frame 
If correct I frame found fixed the version value.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I7f70827048a1af718f0015845ecf45e12bd11b94
 2022-11-25 17:10:22 +08:00
xueman.ruan
d768f4f0f0 [hal_avs2d]: Fix dumping FBC data error. 
If format is fbc, write fbc header first.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Ib758b67ef2258135f8e1a103f9a0950996f4e767
 2022-11-25 10:35:01 +08:00
xueman.ruan
6752ad54a1 [hal_vp8e]: Add rotation function. 
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Ifdb42a8f2858e239b57fe6a8b37e7986bb2e5e9d
 2022-11-25 10:33:22 +08:00
Yandong Lin
6f5f429249 [mpp_dec]: support hdr meta data decode 
1.support parsing dolby meta data from h265 and av1 streams.
2.support parsing vivid meta data from h265, and todo for avs2.

The hdr meta data will be append at the end of the frame data.
So it need a extra 4k buffer to store the hdr meta data.

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I50432633a7fb57c6f340e1966866f931bf7d8c43
 2022-11-25 10:23:00 +08:00
Yandong Lin
bcb0187d3a [hdr_meta_com]: add hdr_meta_com module 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I35df93d91408d9dbde0d2bdfe78e25540c9e4452
 2022-11-24 21:33:51 +08:00
Yandong Lin
77e8a96f05 [mpp_frame]: add hdr dynamic meta info 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Iea7585709bcd3e17d11c28f7e87093fe9f15f77a
 2022-11-24 14:22:58 +08:00
Yandong Lin
15ab8f73be [mpp_meta]: add new key for hdr meta info 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ib9e69f1c8c110e204468284b96322d3de297de29
 2022-11-24 14:19:24 +08:00
Yandong Lin
e87bad422a [mpp_dec_cfg]: add enable_hdr_meta base cfg 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Idc5e0c50d19bf38d45cb07b4f003d652da26a53f
 2022-11-24 14:09:39 +08:00
xueman.ruan
3e4132859c [hal_jpege_vepu2]: Fix segment coding error. 
1. present in rk3588.
2. rotating 270 degree presents that partitions of picture out of order,
which is fixed by fixing offset_x and offset_y.
3. when input width and heigth not 16 aligned, extra gray presents,
which is fixed by fixing part_x_fill and part_y_fill.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: If38bb3f6404088ab344f5bcad23e2f170b320356
 2022-11-24 09:12:50 +08:00
Herman Chen
44a6f18ac6 [h265d]: Add hw_info pointer check 
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ib11d6a4e103f06df2d4211a9224088c07c5f459b
 2022-11-24 09:11:08 +08:00
Yandong Lin
5ffd57b278 [vepu540c]: support enc with a res of more than 3k 
add external line buffer to support encoding with those resolutions of
more than 3k

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I7ad7b55d7d726e8ae50e15e13211a317025b71a3
 2022-11-23 14:44:38 +08:00
Chandler Chen
2edfc6dbf5 [vepu540c_hevc]: fix argb8888 encode error 
add format swap config

Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I5a68dd72591ba4dacd9be7192c903bb67c4afc0a
 2022-11-22 19:59:23 +08:00
xueman.ruan
05bf99bec9 [hal_jpege]: Fix hardware mismatch error. 
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: I5f2051cf21711331e9e58ed0a92a2be2c24197a7
 2022-11-22 14:49:39 +08:00
Johnson Ding
8f17049b52 [vdpu382_avs2]: fix ref mark info getting error 
Change-Id: Ibeb7494f069e24c80a5d7d3ec89c8d385d523dc1
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2022-11-21 18:26:14 +08:00
Johnson Ding
c2e711cec1 [iep2]: fix output frame order at demo 
Change-Id: Ia8dd092bda49e9f38a067914fa267011330f37b3
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2022-11-21 15:48:40 +08:00
Johnson Ding
5c33791b02 [iep2]: fix page fault 
Change-Id: I9541aca0f6a749491b9d301c173b4f3b83794fdb
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2022-11-21 15:48:32 +08:00
Chandler Chen
57f0767c48 [hal_h264e] Vepu540c fix extra syntax error log for dpb 
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I45dca0cc92b54b1334dd2b5634caec0dc8e70fab
 2022-11-21 14:59:57 +08:00
Chandler Chen
24ef1e40d7 [vdpu382] vdpu382 reg modify strmd_detect_error_flag 
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I8a5cc637913cfaafd93a194c747f36794e52d1a5
 2022-11-20 13:30:16 +08:00
Herman Chen
6a643f6e18 [hal_avsd_plus]: Add avs+ dec support for rk3528 
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I8cc2cd61cfa65e5824c1a0696d6de7bb1728221d
 2022-11-18 17:12:00 +08:00
Chandler Chen
9e018b8135 [mpi_enc_test]: modify mdinfo_size 
fix vepu540c pagefault

Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I2c5b5a6184ae01c20047bb9285b47850ae5fe77e
 2022-11-17 17:47:11 +08:00
Chandler Chen
da63fea543 [vepu540c] vepu540c config for rk3528 
1. max ctu size change to 32
2. params modify

Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I469600d661e5f2dfac96fbfcf8541c7f8ac8abe9
 2022-11-17 17:47:11 +08:00
Chandler Chen
223e0739f0 [mpp_soc]: Add rk3528 support 
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: Ic26260c0987176b785434188625e018ab2c5241c
 2022-11-17 17:47:11 +08:00
Chandler Chen
65ba1d354c [mpp_soc] add vepu540c cap info 
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I7c487a02c96333a5fb2b757ce08c154ada72fb85
 2022-11-17 17:47:11 +08:00
Chandler Chen
3e36777102 [vepu540c] reg modify for rk3528 vepu540c 
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I35a3cf270005bdab2e9148a595e8242e6d8be554
 2022-11-17 17:47:11 +08:00
sayon.chen
1a0d6ed462 [vepu540c_avc]: support hal_vepu540c avc reg cfg 
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I2bc9d85e777420cbc2f74126762d29a0d42a3ed0
 2022-11-17 17:47:11 +08:00
sayon.chen
9c03426786 [vepu540c_hevc]: support hal_vepu 540c hevc reg cfg 
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: Ia23ceef6d1f79dad2195bcb78dad7cd9a8c9f63e
 2022-11-17 17:47:11 +08:00
sayon.chen
d899a2edc1 [vepu540c_jpeg]: Support 540c jpeg hal reg cfg 
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: Ifc6f2b27ab74eb96fdd4a21047e1a57fe4f3b65c
 2022-11-17 17:47:11 +08:00
sayon.chen
e9ef10b8ca [vepu54c_common]: Add common part code 
Change-Id: Iaf7a025ab4b90fb73e4e65c81eed29842c6ac055
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
 2022-11-17 17:47:11 +08:00
Chandler Chen
5a2d99d312 [vdpu382] correct vdpu382 hardware id 
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: Icba58f8a2a796275bdbe4284b4100f24632c1077
 2022-11-17 17:46:56 +08:00
Hery Xu
45fe633d11 [vpu_api_legacy] fix get mpi config bug 
The default value of mpi cannot be get if not implement MPP_ENC_GET_CFG

Signed-off-by: Hery Xu <hery.xu@rock-chips.com>
Change-Id: I9f85373f58472ad11d6db19c99daf28c7f6ca861
 2022-11-17 16:59:54 +08:00
Herman Chen
81022c976e Revert "[h264d_dpb]: Optimize fast play" 
This reverts commit 19e7edf048.

Reason for revert: Cause H.264 decoder output delay

Change-Id: I662bbc65a4f2c5f0ea0c3698488bca3611aeb277
 2022-11-17 12:28:17 +08:00
Chandler Chen
e96dc75dd1 [hal_rkdec] add vdpu382 support 
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: Ifcb1d35ceb41c3ca90bbfe482025c2147bff268e
 2022-11-17 10:26:33 +08:00
Chandler Chen
4273d26af3 [hal_rkdec] vdpu34x code decoupling to avoid build conflict with vdpu382 
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I487bc509cc98b131ec9e15f08059b2545fc31b96
 2022-11-17 10:26:33 +08:00
Chandler Chen
4fd68f06d0 [vp8e] fix build error: add target_link_library 
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I267ef798b188f66cc0e10c4200471458343306f8
 2022-11-17 08:54:22 +08:00
Yandong Lin
ec84649d19 [h265d_vdpu34x]: fix dec output green img with err source 
When decoding an err source with weight prediction, due to a decoder a
bug, when use inter mode to proc error ctu, the err part will be
filled with green.

So when weight_pred_flag == 1, cofigure error_intra_mode = 1 to use
intra mode to proc error ctu.

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ia368fd0cbf401bd2c1d0e95b60aa5ac513c9dcbc
 2022-11-17 08:42:33 +08:00
Yandong Lin
6ee2ea6207 [av1d]: support av1 10bit output 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Id9be30f9fff7abc19313b734d729f590eedcb50d
 2022-11-17 08:42:13 +08:00
Yandong Lin
c90d683b53 [av1d_parse]: fix segment feature value get err issue 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I662b39575d19f50c1ff912c6b76f081db843855e
 2022-11-17 08:41:46 +08:00
Yandong Lin
6593fd01e6 [hal_av1d_vdpu]: fix av1 dec err when afbc mode 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Iac850d1155ca1126d16d5206a5b890d3bca04041
 2022-11-17 08:41:08 +08:00
Hongjin Li
2109b2a8d9 [dec_cfg]: default enable fast play 
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Change-Id: Icf0ca1d8662c691bb4ad58f256ab0964f7747730
 2022-11-16 17:25:44 +08:00
Johnson Ding
6641075610 [vepu541]: Set default color range to full range 
For hardware color range setting, set to full range as default to avoid
color clipping to limit range.

Change-Id: I2dbca0234da629e6a09cdd560ffb07b7bc1b9363
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2022-11-16 16:29:20 +08:00
sayon.chen
cf5b3571e7 [h265e_cfg]: Add lpf across slice or tile cfg 
Change-Id: Ib5afc2d9b95e85d523e545e580ccd0fcd7b8e416
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2022-11-16 15:26:02 +08:00
xueman.ruan
bcd93b3cd4 [hal_vp8e]: Fix chroma offset error. 
1. ver_stride should not be forced to 16 aligned but set by user config.
2. fix logic of YUV offset process.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Ia7db7eecb9d66e3677a21fb6cf724f20aa3c85fb
 2022-11-15 11:09:09 +08:00
xueman.ruan
80bc809d6b [hal_vepu5xx]: Expand colorspace transformation 
1. expand colorspace transformation for AVC and HEVC in rkv hardware.
2. default rgb-to-yuv transformation: limit, BT.601.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Id8674d3d4acd84dc263c7a81a54f1a5fc74e1e17
 2022-11-15 10:38:24 +08:00
Herman Chen
bf5b8faa4a [mpp_dec]: Fix sem_t not init issue 
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I3e384159703df4d4ba27558045c1763c62afc0c9
 2022-11-11 18:04:13 +08:00
Zhihua Wang
2de930d33c [utils]: read_image support YUV444SP, YUV444P 
Signed-off-by: Zhihua Wang <hogan.wang@rock-chips.com>
Change-Id: I20f9b200134dac343c7e3e5da894689937afe2ca
 2022-11-11 14:19:35 +08:00
Yandong Lin
5557255eac [av1d]: fix dec err for bitstreams with dolby metadata 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I0f906688490ddc29df7e3248bfe8676d07d32283
 2022-11-11 08:40:18 +08:00
dawnming.huang
ac40de1bb0 [mpp_buf_slot]: fbc stride default 64 align 
Signed-off-by: dawnming.huang <dawnming.huang@rock-chips.com>
Change-Id: Ic22d6cf377c337d707eebe3cea79a510788fbf5b
 2022-11-10 16:25:56 +08:00
Hery Xu
8ef22535de [vpu_api_legacy]: encode add I420 hor_stride config 
Signed-off-by: Hery Xu <hery.xu@rock-chips.com>
Change-Id: Ie54ac10658ed27efc2be88156976e1a88207d190
 2022-11-10 09:38:03 +08:00
Herman Chen
0acbc1084f [h264d]: Fix error log on missing prefix nal 
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I9032bdd72e3abb0f46afcf38a79ae087b7de4adc
 2022-11-09 16:24:09 +08:00