Add MPP_FLAGS_REG_OFFSET_ALONE flag to mpp_service_cmd_poll to avoid the
flag be cleared in kernel.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I27ef320ec472e871eace77c9238378abab3f2b34
For hevc field source without idr frame,
modify the number of dpb frame buffers
to fix the screen flickering
Change-Id: I65b471a563585a49f45de1e4388a8e22aabefee4
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
For hevc field source without idr frame,
get idr information from recovrey point
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Change-Id: I4c5aaa20b074d470eff73461ac15c1019f74cfb4
1. Add MPP_VPROC_MODE_DETECTION for user to enable frame/field data
detection for iep2.
2. Use MPP_FRAME_FLAG_DEINTERLACED flag for frame/field data detection
flag in MppFrame.
3. Add vproc version and detection function to dec_vproc module.
Change-Id: I41e36c6df4a09970952b499eda5930091e6f716d
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
Restrict the poc interval can only be modified to 1.
In the case where it can be modified to 2, it may cause
the screen to flicker.
However, if it is not allowed to change to 2, it may cause
the dpb buffer to be full before the frame can be output.
Change-Id: I5a76920f565d856c6e6f3f2ff2e88bf5ca822954
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
https://redmine.rock-chips.com/issues/379038
When the reg_offset ioctl is not set the first time decoding will get
error on translate the pps buffer fd in kernel.
So we must set the MPP_FLAGS_REG_OFFSET_ALONE on each message.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I67f8413047adc77ca3addfe8dbed28ab1b0bcea8
When mpeg2 stream has frame / field switch and mismatch field pair just
mark the picture as error and continue decoding.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I51dac1854c3d76364a671f4be31ae08947b0af2d
When GOP is set to 60 that is the same as the default GOP by
application, igop at reference module isn't set as expected, that leads
to CPB not be cleaned correctly and IDR frame won't be encoded.
see [issue](https://redmine.rock-chips.com/issues/374780)
Change-Id: I2f1030cab700aa560dea07284b820a73c637631e
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
NOTE: realloc may change the buffer base. This will invalid the pointer
which point to the old buffer base.
This issue will make 4 tile H.265 encoding with multi osd generate
error stream.
Change-Id: I764ee9b2097687ae9d5f2bcc8d2ff5987a636844
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
1. Raise H.265 aq step for lower bitrate.
2. Change H.265 skip and small mv tendency.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Signed-off-by: toby.zhang <toby.zhang@rock-chips.com>
Change-Id: I2f454d016aa1d227bb5321533a79e67b701c5e0f
Change tuning parameter to let ME choose small movement normally.
Signed-off-by: toby.zhang <toby.zhang@rock-chips.com>
Change-Id: Ib6a08f11fba53c247bbf2300d062508e9071461b
1. constraint the range of input argument.
2. add flip config, equal to vertical mirror transformation.
3. add mirroring_ext and rotation_ext to config set, for supporting
GET_CFG control.
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: I01c0b9187a18851354e81b5f08afc6dcaaba8365
