mirror of
https://github.com/goplus/llgo.git
synced 2025-09-26 19:51:21 +08:00
add tinygo device files
This commit is contained in:
Li Jie
@@ -6,9 +6,9 @@
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"ldflags": [
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"--defsym=_stack_size=512"
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],
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"linkerscript": "src/device/avr/atmega1280.ld",
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"linkerscript": "targets/device/avr/atmega1280.ld",
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"extra-files": [
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"targets/avr.S",
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"src/device/avr/atmega1280.s"
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"targets/device/avr/atmega1280.s"
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]
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}
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@@ -7,10 +7,10 @@
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"--defsym=_bootloader_size=0",
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"--defsym=_stack_size=512"
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],
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"linkerscript": "src/device/avr/atmega1284p.ld",
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"linkerscript": "targets/device/avr/atmega1284p.ld",
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"extra-files": [
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"targets/avr.S",
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"src/device/avr/atmega1284p.s"
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"targets/device/avr/atmega1284p.s"
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],
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"emulator": "simavr -m atmega1284p -f 20000000 {}"
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}
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@@ -6,9 +6,9 @@
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"ldflags": [
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"--defsym=_stack_size=512"
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],
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"linkerscript": "src/device/avr/atmega2560.ld",
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"linkerscript": "targets/device/avr/atmega2560.ld",
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"extra-files": [
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"targets/avr.S",
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"src/device/avr/atmega2560.s"
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"targets/device/avr/atmega2560.s"
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]
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}
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@@ -3,9 +3,9 @@
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"cpu": "atmega328p",
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"build-tags": ["atmega328p", "atmega", "avr5"],
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"serial": "uart",
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"linkerscript": "src/device/avr/atmega328p.ld",
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"linkerscript": "targets/device/avr/atmega328p.ld",
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"extra-files": [
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"targets/avr.S",
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"src/device/avr/atmega328p.s"
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"targets/device/avr/atmega328p.s"
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]
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}
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@@ -7,9 +7,9 @@
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"--defsym=_stack_size=512"
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],
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"serial": "uart",
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"linkerscript": "src/device/avr/atmega328pb.ld",
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"linkerscript": "targets/device/avr/atmega328pb.ld",
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"extra-files": [
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"targets/avr.S",
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"src/device/avr/atmega328pb.s"
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"targets/device/avr/atmega328pb.s"
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]
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}
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@@ -3,9 +3,9 @@
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"cpu": "atmega32u4",
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"build-tags": ["atmega32u4", "avr5"],
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"serial": "none",
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"linkerscript": "src/device/avr/atmega32u4.ld",
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"linkerscript": "targets/device/avr/atmega32u4.ld",
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"extra-files": [
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"targets/avr.S",
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"src/device/avr/atmega32u4.s"
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"targets/device/avr/atmega32u4.s"
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]
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}
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@@ -4,7 +4,7 @@
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"serial": "usb",
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"linkerscript": "targets/atsamd21.ld",
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"extra-files": [
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"src/device/sam/atsamd21e18a.s"
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"targets/device/sam/atsamd21e18a.s"
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],
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"openocd-transport": "swd",
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"openocd-target": "at91samdXX"
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@@ -4,7 +4,7 @@
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"serial": "usb",
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"linkerscript": "targets/atsamd21.ld",
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"extra-files": [
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"src/device/sam/atsamd21g18a.s"
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"targets/device/sam/atsamd21g18a.s"
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],
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"openocd-transport": "swd",
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"openocd-target": "at91samdXX"
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@@ -3,7 +3,7 @@
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"build-tags": ["atsamd51g19a", "atsamd51g19", "atsamd51", "sam"],
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"linkerscript": "targets/atsamd51.ld",
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"extra-files": [
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"src/device/sam/atsamd51g19a.s"
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"targets/device/sam/atsamd51g19a.s"
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],
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"openocd-transport": "swd",
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"openocd-target": "atsame5x"
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@@ -3,7 +3,7 @@
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"build-tags": ["atsamd51j19a", "atsamd51j19", "atsamd51", "sam"],
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"linkerscript": "targets/atsamd51.ld",
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"extra-files": [
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"src/device/sam/atsamd51j19a.s"
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"targets/device/sam/atsamd51j19a.s"
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],
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"openocd-transport": "swd",
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"openocd-target": "atsame5x"
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@@ -3,7 +3,7 @@
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"build-tags": ["sam", "atsamd51", "atsamd51j20", "atsamd51j20a"],
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"linkerscript": "targets/atsamd51j20a.ld",
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"extra-files": [
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"src/device/sam/atsamd51j20a.s"
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"targets/device/sam/atsamd51j20a.s"
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],
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"openocd-transport": "swd",
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"openocd-target": "atsame5x"
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@@ -3,7 +3,7 @@
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"build-tags": ["atsamd51p19a", "atsamd51p19", "atsamd51", "sam"],
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"linkerscript": "targets/atsamd51.ld",
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"extra-files": [
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"src/device/sam/atsamd51p19a.s"
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"targets/device/sam/atsamd51p19a.s"
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],
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"openocd-transport": "swd",
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"openocd-target": "atsame5x"
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@@ -3,7 +3,7 @@
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"build-tags": ["sam", "atsamd51", "atsamd51p20", "atsamd51p20a"],
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"linkerscript": "targets/atsamd51p20a.ld",
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"extra-files": [
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"src/device/sam/atsamd51p20a.s"
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"targets/device/sam/atsamd51p20a.s"
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],
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"openocd-transport": "swd",
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"openocd-target": "atsame5x"
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@@ -3,7 +3,7 @@
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"build-tags": ["atsame51j19a", "atsame51j19", "atsame51", "atsame5x", "sam"],
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"linkerscript": "targets/atsame5xx19.ld",
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"extra-files": [
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"src/device/sam/atsame51j19a.s"
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"targets/device/sam/atsame51j19a.s"
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],
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"openocd-transport": "swd",
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"openocd-target": "atsame5x"
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@@ -3,7 +3,7 @@
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"build-tags": ["sam", "atsame5x", "atsame54", "atsame54p20", "atsame54p20a"],
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"linkerscript": "targets/atsame5xx20-no-bootloader.ld",
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"extra-files": [
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"src/device/sam/atsame54p20a.s"
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"targets/device/sam/atsame54p20a.s"
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],
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"openocd-transport": "swd",
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"openocd-target": "atsame5x"
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@@ -6,9 +6,9 @@
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"cflags": [
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"-D__AVR_ARCH__=103"
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],
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"linkerscript": "src/device/avr/attiny1616.ld",
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"linkerscript": "targets/device/avr/attiny1616.ld",
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"extra-files": [
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"src/device/avr/attiny1616.s"
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"targets/device/avr/attiny1616.s"
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],
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"flash-command": "pymcuprog write -f {hex} --erase --verify -d attiny1616 -t uart -u {port}"
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}
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@@ -5,9 +5,9 @@
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"cflags": [
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"-D__AVR_ARCH__=25"
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],
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"linkerscript": "src/device/avr/attiny85.ld",
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"linkerscript": "targets/device/avr/attiny85.ld",
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"extra-files": [
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"targets/avr.S",
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"src/device/avr/attiny85.s"
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"targets/device/avr/attiny85.s"
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]
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}
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@@ -4,7 +4,7 @@
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"serial": "uart",
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"linkerscript": "targets/stm32.ld",
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"extra-files": [
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"src/device/stm32/stm32f103.s"
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"targets/device/stm32/stm32f103.s"
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],
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"flash-method": "openocd",
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"openocd-interface": "stlink-v2",
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@@ -22,7 +22,7 @@
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"--gc-sections"
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],
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"extra-files": [
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"src/device/arm/cortexm.S",
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"targets/device/arm/cortexm.S",
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"src/internal/task/task_stack_cortexm.S",
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"src/runtime/asm_arm.S"
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],
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37
targets/device/arm/cortexm.S
Normal file
37
targets/device/arm/cortexm.S
Normal file
@@ -0,0 +1,37 @@
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.syntax unified
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.cfi_sections .debug_frame
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.section .text.HardFault_Handler
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.global HardFault_Handler
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.type HardFault_Handler, %function
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HardFault_Handler:
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.cfi_startproc
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// Put the old stack pointer in the first argument, for easy debugging. This
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// is especially useful on Cortex-M0, which supports far fewer debug
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// facilities.
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mov r0, sp
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// Load the default stack pointer from address 0 so that we can call normal
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// functions again that expect a working stack. However, it will corrupt the
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// old stack so the function below must not attempt to recover from this
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// fault.
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movs r3, #0
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ldr r3, [r3]
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mov sp, r3
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// Continue handling this error in Go.
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bl handleHardFault
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.cfi_endproc
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.size HardFault_Handler, .-HardFault_Handler
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// This is a convenience function for semihosting support.
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// At some point, this should be replaced by inline assembly.
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.section .text.SemihostingCall
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.global SemihostingCall
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.type SemihostingCall, %function
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SemihostingCall:
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.cfi_startproc
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bkpt 0xab
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bx lr
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.cfi_endproc
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.size SemihostingCall, .-SemihostingCall
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22
targets/device/arm/interrupts.c
Normal file
22
targets/device/arm/interrupts.c
Normal file
@@ -0,0 +1,22 @@
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#include <stdint.h>
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void EnableInterrupts(uintptr_t mask) {
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asm volatile(
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"msr PRIMASK, %0"
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:
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: "r"(mask)
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: "memory"
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);
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}
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uintptr_t DisableInterrupts() {
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uintptr_t mask;
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asm volatile(
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"mrs %0, PRIMASK\n\t"
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"cpsid i"
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: "=r"(mask)
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:
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: "memory"
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);
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return mask;
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}
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7
targets/device/avr/at90can128.ld
Normal file
7
targets/device/avr/at90can128.ld
Normal file
@@ -0,0 +1,7 @@
|
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/* Automatically generated file. DO NOT EDIT. */
|
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/* Generated by gen-device-avr.go from AT90CAN128.atdf, see http://packs.download.atmel.com/ */
|
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__flash_size = 0x20000;
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__ram_start = 0x100;
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__ram_size = 0x1000;
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__num_isrs = 37;
|
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98
targets/device/avr/at90can128.s
Normal file
98
targets/device/avr/at90can128.s
Normal file
@@ -0,0 +1,98 @@
|
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; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90CAN128.atdf, see http://packs.download.atmel.com/
|
||||
|
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; This is the default handler for interrupts, if triggered but not defined.
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; Sleep inside so that an accidentally triggered interrupt won't drain the
|
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; battery of a battery-powered device.
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.section .text.__vector_default
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.global __vector_default
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__vector_default:
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sleep
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rjmp __vector_default
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; Avoid the need for repeated .weak and .set instructions.
|
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.macro IRQ handler
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.weak \handler
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.set \handler, __vector_default
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.endm
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||||
|
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; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
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.section .vectors, "a", %progbits
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.global __vectors
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jmp __vector_RESET
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jmp __vector_INT0
|
||||
jmp __vector_INT1
|
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jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_CANIT
|
||||
jmp __vector_OVRIT
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
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jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_CANIT
|
||||
IRQ __vector_OVRIT
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90can32.ld
Normal file
7
targets/device/avr/at90can32.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90CAN32.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x8000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x800;
|
||||
__num_isrs = 37;
|
||||
98
targets/device/avr/at90can32.s
Normal file
98
targets/device/avr/at90can32.s
Normal file
@@ -0,0 +1,98 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90CAN32.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_CANIT
|
||||
jmp __vector_OVRIT
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_CANIT
|
||||
IRQ __vector_OVRIT
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90can64.ld
Normal file
7
targets/device/avr/at90can64.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90CAN64.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x10000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x1000;
|
||||
__num_isrs = 37;
|
||||
98
targets/device/avr/at90can64.s
Normal file
98
targets/device/avr/at90can64.s
Normal file
@@ -0,0 +1,98 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90CAN64.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_CANIT
|
||||
jmp __vector_OVRIT
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_CANIT
|
||||
IRQ __vector_OVRIT
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90pwm1.ld
Normal file
7
targets/device/avr/at90pwm1.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90PWM1.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x2000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x200;
|
||||
__num_isrs = 32;
|
||||
88
targets/device/avr/at90pwm1.s
Normal file
88
targets/device/avr/at90pwm1.s
Normal file
@@ -0,0 +1,88 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90PWM1.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
rjmp __vector_RESET
|
||||
rjmp __vector_PSC2_CAPT
|
||||
rjmp __vector_PSC2_EC
|
||||
rjmp __vector_PSC1_CAPT
|
||||
rjmp __vector_PSC1_EC
|
||||
rjmp __vector_PSC0_CAPT
|
||||
rjmp __vector_PSC0_EC
|
||||
rjmp __vector_ANALOG_COMP_0
|
||||
rjmp __vector_ANALOG_COMP_1
|
||||
rjmp __vector_ANALOG_COMP_2
|
||||
rjmp __vector_INT0
|
||||
rjmp __vector_TIMER1_CAPT
|
||||
rjmp __vector_TIMER1_COMPA
|
||||
rjmp __vector_TIMER1_COMPB
|
||||
rjmp __vector_RESERVED15
|
||||
rjmp __vector_TIMER1_OVF
|
||||
rjmp __vector_TIMER0_COMP_A
|
||||
rjmp __vector_TIMER0_OVF
|
||||
rjmp __vector_ADC
|
||||
rjmp __vector_INT1
|
||||
rjmp __vector_SPI_STC
|
||||
rjmp __vector_USART_RX
|
||||
rjmp __vector_USART_UDRE
|
||||
rjmp __vector_USART_TX
|
||||
rjmp __vector_INT2
|
||||
rjmp __vector_WDT
|
||||
rjmp __vector_EE_READY
|
||||
rjmp __vector_TIMER0_COMPB
|
||||
rjmp __vector_INT3
|
||||
rjmp __vector_RESERVED30
|
||||
rjmp __vector_RESERVED31
|
||||
rjmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_PSC2_CAPT
|
||||
IRQ __vector_PSC2_EC
|
||||
IRQ __vector_PSC1_CAPT
|
||||
IRQ __vector_PSC1_EC
|
||||
IRQ __vector_PSC0_CAPT
|
||||
IRQ __vector_PSC0_EC
|
||||
IRQ __vector_ANALOG_COMP_0
|
||||
IRQ __vector_ANALOG_COMP_1
|
||||
IRQ __vector_ANALOG_COMP_2
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_RESERVED15
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP_A
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RX
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TX
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_RESERVED30
|
||||
IRQ __vector_RESERVED31
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90pwm161.ld
Normal file
7
targets/device/avr/at90pwm161.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90PWM161.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 20;
|
||||
64
targets/device/avr/at90pwm161.s
Normal file
64
targets/device/avr/at90pwm161.s
Normal file
@@ -0,0 +1,64 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90PWM161.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_PSC2_CAPT
|
||||
jmp __vector_PSC2_EC
|
||||
jmp __vector_PSC2_EEC
|
||||
jmp __vector_PSC0_CAPT
|
||||
jmp __vector_PSC0_EC
|
||||
jmp __vector_PSC0_EEC
|
||||
jmp __vector_ANALOG_COMP_1
|
||||
jmp __vector_ANALOG_COMP_2
|
||||
jmp __vector_ANALOG_COMP_3
|
||||
jmp __vector_INT0
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_ADC
|
||||
jmp __vector_INT1
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_INT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_PSC2_CAPT
|
||||
IRQ __vector_PSC2_EC
|
||||
IRQ __vector_PSC2_EEC
|
||||
IRQ __vector_PSC0_CAPT
|
||||
IRQ __vector_PSC0_EC
|
||||
IRQ __vector_PSC0_EEC
|
||||
IRQ __vector_ANALOG_COMP_1
|
||||
IRQ __vector_ANALOG_COMP_2
|
||||
IRQ __vector_ANALOG_COMP_3
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90pwm216.ld
Normal file
7
targets/device/avr/at90pwm216.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90PWM216.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 32;
|
||||
88
targets/device/avr/at90pwm216.s
Normal file
88
targets/device/avr/at90pwm216.s
Normal file
@@ -0,0 +1,88 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90PWM216.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_PSC2_CAPT
|
||||
jmp __vector_PSC2_EC
|
||||
jmp __vector_PSC1_CAPT
|
||||
jmp __vector_PSC1_EC
|
||||
jmp __vector_PSC0_CAPT
|
||||
jmp __vector_PSC0_EC
|
||||
jmp __vector_ANALOG_COMP_0
|
||||
jmp __vector_ANALOG_COMP_1
|
||||
jmp __vector_ANALOG_COMP_2
|
||||
jmp __vector_INT0
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_RESERVED15
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP_A
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_ADC
|
||||
jmp __vector_INT1
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART_RX
|
||||
jmp __vector_USART_UDRE
|
||||
jmp __vector_USART_TX
|
||||
jmp __vector_INT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_INT3
|
||||
jmp __vector_RESERVED30
|
||||
jmp __vector_RESERVED31
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_PSC2_CAPT
|
||||
IRQ __vector_PSC2_EC
|
||||
IRQ __vector_PSC1_CAPT
|
||||
IRQ __vector_PSC1_EC
|
||||
IRQ __vector_PSC0_CAPT
|
||||
IRQ __vector_PSC0_EC
|
||||
IRQ __vector_ANALOG_COMP_0
|
||||
IRQ __vector_ANALOG_COMP_1
|
||||
IRQ __vector_ANALOG_COMP_2
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_RESERVED15
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP_A
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RX
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TX
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_RESERVED30
|
||||
IRQ __vector_RESERVED31
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90pwm2b.ld
Normal file
7
targets/device/avr/at90pwm2b.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90PWM2B.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x2000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x200;
|
||||
__num_isrs = 32;
|
||||
88
targets/device/avr/at90pwm2b.s
Normal file
88
targets/device/avr/at90pwm2b.s
Normal file
@@ -0,0 +1,88 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90PWM2B.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
rjmp __vector_RESET
|
||||
rjmp __vector_PSC2_CAPT
|
||||
rjmp __vector_PSC2_EC
|
||||
rjmp __vector_PSC1_CAPT
|
||||
rjmp __vector_PSC1_EC
|
||||
rjmp __vector_PSC0_CAPT
|
||||
rjmp __vector_PSC0_EC
|
||||
rjmp __vector_ANALOG_COMP_0
|
||||
rjmp __vector_ANALOG_COMP_1
|
||||
rjmp __vector_ANALOG_COMP_2
|
||||
rjmp __vector_INT0
|
||||
rjmp __vector_TIMER1_CAPT
|
||||
rjmp __vector_TIMER1_COMPA
|
||||
rjmp __vector_TIMER1_COMPB
|
||||
rjmp __vector_RESERVED15
|
||||
rjmp __vector_TIMER1_OVF
|
||||
rjmp __vector_TIMER0_COMPA
|
||||
rjmp __vector_TIMER0_OVF
|
||||
rjmp __vector_ADC
|
||||
rjmp __vector_INT1
|
||||
rjmp __vector_SPI_STC
|
||||
rjmp __vector_USART_RX
|
||||
rjmp __vector_USART_UDRE
|
||||
rjmp __vector_USART_TX
|
||||
rjmp __vector_INT2
|
||||
rjmp __vector_WDT
|
||||
rjmp __vector_EE_READY
|
||||
rjmp __vector_TIMER0_COMPB
|
||||
rjmp __vector_INT3
|
||||
rjmp __vector_RESERVED30
|
||||
rjmp __vector_RESERVED31
|
||||
rjmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_PSC2_CAPT
|
||||
IRQ __vector_PSC2_EC
|
||||
IRQ __vector_PSC1_CAPT
|
||||
IRQ __vector_PSC1_EC
|
||||
IRQ __vector_PSC0_CAPT
|
||||
IRQ __vector_PSC0_EC
|
||||
IRQ __vector_ANALOG_COMP_0
|
||||
IRQ __vector_ANALOG_COMP_1
|
||||
IRQ __vector_ANALOG_COMP_2
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_RESERVED15
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RX
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TX
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_RESERVED30
|
||||
IRQ __vector_RESERVED31
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90pwm316.ld
Normal file
7
targets/device/avr/at90pwm316.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90PWM316.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 32;
|
||||
88
targets/device/avr/at90pwm316.s
Normal file
88
targets/device/avr/at90pwm316.s
Normal file
@@ -0,0 +1,88 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90PWM316.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_PSC2_CAPT
|
||||
jmp __vector_PSC2_EC
|
||||
jmp __vector_PSC1_CAPT
|
||||
jmp __vector_PSC1_EC
|
||||
jmp __vector_PSC0_CAPT
|
||||
jmp __vector_PSC0_EC
|
||||
jmp __vector_ANALOG_COMP_0
|
||||
jmp __vector_ANALOG_COMP_1
|
||||
jmp __vector_ANALOG_COMP_2
|
||||
jmp __vector_INT0
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_RESERVED15
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP_A
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_ADC
|
||||
jmp __vector_INT1
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART_RX
|
||||
jmp __vector_USART_UDRE
|
||||
jmp __vector_USART_TX
|
||||
jmp __vector_INT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_INT3
|
||||
jmp __vector_RESERVED30
|
||||
jmp __vector_RESERVED31
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_PSC2_CAPT
|
||||
IRQ __vector_PSC2_EC
|
||||
IRQ __vector_PSC1_CAPT
|
||||
IRQ __vector_PSC1_EC
|
||||
IRQ __vector_PSC0_CAPT
|
||||
IRQ __vector_PSC0_EC
|
||||
IRQ __vector_ANALOG_COMP_0
|
||||
IRQ __vector_ANALOG_COMP_1
|
||||
IRQ __vector_ANALOG_COMP_2
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_RESERVED15
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP_A
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RX
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TX
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_RESERVED30
|
||||
IRQ __vector_RESERVED31
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90pwm3b.ld
Normal file
7
targets/device/avr/at90pwm3b.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90PWM3B.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x2000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x200;
|
||||
__num_isrs = 32;
|
||||
88
targets/device/avr/at90pwm3b.s
Normal file
88
targets/device/avr/at90pwm3b.s
Normal file
@@ -0,0 +1,88 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90PWM3B.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
rjmp __vector_RESET
|
||||
rjmp __vector_PSC2_CAPT
|
||||
rjmp __vector_PSC2_EC
|
||||
rjmp __vector_PSC1_CAPT
|
||||
rjmp __vector_PSC1_EC
|
||||
rjmp __vector_PSC0_CAPT
|
||||
rjmp __vector_PSC0_EC
|
||||
rjmp __vector_ANALOG_COMP_0
|
||||
rjmp __vector_ANALOG_COMP_1
|
||||
rjmp __vector_ANALOG_COMP_2
|
||||
rjmp __vector_INT0
|
||||
rjmp __vector_TIMER1_CAPT
|
||||
rjmp __vector_TIMER1_COMPA
|
||||
rjmp __vector_TIMER1_COMPB
|
||||
rjmp __vector_RESERVED15
|
||||
rjmp __vector_TIMER1_OVF
|
||||
rjmp __vector_TIMER0_COMPA
|
||||
rjmp __vector_TIMER0_OVF
|
||||
rjmp __vector_ADC
|
||||
rjmp __vector_INT1
|
||||
rjmp __vector_SPI_STC
|
||||
rjmp __vector_USART_RX
|
||||
rjmp __vector_USART_UDRE
|
||||
rjmp __vector_USART_TX
|
||||
rjmp __vector_INT2
|
||||
rjmp __vector_WDT
|
||||
rjmp __vector_EE_READY
|
||||
rjmp __vector_TIMER0_COMPB
|
||||
rjmp __vector_INT3
|
||||
rjmp __vector_RESERVED30
|
||||
rjmp __vector_RESERVED31
|
||||
rjmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_PSC2_CAPT
|
||||
IRQ __vector_PSC2_EC
|
||||
IRQ __vector_PSC1_CAPT
|
||||
IRQ __vector_PSC1_EC
|
||||
IRQ __vector_PSC0_CAPT
|
||||
IRQ __vector_PSC0_EC
|
||||
IRQ __vector_ANALOG_COMP_0
|
||||
IRQ __vector_ANALOG_COMP_1
|
||||
IRQ __vector_ANALOG_COMP_2
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_RESERVED15
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RX
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TX
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_RESERVED30
|
||||
IRQ __vector_RESERVED31
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90pwm81.ld
Normal file
7
targets/device/avr/at90pwm81.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90PWM81.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x2000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x100;
|
||||
__num_isrs = 20;
|
||||
64
targets/device/avr/at90pwm81.s
Normal file
64
targets/device/avr/at90pwm81.s
Normal file
@@ -0,0 +1,64 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90PWM81.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
rjmp __vector_RESET
|
||||
rjmp __vector_PSC2_CAPT
|
||||
rjmp __vector_PSC2_EC
|
||||
rjmp __vector_PSC2_EEC
|
||||
rjmp __vector_PSC0_CAPT
|
||||
rjmp __vector_PSC0_EC
|
||||
rjmp __vector_PSC0_EEC
|
||||
rjmp __vector_ANALOG_COMP_1
|
||||
rjmp __vector_ANALOG_COMP_2
|
||||
rjmp __vector_ANALOG_COMP_3
|
||||
rjmp __vector_INT0
|
||||
rjmp __vector_TIMER1_CAPT
|
||||
rjmp __vector_TIMER1_OVF
|
||||
rjmp __vector_ADC
|
||||
rjmp __vector_INT1
|
||||
rjmp __vector_SPI_STC
|
||||
rjmp __vector_INT2
|
||||
rjmp __vector_WDT
|
||||
rjmp __vector_EE_READY
|
||||
rjmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_PSC2_CAPT
|
||||
IRQ __vector_PSC2_EC
|
||||
IRQ __vector_PSC2_EEC
|
||||
IRQ __vector_PSC0_CAPT
|
||||
IRQ __vector_PSC0_EC
|
||||
IRQ __vector_PSC0_EEC
|
||||
IRQ __vector_ANALOG_COMP_1
|
||||
IRQ __vector_ANALOG_COMP_2
|
||||
IRQ __vector_ANALOG_COMP_3
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90usb1286.ld
Normal file
7
targets/device/avr/at90usb1286.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90USB1286.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x2000;
|
||||
__num_isrs = 38;
|
||||
100
targets/device/avr/at90usb1286.s
Normal file
100
targets/device/avr/at90usb1286.s
Normal file
@@ -0,0 +1,100 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90USB1286.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_USB_GEN
|
||||
jmp __vector_USB_COM
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_USB_GEN
|
||||
IRQ __vector_USB_COM
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90usb1287.ld
Normal file
7
targets/device/avr/at90usb1287.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90USB1287.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x2000;
|
||||
__num_isrs = 38;
|
||||
100
targets/device/avr/at90usb1287.s
Normal file
100
targets/device/avr/at90usb1287.s
Normal file
@@ -0,0 +1,100 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90USB1287.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_USB_GEN
|
||||
jmp __vector_USB_COM
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_USB_GEN
|
||||
IRQ __vector_USB_COM
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90usb162.ld
Normal file
7
targets/device/avr/at90usb162.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90USB162.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x200;
|
||||
__num_isrs = 29;
|
||||
82
targets/device/avr/at90usb162.s
Normal file
82
targets/device/avr/at90usb162.s
Normal file
@@ -0,0 +1,82 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90USB162.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_USB_GEN
|
||||
jmp __vector_USB_COM
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_USB_GEN
|
||||
IRQ __vector_USB_COM
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90usb646.ld
Normal file
7
targets/device/avr/at90usb646.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90USB646.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x10000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x1000;
|
||||
__num_isrs = 38;
|
||||
100
targets/device/avr/at90usb646.s
Normal file
100
targets/device/avr/at90usb646.s
Normal file
@@ -0,0 +1,100 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90USB646.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_USB_GEN
|
||||
jmp __vector_USB_COM
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_USB_GEN
|
||||
IRQ __vector_USB_COM
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90usb647.ld
Normal file
7
targets/device/avr/at90usb647.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90USB647.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x10000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x1000;
|
||||
__num_isrs = 38;
|
||||
100
targets/device/avr/at90usb647.s
Normal file
100
targets/device/avr/at90usb647.s
Normal file
@@ -0,0 +1,100 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90USB647.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_USB_GEN
|
||||
jmp __vector_USB_COM
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_USB_GEN
|
||||
IRQ __vector_USB_COM
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/at90usb82.ld
Normal file
7
targets/device/avr/at90usb82.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from AT90USB82.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x2000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x200;
|
||||
__num_isrs = 29;
|
||||
82
targets/device/avr/at90usb82.s
Normal file
82
targets/device/avr/at90usb82.s
Normal file
@@ -0,0 +1,82 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from AT90USB82.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
rjmp __vector_RESET
|
||||
rjmp __vector_INT0
|
||||
rjmp __vector_INT1
|
||||
rjmp __vector_INT2
|
||||
rjmp __vector_INT3
|
||||
rjmp __vector_INT4
|
||||
rjmp __vector_INT5
|
||||
rjmp __vector_INT6
|
||||
rjmp __vector_INT7
|
||||
rjmp __vector_PCINT0
|
||||
rjmp __vector_PCINT1
|
||||
rjmp __vector_USB_GEN
|
||||
rjmp __vector_USB_COM
|
||||
rjmp __vector_WDT
|
||||
rjmp __vector_TIMER1_CAPT
|
||||
rjmp __vector_TIMER1_COMPA
|
||||
rjmp __vector_TIMER1_COMPB
|
||||
rjmp __vector_TIMER1_COMPC
|
||||
rjmp __vector_TIMER1_OVF
|
||||
rjmp __vector_TIMER0_COMPA
|
||||
rjmp __vector_TIMER0_COMPB
|
||||
rjmp __vector_TIMER0_OVF
|
||||
rjmp __vector_SPI_STC
|
||||
rjmp __vector_USART1_RX
|
||||
rjmp __vector_USART1_UDRE
|
||||
rjmp __vector_USART1_TX
|
||||
rjmp __vector_ANALOG_COMP
|
||||
rjmp __vector_EE_READY
|
||||
rjmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_USB_GEN
|
||||
IRQ __vector_USB_COM
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/atmega128.ld
Normal file
7
targets/device/avr/atmega128.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega128.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x1000;
|
||||
__num_isrs = 35;
|
||||
94
targets/device/avr/atmega128.s
Normal file
94
targets/device/avr/atmega128.s
Normal file
@@ -0,0 +1,94 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega128.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/atmega1280.ld
Normal file
7
targets/device/avr/atmega1280.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega1280.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x200;
|
||||
__ram_size = 0x2000;
|
||||
__num_isrs = 57;
|
||||
138
targets/device/avr/atmega1280.s
Normal file
138
targets/device/avr/atmega1280.s
Normal file
@@ -0,0 +1,138 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega1280.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_TIMER4_CAPT
|
||||
jmp __vector_TIMER4_COMPA
|
||||
jmp __vector_TIMER4_COMPB
|
||||
jmp __vector_TIMER4_COMPC
|
||||
jmp __vector_TIMER4_OVF
|
||||
jmp __vector_TIMER5_CAPT
|
||||
jmp __vector_TIMER5_COMPA
|
||||
jmp __vector_TIMER5_COMPB
|
||||
jmp __vector_TIMER5_COMPC
|
||||
jmp __vector_TIMER5_OVF
|
||||
jmp __vector_USART2_RX
|
||||
jmp __vector_USART2_UDRE
|
||||
jmp __vector_USART2_TX
|
||||
jmp __vector_USART3_RX
|
||||
jmp __vector_USART3_UDRE
|
||||
jmp __vector_USART3_TX
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_TIMER4_CAPT
|
||||
IRQ __vector_TIMER4_COMPA
|
||||
IRQ __vector_TIMER4_COMPB
|
||||
IRQ __vector_TIMER4_COMPC
|
||||
IRQ __vector_TIMER4_OVF
|
||||
IRQ __vector_TIMER5_CAPT
|
||||
IRQ __vector_TIMER5_COMPA
|
||||
IRQ __vector_TIMER5_COMPB
|
||||
IRQ __vector_TIMER5_COMPC
|
||||
IRQ __vector_TIMER5_OVF
|
||||
IRQ __vector_USART2_RX
|
||||
IRQ __vector_USART2_UDRE
|
||||
IRQ __vector_USART2_TX
|
||||
IRQ __vector_USART3_RX
|
||||
IRQ __vector_USART3_UDRE
|
||||
IRQ __vector_USART3_TX
|
||||
7
targets/device/avr/atmega1281.ld
Normal file
7
targets/device/avr/atmega1281.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega1281.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x200;
|
||||
__ram_size = 0x2000;
|
||||
__num_isrs = 57;
|
||||
138
targets/device/avr/atmega1281.s
Normal file
138
targets/device/avr/atmega1281.s
Normal file
@@ -0,0 +1,138 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega1281.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_TIMER4_CAPT
|
||||
jmp __vector_TIMER4_COMPA
|
||||
jmp __vector_TIMER4_COMPB
|
||||
jmp __vector_TIMER4_COMPC
|
||||
jmp __vector_TIMER4_OVF
|
||||
jmp __vector_TIMER5_CAPT
|
||||
jmp __vector_TIMER5_COMPA
|
||||
jmp __vector_TIMER5_COMPB
|
||||
jmp __vector_TIMER5_COMPC
|
||||
jmp __vector_TIMER5_OVF
|
||||
jmp __vector_USART2_RX
|
||||
jmp __vector_USART2_UDRE
|
||||
jmp __vector_USART2_TX
|
||||
jmp __vector_USART3_RX
|
||||
jmp __vector_USART3_UDRE
|
||||
jmp __vector_USART3_TX
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_TIMER4_CAPT
|
||||
IRQ __vector_TIMER4_COMPA
|
||||
IRQ __vector_TIMER4_COMPB
|
||||
IRQ __vector_TIMER4_COMPC
|
||||
IRQ __vector_TIMER4_OVF
|
||||
IRQ __vector_TIMER5_CAPT
|
||||
IRQ __vector_TIMER5_COMPA
|
||||
IRQ __vector_TIMER5_COMPB
|
||||
IRQ __vector_TIMER5_COMPC
|
||||
IRQ __vector_TIMER5_OVF
|
||||
IRQ __vector_USART2_RX
|
||||
IRQ __vector_USART2_UDRE
|
||||
IRQ __vector_USART2_TX
|
||||
IRQ __vector_USART3_RX
|
||||
IRQ __vector_USART3_UDRE
|
||||
IRQ __vector_USART3_TX
|
||||
7
targets/device/avr/atmega1284.ld
Normal file
7
targets/device/avr/atmega1284.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega1284.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x4000;
|
||||
__num_isrs = 35;
|
||||
94
targets/device/avr/atmega1284.s
Normal file
94
targets/device/avr/atmega1284.s
Normal file
@@ -0,0 +1,94 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega1284.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_PCINT3
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_OVF
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_PCINT3
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_OVF
|
||||
7
targets/device/avr/atmega1284p.ld
Normal file
7
targets/device/avr/atmega1284p.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega1284P.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x4000;
|
||||
__num_isrs = 35;
|
||||
94
targets/device/avr/atmega1284p.s
Normal file
94
targets/device/avr/atmega1284p.s
Normal file
@@ -0,0 +1,94 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega1284P.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_PCINT3
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_OVF
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_PCINT3
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_OVF
|
||||
7
targets/device/avr/atmega1284rfr2.ld
Normal file
7
targets/device/avr/atmega1284rfr2.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega1284RFR2.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x200;
|
||||
__ram_size = 0x4000;
|
||||
__num_isrs = 71;
|
||||
172
targets/device/avr/atmega1284rfr2.s
Normal file
172
targets/device/avr/atmega1284rfr2.s
Normal file
@@ -0,0 +1,172 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega1284RFR2.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_TIMER4_CAPT
|
||||
jmp __vector_TIMER4_COMPA
|
||||
jmp __vector_TIMER4_COMPB
|
||||
jmp __vector_TIMER4_COMPC
|
||||
jmp __vector_TIMER4_OVF
|
||||
jmp __vector_TIMER5_CAPT
|
||||
jmp __vector_TIMER5_COMPA
|
||||
jmp __vector_TIMER5_COMPB
|
||||
jmp __vector_TIMER5_COMPC
|
||||
jmp __vector_TIMER5_OVF
|
||||
jmp __vector_default
|
||||
jmp __vector_default
|
||||
jmp __vector_default
|
||||
jmp __vector_default
|
||||
jmp __vector_default
|
||||
jmp __vector_default
|
||||
jmp __vector_TRX24_PLL_LOCK
|
||||
jmp __vector_TRX24_PLL_UNLOCK
|
||||
jmp __vector_TRX24_RX_START
|
||||
jmp __vector_TRX24_RX_END
|
||||
jmp __vector_TRX24_CCA_ED_DONE
|
||||
jmp __vector_TRX24_XAH_AMI
|
||||
jmp __vector_TRX24_TX_END
|
||||
jmp __vector_TRX24_AWAKE
|
||||
jmp __vector_SCNT_CMP1
|
||||
jmp __vector_SCNT_CMP2
|
||||
jmp __vector_SCNT_CMP3
|
||||
jmp __vector_SCNT_OVFL
|
||||
jmp __vector_SCNT_BACKOFF
|
||||
jmp __vector_AES_READY
|
||||
jmp __vector_BAT_LOW
|
||||
jmp __vector_TRX24_TX_START
|
||||
jmp __vector_TRX24_AMI0
|
||||
jmp __vector_TRX24_AMI1
|
||||
jmp __vector_TRX24_AMI2
|
||||
jmp __vector_TRX24_AMI3
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_TIMER4_CAPT
|
||||
IRQ __vector_TIMER4_COMPA
|
||||
IRQ __vector_TIMER4_COMPB
|
||||
IRQ __vector_TIMER4_COMPC
|
||||
IRQ __vector_TIMER4_OVF
|
||||
IRQ __vector_TIMER5_CAPT
|
||||
IRQ __vector_TIMER5_COMPA
|
||||
IRQ __vector_TIMER5_COMPB
|
||||
IRQ __vector_TIMER5_COMPC
|
||||
IRQ __vector_TIMER5_OVF
|
||||
IRQ __vector_TRX24_PLL_LOCK
|
||||
IRQ __vector_TRX24_PLL_UNLOCK
|
||||
IRQ __vector_TRX24_RX_START
|
||||
IRQ __vector_TRX24_RX_END
|
||||
IRQ __vector_TRX24_CCA_ED_DONE
|
||||
IRQ __vector_TRX24_XAH_AMI
|
||||
IRQ __vector_TRX24_TX_END
|
||||
IRQ __vector_TRX24_AWAKE
|
||||
IRQ __vector_SCNT_CMP1
|
||||
IRQ __vector_SCNT_CMP2
|
||||
IRQ __vector_SCNT_CMP3
|
||||
IRQ __vector_SCNT_OVFL
|
||||
IRQ __vector_SCNT_BACKOFF
|
||||
IRQ __vector_AES_READY
|
||||
IRQ __vector_BAT_LOW
|
||||
IRQ __vector_TRX24_TX_START
|
||||
IRQ __vector_TRX24_AMI0
|
||||
IRQ __vector_TRX24_AMI1
|
||||
IRQ __vector_TRX24_AMI2
|
||||
IRQ __vector_TRX24_AMI3
|
||||
7
targets/device/avr/atmega128a.ld
Normal file
7
targets/device/avr/atmega128a.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega128A.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x1000;
|
||||
__num_isrs = 35;
|
||||
94
targets/device/avr/atmega128a.s
Normal file
94
targets/device/avr/atmega128a.s
Normal file
@@ -0,0 +1,94 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega128A.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/atmega128rfa1.ld
Normal file
7
targets/device/avr/atmega128rfa1.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega128RFA1.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x200;
|
||||
__ram_size = 0x4000;
|
||||
__num_isrs = 72;
|
||||
168
targets/device/avr/atmega128rfa1.s
Normal file
168
targets/device/avr/atmega128rfa1.s
Normal file
@@ -0,0 +1,168 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega128RFA1.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_TIMER4_CAPT
|
||||
jmp __vector_TIMER4_COMPA
|
||||
jmp __vector_TIMER4_COMPB
|
||||
jmp __vector_TIMER4_COMPC
|
||||
jmp __vector_TIMER4_OVF
|
||||
jmp __vector_TIMER5_CAPT
|
||||
jmp __vector_TIMER5_COMPA
|
||||
jmp __vector_TIMER5_COMPB
|
||||
jmp __vector_TIMER5_COMPC
|
||||
jmp __vector_TIMER5_OVF
|
||||
jmp __vector_USART2_RX
|
||||
jmp __vector_USART2_UDRE
|
||||
jmp __vector_USART2_TX
|
||||
jmp __vector_USART3_RX
|
||||
jmp __vector_USART3_UDRE
|
||||
jmp __vector_USART3_TX
|
||||
jmp __vector_TRX24_PLL_LOCK
|
||||
jmp __vector_TRX24_PLL_UNLOCK
|
||||
jmp __vector_TRX24_RX_START
|
||||
jmp __vector_TRX24_RX_END
|
||||
jmp __vector_TRX24_CCA_ED_DONE
|
||||
jmp __vector_TRX24_XAH_AMI
|
||||
jmp __vector_TRX24_TX_END
|
||||
jmp __vector_TRX24_AWAKE
|
||||
jmp __vector_SCNT_CMP1
|
||||
jmp __vector_SCNT_CMP2
|
||||
jmp __vector_SCNT_CMP3
|
||||
jmp __vector_SCNT_OVFL
|
||||
jmp __vector_SCNT_BACKOFF
|
||||
jmp __vector_AES_READY
|
||||
jmp __vector_BAT_LOW
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_TIMER4_CAPT
|
||||
IRQ __vector_TIMER4_COMPA
|
||||
IRQ __vector_TIMER4_COMPB
|
||||
IRQ __vector_TIMER4_COMPC
|
||||
IRQ __vector_TIMER4_OVF
|
||||
IRQ __vector_TIMER5_CAPT
|
||||
IRQ __vector_TIMER5_COMPA
|
||||
IRQ __vector_TIMER5_COMPB
|
||||
IRQ __vector_TIMER5_COMPC
|
||||
IRQ __vector_TIMER5_OVF
|
||||
IRQ __vector_USART2_RX
|
||||
IRQ __vector_USART2_UDRE
|
||||
IRQ __vector_USART2_TX
|
||||
IRQ __vector_USART3_RX
|
||||
IRQ __vector_USART3_UDRE
|
||||
IRQ __vector_USART3_TX
|
||||
IRQ __vector_TRX24_PLL_LOCK
|
||||
IRQ __vector_TRX24_PLL_UNLOCK
|
||||
IRQ __vector_TRX24_RX_START
|
||||
IRQ __vector_TRX24_RX_END
|
||||
IRQ __vector_TRX24_CCA_ED_DONE
|
||||
IRQ __vector_TRX24_XAH_AMI
|
||||
IRQ __vector_TRX24_TX_END
|
||||
IRQ __vector_TRX24_AWAKE
|
||||
IRQ __vector_SCNT_CMP1
|
||||
IRQ __vector_SCNT_CMP2
|
||||
IRQ __vector_SCNT_CMP3
|
||||
IRQ __vector_SCNT_OVFL
|
||||
IRQ __vector_SCNT_BACKOFF
|
||||
IRQ __vector_AES_READY
|
||||
IRQ __vector_BAT_LOW
|
||||
7
targets/device/avr/atmega128rfr2.ld
Normal file
7
targets/device/avr/atmega128rfr2.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega128RFR2.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x20000;
|
||||
__ram_start = 0x200;
|
||||
__ram_size = 0x4000;
|
||||
__num_isrs = 71;
|
||||
172
targets/device/avr/atmega128rfr2.s
Normal file
172
targets/device/avr/atmega128rfr2.s
Normal file
@@ -0,0 +1,172 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega128RFR2.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_INT3
|
||||
jmp __vector_INT4
|
||||
jmp __vector_INT5
|
||||
jmp __vector_INT6
|
||||
jmp __vector_INT7
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_COMPC
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_COMPC
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_TIMER4_CAPT
|
||||
jmp __vector_TIMER4_COMPA
|
||||
jmp __vector_TIMER4_COMPB
|
||||
jmp __vector_TIMER4_COMPC
|
||||
jmp __vector_TIMER4_OVF
|
||||
jmp __vector_TIMER5_CAPT
|
||||
jmp __vector_TIMER5_COMPA
|
||||
jmp __vector_TIMER5_COMPB
|
||||
jmp __vector_TIMER5_COMPC
|
||||
jmp __vector_TIMER5_OVF
|
||||
jmp __vector_default
|
||||
jmp __vector_default
|
||||
jmp __vector_default
|
||||
jmp __vector_default
|
||||
jmp __vector_default
|
||||
jmp __vector_default
|
||||
jmp __vector_TRX24_PLL_LOCK
|
||||
jmp __vector_TRX24_PLL_UNLOCK
|
||||
jmp __vector_TRX24_RX_START
|
||||
jmp __vector_TRX24_RX_END
|
||||
jmp __vector_TRX24_CCA_ED_DONE
|
||||
jmp __vector_TRX24_XAH_AMI
|
||||
jmp __vector_TRX24_TX_END
|
||||
jmp __vector_TRX24_AWAKE
|
||||
jmp __vector_SCNT_CMP1
|
||||
jmp __vector_SCNT_CMP2
|
||||
jmp __vector_SCNT_CMP3
|
||||
jmp __vector_SCNT_OVFL
|
||||
jmp __vector_SCNT_BACKOFF
|
||||
jmp __vector_AES_READY
|
||||
jmp __vector_BAT_LOW
|
||||
jmp __vector_TRX24_TX_START
|
||||
jmp __vector_TRX24_AMI0
|
||||
jmp __vector_TRX24_AMI1
|
||||
jmp __vector_TRX24_AMI2
|
||||
jmp __vector_TRX24_AMI3
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_INT3
|
||||
IRQ __vector_INT4
|
||||
IRQ __vector_INT5
|
||||
IRQ __vector_INT6
|
||||
IRQ __vector_INT7
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_COMPC
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_COMPC
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_TIMER4_CAPT
|
||||
IRQ __vector_TIMER4_COMPA
|
||||
IRQ __vector_TIMER4_COMPB
|
||||
IRQ __vector_TIMER4_COMPC
|
||||
IRQ __vector_TIMER4_OVF
|
||||
IRQ __vector_TIMER5_CAPT
|
||||
IRQ __vector_TIMER5_COMPA
|
||||
IRQ __vector_TIMER5_COMPB
|
||||
IRQ __vector_TIMER5_COMPC
|
||||
IRQ __vector_TIMER5_OVF
|
||||
IRQ __vector_TRX24_PLL_LOCK
|
||||
IRQ __vector_TRX24_PLL_UNLOCK
|
||||
IRQ __vector_TRX24_RX_START
|
||||
IRQ __vector_TRX24_RX_END
|
||||
IRQ __vector_TRX24_CCA_ED_DONE
|
||||
IRQ __vector_TRX24_XAH_AMI
|
||||
IRQ __vector_TRX24_TX_END
|
||||
IRQ __vector_TRX24_AWAKE
|
||||
IRQ __vector_SCNT_CMP1
|
||||
IRQ __vector_SCNT_CMP2
|
||||
IRQ __vector_SCNT_CMP3
|
||||
IRQ __vector_SCNT_OVFL
|
||||
IRQ __vector_SCNT_BACKOFF
|
||||
IRQ __vector_AES_READY
|
||||
IRQ __vector_BAT_LOW
|
||||
IRQ __vector_TRX24_TX_START
|
||||
IRQ __vector_TRX24_AMI0
|
||||
IRQ __vector_TRX24_AMI1
|
||||
IRQ __vector_TRX24_AMI2
|
||||
IRQ __vector_TRX24_AMI3
|
||||
7
targets/device/avr/atmega16.ld
Normal file
7
targets/device/avr/atmega16.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega16.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x60;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 21;
|
||||
66
targets/device/avr/atmega16.s
Normal file
66
targets/device/avr/atmega16.s
Normal file
@@ -0,0 +1,66 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega16.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART_RXC
|
||||
jmp __vector_USART_UDRE
|
||||
jmp __vector_USART_TXC
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_RDY
|
||||
jmp __vector_ANA_COMP
|
||||
jmp __vector_TWI
|
||||
jmp __vector_INT2
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_SPM_RDY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RXC
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TXC
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_RDY
|
||||
IRQ __vector_ANA_COMP
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_SPM_RDY
|
||||
7
targets/device/avr/atmega162.ld
Normal file
7
targets/device/avr/atmega162.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega162.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 28;
|
||||
80
targets/device/avr/atmega162.s
Normal file
80
targets/device/avr/atmega162.s
Normal file
@@ -0,0 +1,80 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega162.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_TIMER3_CAPT
|
||||
jmp __vector_TIMER3_COMPA
|
||||
jmp __vector_TIMER3_COMPB
|
||||
jmp __vector_TIMER3_OVF
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RXC
|
||||
jmp __vector_USART1_RXC
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART0_TXC
|
||||
jmp __vector_USART1_TXC
|
||||
jmp __vector_EE_RDY
|
||||
jmp __vector_ANA_COMP
|
||||
jmp __vector_SPM_RDY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_TIMER3_CAPT
|
||||
IRQ __vector_TIMER3_COMPA
|
||||
IRQ __vector_TIMER3_COMPB
|
||||
IRQ __vector_TIMER3_OVF
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RXC
|
||||
IRQ __vector_USART1_RXC
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART0_TXC
|
||||
IRQ __vector_USART1_TXC
|
||||
IRQ __vector_EE_RDY
|
||||
IRQ __vector_ANA_COMP
|
||||
IRQ __vector_SPM_RDY
|
||||
7
targets/device/avr/atmega164a.ld
Normal file
7
targets/device/avr/atmega164a.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega164A.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 31;
|
||||
86
targets/device/avr/atmega164a.s
Normal file
86
targets/device/avr/atmega164a.s
Normal file
@@ -0,0 +1,86 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega164A.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_PCINT3
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_PCINT3
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
7
targets/device/avr/atmega164p.ld
Normal file
7
targets/device/avr/atmega164p.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega164P.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 31;
|
||||
86
targets/device/avr/atmega164p.s
Normal file
86
targets/device/avr/atmega164p.s
Normal file
@@ -0,0 +1,86 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega164P.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_PCINT3
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_PCINT3
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
7
targets/device/avr/atmega164pa.ld
Normal file
7
targets/device/avr/atmega164pa.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega164PA.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 31;
|
||||
86
targets/device/avr/atmega164pa.s
Normal file
86
targets/device/avr/atmega164pa.s
Normal file
@@ -0,0 +1,86 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega164PA.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_INT2
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_PCINT3
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_USART1_RX
|
||||
jmp __vector_USART1_UDRE
|
||||
jmp __vector_USART1_TX
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_INT2
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_PCINT3
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_USART1_RX
|
||||
IRQ __vector_USART1_UDRE
|
||||
IRQ __vector_USART1_TX
|
||||
7
targets/device/avr/atmega165a.ld
Normal file
7
targets/device/avr/atmega165a.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega165A.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 22;
|
||||
68
targets/device/avr/atmega165a.s
Normal file
68
targets/device/avr/atmega165a.s
Normal file
@@ -0,0 +1,68 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega165A.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_USI_START
|
||||
jmp __vector_USI_OVERFLOW
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_USI_START
|
||||
IRQ __vector_USI_OVERFLOW
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/atmega165p.ld
Normal file
7
targets/device/avr/atmega165p.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega165P.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 22;
|
||||
68
targets/device/avr/atmega165p.s
Normal file
68
targets/device/avr/atmega165p.s
Normal file
@@ -0,0 +1,68 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega165P.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_USI_START
|
||||
jmp __vector_USI_OVERFLOW
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_USI_START
|
||||
IRQ __vector_USI_OVERFLOW
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/atmega165pa.ld
Normal file
7
targets/device/avr/atmega165pa.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega165PA.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 22;
|
||||
68
targets/device/avr/atmega165pa.s
Normal file
68
targets/device/avr/atmega165pa.s
Normal file
@@ -0,0 +1,68 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega165PA.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_USI_START
|
||||
jmp __vector_USI_OVERFLOW
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_USI_START
|
||||
IRQ __vector_USI_OVERFLOW
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/atmega168.ld
Normal file
7
targets/device/avr/atmega168.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega168.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 26;
|
||||
76
targets/device/avr/atmega168.s
Normal file
76
targets/device/avr/atmega168.s
Normal file
@@ -0,0 +1,76 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega168.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART_RX
|
||||
jmp __vector_USART_UDRE
|
||||
jmp __vector_USART_TX
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_READY
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RX
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TX
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_READY
|
||||
7
targets/device/avr/atmega168a.ld
Normal file
7
targets/device/avr/atmega168a.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega168A.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 26;
|
||||
76
targets/device/avr/atmega168a.s
Normal file
76
targets/device/avr/atmega168a.s
Normal file
@@ -0,0 +1,76 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega168A.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART_RX
|
||||
jmp __vector_USART_UDRE
|
||||
jmp __vector_USART_TX
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_Ready
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RX
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TX
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_Ready
|
||||
7
targets/device/avr/atmega168p.ld
Normal file
7
targets/device/avr/atmega168p.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega168P.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 26;
|
||||
76
targets/device/avr/atmega168p.s
Normal file
76
targets/device/avr/atmega168p.s
Normal file
@@ -0,0 +1,76 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega168P.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART_RX
|
||||
jmp __vector_USART_UDRE
|
||||
jmp __vector_USART_TX
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_Ready
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RX
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TX
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_Ready
|
||||
7
targets/device/avr/atmega168pa.ld
Normal file
7
targets/device/avr/atmega168pa.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega168PA.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 26;
|
||||
76
targets/device/avr/atmega168pa.s
Normal file
76
targets/device/avr/atmega168pa.s
Normal file
@@ -0,0 +1,76 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega168PA.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART_RX
|
||||
jmp __vector_USART_UDRE
|
||||
jmp __vector_USART_TX
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_Ready
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RX
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TX
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_Ready
|
||||
7
targets/device/avr/atmega168pb.ld
Normal file
7
targets/device/avr/atmega168pb.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega168PB.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 27;
|
||||
78
targets/device/avr/atmega168pb.s
Normal file
78
targets/device/avr/atmega168pb.s
Normal file
@@ -0,0 +1,78 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega168PB.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_INT1
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_PCINT2
|
||||
jmp __vector_WDT
|
||||
jmp __vector_TIMER2_COMPA
|
||||
jmp __vector_TIMER2_COMPB
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMPA
|
||||
jmp __vector_TIMER0_COMPB
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART_RX
|
||||
jmp __vector_USART_UDRE
|
||||
jmp __vector_USART_TX
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_TWI
|
||||
jmp __vector_SPM_Ready
|
||||
jmp __vector_USART_START
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_INT1
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_PCINT2
|
||||
IRQ __vector_WDT
|
||||
IRQ __vector_TIMER2_COMPA
|
||||
IRQ __vector_TIMER2_COMPB
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMPA
|
||||
IRQ __vector_TIMER0_COMPB
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART_RX
|
||||
IRQ __vector_USART_UDRE
|
||||
IRQ __vector_USART_TX
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_TWI
|
||||
IRQ __vector_SPM_Ready
|
||||
IRQ __vector_USART_START
|
||||
7
targets/device/avr/atmega169a.ld
Normal file
7
targets/device/avr/atmega169a.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega169A.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 23;
|
||||
70
targets/device/avr/atmega169a.s
Normal file
70
targets/device/avr/atmega169a.s
Normal file
@@ -0,0 +1,70 @@
|
||||
; Automatically generated file. DO NOT EDIT.
|
||||
; Generated by gen-device-avr.go from ATmega169A.atdf, see http://packs.download.atmel.com/
|
||||
|
||||
; This is the default handler for interrupts, if triggered but not defined.
|
||||
; Sleep inside so that an accidentally triggered interrupt won't drain the
|
||||
; battery of a battery-powered device.
|
||||
.section .text.__vector_default
|
||||
.global __vector_default
|
||||
__vector_default:
|
||||
sleep
|
||||
rjmp __vector_default
|
||||
|
||||
; Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, __vector_default
|
||||
.endm
|
||||
|
||||
; The interrupt vector of this device. Must be placed at address 0 by the linker.
|
||||
.section .vectors, "a", %progbits
|
||||
.global __vectors
|
||||
jmp __vector_RESET
|
||||
jmp __vector_INT0
|
||||
jmp __vector_PCINT0
|
||||
jmp __vector_PCINT1
|
||||
jmp __vector_TIMER2_COMP
|
||||
jmp __vector_TIMER2_OVF
|
||||
jmp __vector_TIMER1_CAPT
|
||||
jmp __vector_TIMER1_COMPA
|
||||
jmp __vector_TIMER1_COMPB
|
||||
jmp __vector_TIMER1_OVF
|
||||
jmp __vector_TIMER0_COMP
|
||||
jmp __vector_TIMER0_OVF
|
||||
jmp __vector_SPI_STC
|
||||
jmp __vector_USART0_RX
|
||||
jmp __vector_USART0_UDRE
|
||||
jmp __vector_USART0_TX
|
||||
jmp __vector_USI_START
|
||||
jmp __vector_USI_OVERFLOW
|
||||
jmp __vector_ANALOG_COMP
|
||||
jmp __vector_ADC
|
||||
jmp __vector_EE_READY
|
||||
jmp __vector_SPM_READY
|
||||
jmp __vector_LCD
|
||||
|
||||
; Define default implementations for interrupts, redirecting to
|
||||
; __vector_default when not implemented.
|
||||
IRQ __vector_RESET
|
||||
IRQ __vector_INT0
|
||||
IRQ __vector_PCINT0
|
||||
IRQ __vector_PCINT1
|
||||
IRQ __vector_TIMER2_COMP
|
||||
IRQ __vector_TIMER2_OVF
|
||||
IRQ __vector_TIMER1_CAPT
|
||||
IRQ __vector_TIMER1_COMPA
|
||||
IRQ __vector_TIMER1_COMPB
|
||||
IRQ __vector_TIMER1_OVF
|
||||
IRQ __vector_TIMER0_COMP
|
||||
IRQ __vector_TIMER0_OVF
|
||||
IRQ __vector_SPI_STC
|
||||
IRQ __vector_USART0_RX
|
||||
IRQ __vector_USART0_UDRE
|
||||
IRQ __vector_USART0_TX
|
||||
IRQ __vector_USI_START
|
||||
IRQ __vector_USI_OVERFLOW
|
||||
IRQ __vector_ANALOG_COMP
|
||||
IRQ __vector_ADC
|
||||
IRQ __vector_EE_READY
|
||||
IRQ __vector_SPM_READY
|
||||
IRQ __vector_LCD
|
||||
7
targets/device/avr/atmega169p.ld
Normal file
7
targets/device/avr/atmega169p.ld
Normal file
@@ -0,0 +1,7 @@
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device-avr.go from ATmega169P.atdf, see http://packs.download.atmel.com/ */
|
||||
|
||||
__flash_size = 0x4000;
|
||||
__ram_start = 0x100;
|
||||
__ram_size = 0x400;
|
||||
__num_isrs = 23;
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user