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411 Commits

Author SHA1 Message Date
Yandong Lin
fad0868986 feat[rk_mpi_cmd]: Merge cmds from mpp_interface 
Change-Id: I6550486d6efbac43d6f30cdb6dfefa75a93a437d
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2025-01-16 15:04:18 +08:00
Yandong Lin
fc2a997a58 fix[mpp_enc_cfg]: Remove a redundant atr_str 
Change-Id: I7553fcf8a7014ce3c2a13b1fd923ac91d78fb9d3
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2025-01-16 06:19:31 +00:00
Herman Chen
f0ff240b87 feat[mpp_meta]: Use trie to index the meta key 
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I634d447223e6e9d268642798a4fb0d11ad32cfb0
 2025-01-13 17:41:51 +08:00
Yandong Lin
7939be1246 refactor[mpp_enc_cfg]: Adjust cu_qp_delta_depth 
sync from mpp_interface

Change-Id: I2dfabef3acf01566df289396678a433ac84f3a15
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2025-01-09 06:17:45 +00:00
Yandong Lin
2cb69a2860 fix[mpp_enc_cfg]: Add sao_bit_ratio from mpp_interface 
Change-Id: Iba92fdd0052e661b74d747f921dfe25d5a408cd1
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2025-01-09 03:32:10 +00:00
Yandong Lin
e447e0763e feat[mpp_enc_cfg]: Merge enc cfgs from mpp_interface 
Change-Id: Ie08d9a26129096634b61fe60a10517efe0807180
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2025-01-07 17:04:12 +08:00
Hongjin Li
07bef12867 feat[mpp_sys_cfg_st]: Provide packaging for use on products 
Change-Id: I41bbd28f4aabce5ba3735a47e65ccb71997262a2
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
 2025-01-03 08:42:22 +00:00
Yandong Lin
47fbbe7436 feat[mpp_venc_kcfg]: Add mpp_venc_kcfg module 
Change-Id: I67acff6efbfa9ec1c35c3bdc8252b4047e5c9f75
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2025-01-03 14:08:00 +08:00
Johnson Ding
b4efbdf9b7 feat[enc]: Add switch for disable IDR encoding when FPS changed. 
1. No need to encode IDR when fps_in is changed. So remove it from
`check_resend_hdr`
2. If application do not want any IDR encoded when only fps is changed,
    call `mpp_enc_cfg_s32(cfg, "rc:fps_chg_no_idr", 0);` when
    initializing.
3. Keeping CPB when only SPS, PPS are updated without IDR encoded for
H.264 encoder.

Change-Id: I034dd789a3f24318004d942624eb10240f7db2e9
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2024-12-25 09:41:11 +08:00
Herman Chen
78ad332e7e feat[mpp_sys_cfg]: Add mpp_sys_cfg function 
MppSysCfg is used to config and query mpp gloabl parameters.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Change-Id: I132746e07b55040b582878adaef209ce73147da1
 2024-12-18 15:54:03 +08:00
Hongjin Li
4db00f4c80 fix[vpu_legacy]: Fix vpu fbc configuration issue 
Platform: General

Error case:
When info changing, setting the output format to fbc
causes buffer usage exceptions.

Solution:
Add the MPP_DEC_SET_FRAME_INFO command.

From: Product Department 2 czl

Change-Id: I779ca93b461bf220d64e3d4846128ce2f67ffc89
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
 2024-12-13 11:27:26 +08:00
Herman Chen
1cbb6a2527 fix[misc]: Fix compile on 32bit platform 
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I5175ed62993116a58e879d434db6b1b94747f605
 2024-12-05 10:33:46 +08:00
Herman Chen
f7a92432d1 feat[rk_type.h]: Add kernel driver compat define 
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I9a7916d9219c97a4ce121928adf929603c9c65d4
 2024-12-03 17:50:11 +08:00
Rimon Xu
5a8e1fa682 feat[mpp_dec]: add control for select codec device 
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
Change-Id: I55cbbf1e2a2b4693325a27af83ae76020d6f4ac2
 2024-11-29 15:08:06 +08:00
Xingwen Fang
ab45161834 feat[vpu_api]: Support configuration to disable decoding errors 
Signed-off-by: Xingwen Fang <fxw@rock-chips.com>
Change-Id: I9f01c5092c02dc5ff36f27ca1c8eeaf503d0fa17
 2024-10-14 11:50:40 +08:00
Yanjun Liao
bbe1a74bde feat[enc]: Support use frame meta to cfg pskip 
Use case:
mpp_meta_set_s32(meta, KEY_INPUT_PSKIP, 1);

Change-Id: I823f46e221b67d23bfbd250e7683b357ead988ab
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-10-12 15:54:12 +08:00
Tingjin Huang
179122cc99 fix[tune]: Replace qpmap_en with deblur_en 
Deblur_en is more generic for upper application.

Change-Id: Ibe4e0f81851fdbbe8fb8b7d840a4a9380e0403b1
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-09-29 09:46:19 +08:00
Tingjin Huang
01dee1b7d4 feat[vepu580]: Optimization to improve VMAF 
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
Change-Id: Idaecf9a402aa9b87802d76911abb816e0dc557ec
 2024-08-29 10:04:03 +08:00
Tingjin Huang
e03714e193 feat[vepu580]: Add qpmap and rc container interface 
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
Change-Id: I9fb0683008880a2e025664052a64d290730e6b49
 2024-08-29 10:04:03 +08:00
liming.lou
1bb6ff8993 feat[vepu510]: Sync code from enc_tune branch 
1. Design 8 mode for smear
2. Adjust atf_e and atr_e switch
3. Adjust aq thd and aq qp delta
4. Modify appropriate parameters for smear
5. Add sao atr atl configure interface

Change-Id: I0afb7e3d920dddfd33ea8d81fcbda5dd0d6801d3
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-08-27 10:23:33 +08:00
toby.zhang
03696728e1 feat[vepu510]: Sync code from enc_tune branch 
1. Add anti-line tuning
2. Adjust AQ assignment
3. Add smart encoding
4. Add deblur/qpmap routine
5. Add atf & four level intensity control atf
6. Add atr anti_blur function
7. Add real time bitrate output
8. Add smear buffer for vepu510

Change-Id: Iae661686f6adacd0b5ec57c102c184e2537dfc7d
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-08-27 10:23:23 +08:00
toby.zhang
02095f66d3 feat[vepu510]: Sync code from enc_tune branch 
1. Add cu_qp_delta_depth cfg
2. Configure AQ regs for H.265
3. Configure regs according to scene mode
4. Support fixed frame level QP
5. Add RDO lambda table index
6. Update stat info for HEVC
7. Add tuning code for H.264 encoder

Change-Id: Id7dae4ed55e1b94622aee72cfce8f24c833d00e1
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-08-27 10:08:49 +08:00
Yanjun Liao
fa97ca3dba feat[h265e]: Support force mark & use ltr 
Change-Id: Ied10ca664f149a75ebc02733f884ffeb41449c4f
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-07-16 09:55:38 +08:00
xueman.ruan
36e263402a fix[hal_h264e]: fix segment err when encode tsvc 
update segment info after amend stream

Change-Id: I6dc1ace0bcd58746f3fd0755c980e22482219f3d
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
 2024-06-13 09:17:12 +08:00
Yanjun Liao
293f61a8f6 feat[enc_265]: Support get Largest Code Unit size 
Case: mpp_enc_cfg_get_s32(p->cfg, "h265:lcu_size", &lcu_size);

Change-Id: I8f284b77b465377f600cb3449d0012edd5a64098
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-05-24 15:19:56 +08:00
Chen Jinsen
d0a06d0bed feat[mpp_dec_cfg]: Add disable dpb check config 
Change-Id: Ib93948bed0547bec9b2805f9f0e73d83b56226a7
Signed-off-by: Chen Jinsen <kevin.chen@rock-chips.com>
 2024-05-15 14:19:52 +08:00
Chandler Chen
0a9509431f feat[vdpu383]: support 8K downscale mode 
Now there are 2 mode for downscale thumbnail frame buffer

1.MPP_FRAME_THUMBNAIL_MIXED (already use on RK3528 box):
Each buffer contains original output frame and 2x2 downscale
small frame, small image's buffer offset will be set in frame
meta info;
2.MPP_FRAME_THUMBNAIL_ONLY (newly added for rk3576 8K video):
for rk3576: vop & gpu does not support 8K frame,
in this case, mpp use 4K downscale buffer as decoder output

Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I3acf9486a657fa3e999ca16140f40b2a01ebcaf4
 2024-04-23 15:54:30 +08:00
Hery Xu
2ea1a7ecd3 [vpu_api]: support nv21 format encode 
Change-Id: I82af5c70702b759afbce8665ff536c517d164831
Signed-off-by: Hery Xu <hery.xu@rock-chips.com>
 2024-04-16 09:26:53 +08:00
Yanjun Liao
25649d2fae fix[265e_api]: Support cons_intra_pred_flag cfg 
Change-Id: I57d7df14086cab0a6019f77b7b4b6259f456455e
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-03-29 10:18:14 +08:00
xueman.ruan
dbf20001b7 feat[vdpp]: Add capacity check function 
Change-Id: If14ad6e664b2dd58a8df9aecbb81b3d92682eb7d
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
 2024-03-21 09:49:29 +08:00
xueman.ruan
3cf926cd2c fix[mpp_dec]: Optimize HDR meta process 
Change-Id: I57d9d0c34d7085ff9c72b996c78835e2d49e0238
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
 2024-03-14 15:22:49 +08:00
Johnson Ding
2b2f3669e4 feat[enc]: Add config entry for output chroma format 
Change-Id: I29f4f764adc401a635e9fda2e2b41b2002078637
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2024-03-08 11:07:36 +08:00
Herman Chen
02a35cb871 fix: Fix clerical error 
fix denorminator to denominator

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I6e9deed4fe3bcdc1d2f7d56f3dccb87607d576bf
 2024-03-05 11:31:47 +08:00
Herman Chen
840fbdeac1 docs[mpp_frame]: Add MppFrameFormat description 
Add MppFrameFormat bit mask description.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I223b7661ca3497c2eb7b1cebc5148c45d4daf934
 2024-02-22 19:35:54 +08:00
Johnson Ding
77ad638e2e feat[mpp_frame]: Add tile format flag 
Change-Id: I5d331d377a47cefd57cb3c343d1c61224f452356
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2024-02-22 19:11:14 +08:00
Herman Chen
3f0e7c8cc5 doc[mpp_buffer]: Update MppBuffer code annotation 
related issue: https://redmine.rock-chips.com/issues/463747

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I24c047df0659958f98f46a248c2f0857f675149d
 2024-01-26 09:57:23 +08:00
xueman.ruan
e15972e9af feat[mpp_dmabuf]: Add dmabuf sync operation 
sync_begin - cache invalidate, should be called before cpu read
sync_end   - cache flush, should be called after cpu write

MppBuffer sync flow:
1. hw access
2. sync_begin
3. cpu access (read / write)
4. sync_end
5. hw access

NOTE: readonly option is faster for read only buffer.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I253a6139e9bb30808c07075d64f17b5cfad8519a
 2023-11-16 14:27:02 +08:00
sayon.chen
65439d38a4 feat[rc_v2]: Support flex fps rate control 
Change-Id: I45a8544c15ab4baede232e1a3b16c517f965092e
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2023-11-03 09:11:10 +08:00
xueman.ruan
22100022d7 fix[utils]: adjust format range constraint 
Change-Id: I12d57955d6ad84e063784e46893b1deec90785b6
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
 2023-10-26 10:29:34 +08:00
yanjun.liao
45fff92423 feat: add more enc info to meta 
1. add num of inter/intra different size predicted block info
2. add start qp info
3. add output pskip frame indicator
4. add SSE info

Change-Id: I664f0f87b862bf1c27b43f67c5c3e4b8b060c5b0
Signed-off-by: yanjun.liao <yanjun.liao@rock-chips.com>
 2023-10-10 09:11:41 +08:00
hdl
68177e2268 feat[vepu580]: Add frm min/max qp and scene_mode cmd param 
Signed-off-by: hdl <hdl@rock-chips.com>
Change-Id: I27c3f3cfb599b8d05e58aceb1967bec4230d386e
 2023-09-25 17:46:32 +08:00
hdl
9ff2961dcf feat[venc]: Add qbias for rkvenc encoder 
Signed-off-by: hdl <hdl@rock-chips.com>
Change-Id: Ib463b777898a3c25bebbd2fcb95d872581f0b8f7
 2023-09-25 16:34:03 +08:00
Rimon Xu
cb8fa73dbd [vpu_api_legacy]: Support input timeout control 
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
Change-Id: I960d28a75f1ae9425bb0db54dc2e017102b7e6cb
 2023-07-11 15:29:20 +08:00
Rimon Xu
dcedc39754 [vpu_api_legacy]: Support frame ready callback control 
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
Change-Id: I7de1fcab204cdf7216d8f761763337da14923e59
 2023-07-11 14:44:43 +08:00
Yandong Lin
e4554e2b84 [mpp_frame]: fix MPP_FRAME_XXX bit mask conflict 
fix MPP_FRAME_HDR bit mask conflicts with MPP_FRAME_FMT_LE_MASK

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I3a0df734f8cbc36da625d4b1a70658069809774f
 2023-06-02 15:05:17 +08:00
xueman.ruan
f91f152a1a [hal_h264e]: fix log2_max_frm_num config error. 
Issue is introduced when user configs log2_max_frm_num.

1. use MppEncH264HwCfg instead of hw_poc_type.
2. slice_write can only use corresponding hardware config.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Id5f3622512075eedc1e9dc99636c3f0dff43d6f1
 2023-05-30 14:04:31 +08:00
Yandong Lin
bd94623641 [mpp_frame]: add 10bit yuv fmt check macro 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ic045a031c23eb697478492251e940d83fb5cb5ad
 2023-03-28 14:51:59 +08:00
xueman.ruan
0466c8aa6b [mpp_enc_cfg]: combine gop and ref cfg config. 
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Ia15a0128d03b1a2624410b6f2a13effe3a03c47c
 2023-03-21 09:29:37 +08:00
xueman.ruan
e6ef3d1d7a [h264e]: Fix profile compatibility error. 
Issue introduced by encoding TSVC.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: I98c2c61634c7cc57180459e0427d5672fe407c47
 2023-03-08 09:32:21 +08:00
xueman.ruan
062c175265 [hal_jpege]: Add dma heap options for JPEG encode. 
use cachable dma buffer to reduce copy time.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: I7fcc0fa5942ea5aa4e247b5f10677843d006ff28
 2023-02-21 20:57:26 +08:00