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feat[vepu580]: Optimization to improve VMAF

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Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
Change-Id: Idaecf9a402aa9b87802d76911abb816e0dc557ec
This commit is contained in:
Tingjin Huang
2024-08-13 19:21:08 +08:00
committed by Herman Chen
parent df0b9e3a0d
commit 01dee1b7d4
10 changed files with 187 additions and 112 deletions
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4
inc/rk_venc_cmd.h
View File

@@ -1440,7 +1440,8 @@ typedef enum MppEncFineTuneCfgChange_e {
MPP_ENC_TUNE_CFG_CHANGE_SAO_STR_I = (1 << 10),
MPP_ENC_TUNE_CFG_CHANGE_SAO_STR_P = (1 << 11),
MPP_ENC_TUNE_CFG_CHANGE_QPMAP_EN = (1 << 12),
MPP_ENC_TUNE_CFG_CHANGE_RC_CONTAINER = (1 << 13)
MPP_ENC_TUNE_CFG_CHANGE_RC_CONTAINER = (1 << 13),
MPP_ENC_TUNE_CFG_CHANGE_VMAF_OPT = (1 << 14)
} MppEncFineTuneCfgChange;
typedef struct MppEncFineTuneCfg_t {
@@ -1459,6 +1460,7 @@ typedef struct MppEncFineTuneCfg_t {
RK_S32 sao_str_p; /* anti blur */
RK_S32 qpmap_en;
RK_S32 rc_container;
RK_S32 vmaf_opt;
} MppEncFineTuneCfg;
#endif /*__RK_VENC_CMD_H__*/

3
mpp/base/mpp_enc_cfg.cpp
View File

@@ -268,7 +268,8 @@ public:
ENTRY(tune, sao_str_i, S32, RK_S32, MPP_ENC_TUNE_CFG_CHANGE_SAO_STR_I, tune, sao_str_i) \
ENTRY(tune, sao_str_p, S32, RK_S32, MPP_ENC_TUNE_CFG_CHANGE_SAO_STR_P, tune, sao_str_p) \
ENTRY(tune, qpmap_en, S32, RK_S32, MPP_ENC_TUNE_CFG_CHANGE_QPMAP_EN, tune, qpmap_en) \
ENTRY(tune, rc_container, S32, RK_S32, MPP_ENC_TUNE_CFG_CHANGE_RC_CONTAINER, tune, rc_container)
ENTRY(tune, rc_container, S32, RK_S32, MPP_ENC_TUNE_CFG_CHANGE_RC_CONTAINER, tune, rc_container) \
ENTRY(tune, vmaf_opt, S32, RK_S32, MPP_ENC_TUNE_CFG_CHANGE_VMAF_OPT, tune, vmaf_opt)
static void mpp_enc_cfg_fill(MppTrie trie, MppCfgApi **cfgs)
{

1
mpp/codec/enc/h264/h264e_api_v2.c
View File

@@ -103,6 +103,7 @@ static void init_h264e_cfg_set(MppEncCfgSet *cfg, MppClientType type)
h264->level = H264_LEVEL_3_1;
cfg->tune.scene_mode = MPP_ENC_SCENE_MODE_DEFAULT;
cfg->tune.qpmap_en = 0;
cfg->tune.vmaf_opt = 0;
switch (type) {
case VPU_CLIENT_VEPU1 :

1
mpp/codec/enc/h265/h265e_api.c
View File

@@ -121,6 +121,7 @@ static MPP_RET h265e_init(void *ctx, EncImplCfg *ctrlCfg)
p->cfg->tune.deblur_str = 3;
p->cfg->tune.qpmap_en = 0;
p->cfg->tune.rc_container = 0;
p->cfg->tune.vmaf_opt = 0;
/*
* default prep:

8
mpp/codec/mpp_enc_impl.cpp
View File

@@ -958,6 +958,14 @@ MPP_RET mpp_enc_proc_tune_cfg(MppEncFineTuneCfg *dst, MppEncFineTuneCfg *src)
ret = MPP_ERR_VALUE;
}
if (change & MPP_ENC_TUNE_CFG_CHANGE_VMAF_OPT)
dst->vmaf_opt = src->vmaf_opt;
if (dst->vmaf_opt < 0 || dst->vmaf_opt > 1) {
mpp_err("invalid vmaf_opt %d not in range [0, 1]\n", dst->vmaf_opt);
ret = MPP_ERR_VALUE;
}
dst->change |= change;
if (ret) {

4
mpp/hal/rkenc/h264e/hal_h264e_vepu580_tune.c
View File

@@ -217,8 +217,8 @@ static void vepu580_h264e_tune_reg_patch(void *p)
regs->reg_s3.rime_sqi_multi.rime_multi2 = rime_multi[scene_motion_flag][2];
if (hw->qbias_en) {
regs->reg_s3.RDO_QUANT.quant_f_bias_I = hw->qbias_i;
regs->reg_s3.RDO_QUANT.quant_f_bias_P = hw->qbias_p;
regs->reg_s3.RDO_QUANT.quant_f_bias_I = hw->qbias_i ? hw->qbias_i : 683;
regs->reg_s3.RDO_QUANT.quant_f_bias_P = hw->qbias_p ? hw->qbias_p : 341;
}
}

196
mpp/hal/rkenc/h265e/hal_h265e_vepu580_tune.c
View File

@@ -252,16 +252,20 @@ static void vepu580_h265e_tune_reg_patch(void *p)
RdoAtfCfg* p_rdo_atf;
RK_U32 scene_motion_flag = tune->ap_motion_flag * 2 + tune->curr_scene_motion_flag;
MppEncHwCfg *hw = &ctx->cfg->hw;
RK_S32 vmaf_opt = ctx->cfg->tune.vmaf_opt;
RK_U32 pre_intra_idx = vmaf_opt ? 3 : scene_motion_flag;
RK_U32 atf_idx = vmaf_opt ? 3 : scene_motion_flag;
if (scene_motion_flag > 3) {
mpp_err_f("scene_motion_flag is a wrong value %d\n", scene_motion_flag);
return;
}
memcpy(&reg_wgt->lvl32_intra_CST_WGT0, lvl32_preintra_cst_wgt[scene_motion_flag],
sizeof(lvl32_preintra_cst_wgt[scene_motion_flag]));
memcpy(&reg_wgt->lvl16_intra_CST_WGT0, lvl16_preintra_cst_wgt[scene_motion_flag],
sizeof(lvl16_preintra_cst_wgt[scene_motion_flag]));
memcpy(&reg_wgt->lvl32_intra_CST_WGT0, lvl32_preintra_cst_wgt[pre_intra_idx],
sizeof(lvl32_preintra_cst_wgt[pre_intra_idx]));
memcpy(&reg_wgt->lvl16_intra_CST_WGT0, lvl16_preintra_cst_wgt[pre_intra_idx],
sizeof(lvl16_preintra_cst_wgt[pre_intra_idx]));
p_rdo_atf_skip = &reg_rdo->rdo_b64_skip_atf;
p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd0 = 1;
@@ -269,127 +273,127 @@ static void vepu580_h265e_tune_reg_patch(void *p)
p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd2 = 4;
p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd3 = 6;
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = skip_b64_atf_wgt[scene_motion_flag][0];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt10 = skip_b64_atf_wgt[scene_motion_flag][1];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt11 = skip_b64_atf_wgt[scene_motion_flag][2];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt12 = skip_b64_atf_wgt[scene_motion_flag][3];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt20 = skip_b64_atf_wgt[scene_motion_flag][4];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt21 = skip_b64_atf_wgt[scene_motion_flag][5];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt22 = skip_b64_atf_wgt[scene_motion_flag][6];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt30 = skip_b64_atf_wgt[scene_motion_flag][7];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt31 = skip_b64_atf_wgt[scene_motion_flag][8];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt32 = skip_b64_atf_wgt[scene_motion_flag][9];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt40 = skip_b64_atf_wgt[scene_motion_flag][10];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt41 = skip_b64_atf_wgt[scene_motion_flag][11];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt42 = skip_b64_atf_wgt[scene_motion_flag][12];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = skip_b64_atf_wgt[atf_idx][0];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt10 = skip_b64_atf_wgt[atf_idx][1];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt11 = skip_b64_atf_wgt[atf_idx][2];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt12 = skip_b64_atf_wgt[atf_idx][3];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt20 = skip_b64_atf_wgt[atf_idx][4];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt21 = skip_b64_atf_wgt[atf_idx][5];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt22 = skip_b64_atf_wgt[atf_idx][6];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt30 = skip_b64_atf_wgt[atf_idx][7];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt31 = skip_b64_atf_wgt[atf_idx][8];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt32 = skip_b64_atf_wgt[atf_idx][9];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt40 = skip_b64_atf_wgt[atf_idx][10];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt41 = skip_b64_atf_wgt[atf_idx][11];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt42 = skip_b64_atf_wgt[atf_idx][12];
p_rdo_atf = &reg_rdo->rdo_b32_intra_atf;
p_rdo_atf->rdo_b_cime_thd0.cu_rdo_cime_thd0 = 24;
p_rdo_atf->rdo_b_cime_thd0.cu_rdo_cime_thd1 = 48;
p_rdo_atf->rdo_b_cime_thd1.cu_rdo_cime_thd2 = 64;
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = intra_b32_atf_wgt[scene_motion_flag][0];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt01 = intra_b32_atf_wgt[scene_motion_flag][1];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt02 = intra_b32_atf_wgt[scene_motion_flag][2];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt10 = intra_b32_atf_wgt[scene_motion_flag][3];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt11 = intra_b32_atf_wgt[scene_motion_flag][4];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt12 = intra_b32_atf_wgt[scene_motion_flag][5];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt20 = intra_b32_atf_wgt[scene_motion_flag][6];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt21 = intra_b32_atf_wgt[scene_motion_flag][7];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt22 = intra_b32_atf_wgt[scene_motion_flag][8];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt30 = intra_b32_atf_wgt[scene_motion_flag][9];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt31 = intra_b32_atf_wgt[scene_motion_flag][10];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt32 = intra_b32_atf_wgt[scene_motion_flag][11];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = intra_b32_atf_wgt[atf_idx][0];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt01 = intra_b32_atf_wgt[atf_idx][1];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt02 = intra_b32_atf_wgt[atf_idx][2];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt10 = intra_b32_atf_wgt[atf_idx][3];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt11 = intra_b32_atf_wgt[atf_idx][4];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt12 = intra_b32_atf_wgt[atf_idx][5];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt20 = intra_b32_atf_wgt[atf_idx][6];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt21 = intra_b32_atf_wgt[atf_idx][7];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt22 = intra_b32_atf_wgt[atf_idx][8];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt30 = intra_b32_atf_wgt[atf_idx][9];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt31 = intra_b32_atf_wgt[atf_idx][10];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt32 = intra_b32_atf_wgt[atf_idx][11];
p_rdo_atf_skip = &reg_rdo->rdo_b32_skip_atf;
p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd0 = 1;
p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd1 = 2;
p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd2 = 4;
p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd3 = 6;
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = skip_b32_atf_wgt[scene_motion_flag][0];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt10 = skip_b32_atf_wgt[scene_motion_flag][1];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt11 = skip_b32_atf_wgt[scene_motion_flag][2];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt12 = skip_b32_atf_wgt[scene_motion_flag][3];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt20 = skip_b32_atf_wgt[scene_motion_flag][4];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt21 = skip_b32_atf_wgt[scene_motion_flag][5];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt22 = skip_b32_atf_wgt[scene_motion_flag][6];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt30 = skip_b32_atf_wgt[scene_motion_flag][7];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt31 = skip_b32_atf_wgt[scene_motion_flag][8];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt32 = skip_b32_atf_wgt[scene_motion_flag][9];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt40 = skip_b32_atf_wgt[scene_motion_flag][10];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt41 = skip_b32_atf_wgt[scene_motion_flag][11];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt42 = skip_b32_atf_wgt[scene_motion_flag][12];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = skip_b32_atf_wgt[atf_idx][0];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt10 = skip_b32_atf_wgt[atf_idx][1];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt11 = skip_b32_atf_wgt[atf_idx][2];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt12 = skip_b32_atf_wgt[atf_idx][3];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt20 = skip_b32_atf_wgt[atf_idx][4];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt21 = skip_b32_atf_wgt[atf_idx][5];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt22 = skip_b32_atf_wgt[atf_idx][6];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt30 = skip_b32_atf_wgt[atf_idx][7];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt31 = skip_b32_atf_wgt[atf_idx][8];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt32 = skip_b32_atf_wgt[atf_idx][9];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt40 = skip_b32_atf_wgt[atf_idx][10];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt41 = skip_b32_atf_wgt[atf_idx][11];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt42 = skip_b32_atf_wgt[atf_idx][12];
p_rdo_atf = &reg_rdo->rdo_b16_intra_atf;
p_rdo_atf->rdo_b_cime_thd0.cu_rdo_cime_thd0 = 24;
p_rdo_atf->rdo_b_cime_thd0.cu_rdo_cime_thd1 = 48;
p_rdo_atf->rdo_b_cime_thd1.cu_rdo_cime_thd2 = 64;
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = intra_b16_atf_wgt[scene_motion_flag][0];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt01 = intra_b16_atf_wgt[scene_motion_flag][1];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt02 = intra_b16_atf_wgt[scene_motion_flag][2];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt10 = intra_b16_atf_wgt[scene_motion_flag][3];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt11 = intra_b16_atf_wgt[scene_motion_flag][4];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt12 = intra_b16_atf_wgt[scene_motion_flag][5];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt20 = intra_b16_atf_wgt[scene_motion_flag][6];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt21 = intra_b16_atf_wgt[scene_motion_flag][7];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt22 = intra_b16_atf_wgt[scene_motion_flag][8];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt30 = intra_b16_atf_wgt[scene_motion_flag][9];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt31 = intra_b16_atf_wgt[scene_motion_flag][10];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt32 = intra_b16_atf_wgt[scene_motion_flag][11];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = intra_b16_atf_wgt[atf_idx][0];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt01 = intra_b16_atf_wgt[atf_idx][1];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt02 = intra_b16_atf_wgt[atf_idx][2];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt10 = intra_b16_atf_wgt[atf_idx][3];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt11 = intra_b16_atf_wgt[atf_idx][4];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt12 = intra_b16_atf_wgt[atf_idx][5];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt20 = intra_b16_atf_wgt[atf_idx][6];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt21 = intra_b16_atf_wgt[atf_idx][7];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt22 = intra_b16_atf_wgt[atf_idx][8];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt30 = intra_b16_atf_wgt[atf_idx][9];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt31 = intra_b16_atf_wgt[atf_idx][10];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt32 = intra_b16_atf_wgt[atf_idx][11];
p_rdo_atf_skip = &reg_rdo->rdo_b16_skip_atf;
p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd0 = 1;
p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd1 = 2;
p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd2 = 4;
p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd3 = 6;
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = skip_b16_atf_wgt[scene_motion_flag][0];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt10 = skip_b16_atf_wgt[scene_motion_flag][1];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt11 = skip_b16_atf_wgt[scene_motion_flag][2];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt12 = skip_b16_atf_wgt[scene_motion_flag][3];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt20 = skip_b16_atf_wgt[scene_motion_flag][4];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt21 = skip_b16_atf_wgt[scene_motion_flag][5];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt22 = skip_b16_atf_wgt[scene_motion_flag][6];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt30 = skip_b16_atf_wgt[scene_motion_flag][7];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt31 = skip_b16_atf_wgt[scene_motion_flag][8];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt32 = skip_b16_atf_wgt[scene_motion_flag][9];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt40 = skip_b16_atf_wgt[scene_motion_flag][10];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt41 = skip_b16_atf_wgt[scene_motion_flag][11];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt42 = skip_b16_atf_wgt[scene_motion_flag][12];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = skip_b16_atf_wgt[atf_idx][0];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt10 = skip_b16_atf_wgt[atf_idx][1];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt11 = skip_b16_atf_wgt[atf_idx][2];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt12 = skip_b16_atf_wgt[atf_idx][3];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt20 = skip_b16_atf_wgt[atf_idx][4];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt21 = skip_b16_atf_wgt[atf_idx][5];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt22 = skip_b16_atf_wgt[atf_idx][6];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt30 = skip_b16_atf_wgt[atf_idx][7];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt31 = skip_b16_atf_wgt[atf_idx][8];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt32 = skip_b16_atf_wgt[atf_idx][9];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt40 = skip_b16_atf_wgt[atf_idx][10];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt41 = skip_b16_atf_wgt[atf_idx][11];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt42 = skip_b16_atf_wgt[atf_idx][12];
p_rdo_atf = &reg_rdo->rdo_b8_intra_atf;
p_rdo_atf->rdo_b_cime_thd0.cu_rdo_cime_thd0 = 24;
p_rdo_atf->rdo_b_cime_thd0.cu_rdo_cime_thd1 = 48;
p_rdo_atf->rdo_b_cime_thd1.cu_rdo_cime_thd2 = 64;
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = intra_b8_atf_wgt[scene_motion_flag][0];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt01 = intra_b8_atf_wgt[scene_motion_flag][1];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt02 = intra_b8_atf_wgt[scene_motion_flag][2];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt10 = intra_b8_atf_wgt[scene_motion_flag][3];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt11 = intra_b8_atf_wgt[scene_motion_flag][4];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt12 = intra_b8_atf_wgt[scene_motion_flag][5];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt20 = intra_b8_atf_wgt[scene_motion_flag][6];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt21 = intra_b8_atf_wgt[scene_motion_flag][7];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt22 = intra_b8_atf_wgt[scene_motion_flag][8];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt30 = intra_b8_atf_wgt[scene_motion_flag][9];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt31 = intra_b8_atf_wgt[scene_motion_flag][10];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt32 = intra_b8_atf_wgt[scene_motion_flag][11];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = intra_b8_atf_wgt[atf_idx][0];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt01 = intra_b8_atf_wgt[atf_idx][1];
p_rdo_atf->rdo_b_atf_wgt0.cu_rdo_atf_wgt02 = intra_b8_atf_wgt[atf_idx][2];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt10 = intra_b8_atf_wgt[atf_idx][3];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt11 = intra_b8_atf_wgt[atf_idx][4];
p_rdo_atf->rdo_b_atf_wgt1.cu_rdo_atf_wgt12 = intra_b8_atf_wgt[atf_idx][5];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt20 = intra_b8_atf_wgt[atf_idx][6];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt21 = intra_b8_atf_wgt[atf_idx][7];
p_rdo_atf->rdo_b_atf_wgt2.cu_rdo_atf_wgt22 = intra_b8_atf_wgt[atf_idx][8];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt30 = intra_b8_atf_wgt[atf_idx][9];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt31 = intra_b8_atf_wgt[atf_idx][10];
p_rdo_atf->rdo_b_atf_wgt3.cu_rdo_atf_wgt32 = intra_b8_atf_wgt[atf_idx][11];
p_rdo_atf_skip = &reg_rdo->rdo_b8_skip_atf;
p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd0 = 1;
p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd1 = 2;
p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd2 = 4;
p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd3 = 6;
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = skip_b8_atf_wgt[scene_motion_flag][0];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt10 = skip_b8_atf_wgt[scene_motion_flag][1];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt11 = skip_b8_atf_wgt[scene_motion_flag][2];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt12 = skip_b8_atf_wgt[scene_motion_flag][3];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt20 = skip_b8_atf_wgt[scene_motion_flag][4];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt21 = skip_b8_atf_wgt[scene_motion_flag][5];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt22 = skip_b8_atf_wgt[scene_motion_flag][6];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt30 = skip_b8_atf_wgt[scene_motion_flag][7];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt31 = skip_b8_atf_wgt[scene_motion_flag][8];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt32 = skip_b8_atf_wgt[scene_motion_flag][9];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt40 = skip_b8_atf_wgt[scene_motion_flag][10];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt41 = skip_b8_atf_wgt[scene_motion_flag][11];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt42 = skip_b8_atf_wgt[scene_motion_flag][12];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt00 = skip_b8_atf_wgt[atf_idx][0];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt10 = skip_b8_atf_wgt[atf_idx][1];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt11 = skip_b8_atf_wgt[atf_idx][2];
p_rdo_atf_skip->rdo_b_atf_wgt0.cu_rdo_atf_wgt12 = skip_b8_atf_wgt[atf_idx][3];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt20 = skip_b8_atf_wgt[atf_idx][4];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt21 = skip_b8_atf_wgt[atf_idx][5];
p_rdo_atf_skip->rdo_b_atf_wgt1.cu_rdo_atf_wgt22 = skip_b8_atf_wgt[atf_idx][6];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt30 = skip_b8_atf_wgt[atf_idx][7];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt31 = skip_b8_atf_wgt[atf_idx][8];
p_rdo_atf_skip->rdo_b_atf_wgt2.cu_rdo_atf_wgt32 = skip_b8_atf_wgt[atf_idx][9];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt40 = skip_b8_atf_wgt[atf_idx][10];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt41 = skip_b8_atf_wgt[atf_idx][11];
p_rdo_atf_skip->rdo_b_atf_wgt3.cu_rdo_atf_wgt42 = skip_b8_atf_wgt[atf_idx][12];
reg_rdo->preintra_b32_cst_wgt.pre_intra32_cst_wgt00 = pre_intra_b32_cost[scene_motion_flag][0];
reg_rdo->preintra_b32_cst_wgt.pre_intra32_cst_wgt01 = pre_intra_b32_cost[scene_motion_flag][1];
@@ -417,8 +421,8 @@ static void vepu580_h265e_tune_reg_patch(void *p)
reg_wgt->fme_sqi_thd1.move_lambda = 8;
}
reg_rdo->rdo_sqi_cfg.rdo_segment_en = !tune->curr_scene_motion_flag;
reg_rdo->rdo_sqi_cfg.rdo_smear_en = !tune->curr_scene_motion_flag;
reg_rdo->rdo_sqi_cfg.rdo_segment_en = vmaf_opt ? 0 : !tune->curr_scene_motion_flag;
reg_rdo->rdo_sqi_cfg.rdo_smear_en = vmaf_opt ? 0 : !tune->curr_scene_motion_flag;
reg_wgt->i16_sobel_a_00.intra_l16_sobel_a0_qp0 = intra_lvl16_sobel_a[scene_motion_flag][0];
reg_wgt->i16_sobel_a_00.intra_l16_sobel_a0_qp1 = intra_lvl16_sobel_a[scene_motion_flag][1];
@@ -459,8 +463,8 @@ static void vepu580_h265e_tune_reg_patch(void *p)
reg_wgt->i32_sobel_c.intra_l32_sobel_c1_qp4 = intra_lvl32_sobel_c[scene_motion_flag][4];
if (hw->qbias_en) {
reg_wgt->reg1484_qnt_bias_comb.qnt_bias_i = hw->qbias_i;
reg_wgt->reg1484_qnt_bias_comb.qnt_bias_p = hw->qbias_p;
reg_wgt->reg1484_qnt_bias_comb.qnt_bias_i = hw->qbias_i ? hw->qbias_i : 171;
reg_wgt->reg1484_qnt_bias_comb.qnt_bias_p = hw->qbias_p ? hw->qbias_p : 85;
} else {
reg_wgt->reg1484_qnt_bias_comb.qnt_bias_i = qnt_bias_i[scene_motion_flag];
reg_wgt->reg1484_qnt_bias_comb.qnt_bias_p = qnt_bias_p[scene_motion_flag];

46
test/mpi_enc_test.c
View File

@@ -149,6 +149,27 @@ typedef struct {
MpiEncMultiCtxRet ret; // return of encoder
} MpiEncMultiCtxInfo;
static RK_S32 aq_thd[16] = {
0, 0, 0, 0,
3, 3, 5, 5,
8, 8, 8, 15,
15, 20, 25, 25
};
static RK_S32 aq_step_i_ipc[16] = {
-8, -7, -6, -5,
-4, -3, -2, -1,
0, 1, 2, 3,
5, 7, 7, 8,
};
static RK_S32 aq_step_p_ipc[16] = {
-8, -7, -6, -5,
-4, -2, -1, -1,
0, 2, 3, 4,
6, 8, 9, 10,
};
MPP_RET test_ctx_init(MpiEncMultiCtxInfo *info)
{
MpiEncTestArgs *cmd = info->cmd;
@@ -176,7 +197,6 @@ MPP_RET test_ctx_init(MpiEncMultiCtxInfo *info)
p->gop_mode = cmd->gop_mode;
p->gop_len = cmd->gop_len;
p->vi_len = cmd->vi_len;
p->fps_in_flex = cmd->fps_in_flex;
p->fps_in_den = cmd->fps_in_den;
p->fps_in_num = cmd->fps_in_num;
@@ -192,11 +212,8 @@ MPP_RET test_ctx_init(MpiEncMultiCtxInfo *info)
p->sao_str_i = cmd->sao_str_i;
p->sao_str_p = cmd->sao_str_p;
p->mdinfo_size = (MPP_VIDEO_CodingHEVC == cmd->type) ?
(MPP_ALIGN(p->hor_stride, 32) >> 5) *
(MPP_ALIGN(p->ver_stride, 32) >> 5) * 16 :
(MPP_ALIGN(p->hor_stride, 64) >> 6) *
(MPP_ALIGN(p->ver_stride, 16) >> 4) * 16;
p->mdinfo_size = (MPP_ALIGN(p->hor_stride, 64) >> 6) *
(MPP_ALIGN(p->ver_stride, 64) >> 6) * 32;
if (cmd->file_input) {
if (!strncmp(cmd->file_input, "/dev/video", 10)) {
@@ -315,7 +332,6 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
RK_U32 flip;
RK_U32 gop_mode = p->gop_mode;
MppEncRefCfg ref = NULL;
/* setup default parameter */
if (p->fps_in_den == 0)
p->fps_in_den = 1;
@@ -340,14 +356,27 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
mpp_enc_cfg_set_s32(cfg, "tune:scene_mode", p->scene_mode);
mpp_enc_cfg_set_s32(cfg, "tune:deblur_en", cmd->deblur_en);
mpp_enc_cfg_set_s32(cfg, "tune:deblur_str", cmd->deblur_str);
mpp_enc_cfg_set_s32(cfg, "tune:qpmap_en", 1);
mpp_enc_cfg_set_s32(cfg, "tune:rc_container", cmd->rc_container);
mpp_enc_cfg_set_s32(cfg, "tune:vmaf_opt", 1);
mpp_enc_cfg_set_s32(cfg, "hw:qbias_en", 1);
mpp_enc_cfg_set_s32(cfg, "hw:qbias_i", cmd->bias_i);
mpp_enc_cfg_set_s32(cfg, "hw:qbias_p", cmd->bias_p);
mpp_enc_cfg_set_st(cfg, "hw:aq_thrd_i", aq_thd);
mpp_enc_cfg_set_st(cfg, "hw:aq_thrd_p", aq_thd);
mpp_enc_cfg_set_st(cfg, "hw:aq_step_i", aq_step_i_ipc);
mpp_enc_cfg_set_st(cfg, "hw:aq_step_p", aq_step_p_ipc);
mpp_enc_cfg_set_s32(cfg, "prep:width", p->width);
mpp_enc_cfg_set_s32(cfg, "prep:height", p->height);
mpp_enc_cfg_set_s32(cfg, "prep:hor_stride", p->hor_stride);
mpp_enc_cfg_set_s32(cfg, "prep:ver_stride", p->ver_stride);
mpp_enc_cfg_set_s32(cfg, "prep:format", p->fmt);
mpp_enc_cfg_set_s32(cfg, "prep:range", MPP_FRAME_RANGE_JPEG);
mpp_enc_cfg_set_s32(cfg, "rc:mode", p->rc_mode);
mpp_enc_cfg_set_u32(cfg, "rc:max_reenc_times", 0);
mpp_enc_cfg_set_u32(cfg, "rc:super_mode", 0);
/* fix input / output frame rate */
mpp_enc_cfg_set_s32(cfg, "rc:fps_in_flex", p->fps_in_flex);
@@ -511,7 +540,6 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
mpp_enc_cfg_set_s32(cfg, "rc:gop", p->gop_len ? p->gop_len : p->fps_out_num * 2);
mpp_env_get_u32("gop_mode", &gop_mode, gop_mode);
if (gop_mode) {
mpp_enc_ref_cfg_init(&ref);
@@ -569,7 +597,7 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
{
RK_U32 sei_mode;
mpp_env_get_u32("sei_mode", &sei_mode, MPP_ENC_SEI_MODE_ONE_FRAME);
mpp_env_get_u32("sei_mode", &sei_mode, MPP_ENC_SEI_MODE_DISABLE);
p->sei_mode = sei_mode;
ret = mpi->control(ctx, MPP_ENC_SET_SEI_CFG, &p->sei_mode);
if (ret) {

34
utils/mpi_enc_utils.c
View File

@@ -626,6 +626,32 @@ RK_S32 mpi_enc_opt_bc(void *ctx, const char *next)
return 0;
}
RK_S32 mpi_enc_opt_bias_i(void *ctx, const char *next)
{
MpiEncTestArgs *cmd = (MpiEncTestArgs *)ctx;
if (next) {
cmd->bias_i = atoi(next);
return 1;
}
mpp_err("invalid bias i\n");
return 0;
}
RK_S32 mpi_enc_opt_bias_p(void *ctx, const char *next)
{
MpiEncTestArgs *cmd = (MpiEncTestArgs *)ctx;
if (next) {
cmd->bias_p = atoi(next);
return 1;
}
mpp_err("invalid bias p\n");
return 0;
}
static MppOptInfo enc_opts[] = {
{"i", "input_file", "input frame file", mpi_enc_opt_i},
{"o", "output_file", "output encoded bitstream file", mpi_enc_opt_o},
@@ -638,11 +664,11 @@ static MppOptInfo enc_opts[] = {
{"tsrc", "source type", "input file source coding type", mpi_enc_opt_tsrc},
{"n", "max frame number", "max encoding frame number", mpi_enc_opt_n},
{"g", "gop reference mode", "gop_mode:gop_len:vi_len", mpi_enc_opt_g},
{"rc", "rate control mode", "set rc_mode, 0:vbr 1:cbr 2:fixqp 3:avbr", mpi_enc_opt_rc},
{"rc", "rate control mode", "rc_mode, 0:vbr 1:cbr 2:fixqp 3:avbr 4:smtrc", mpi_enc_opt_rc},
{"bps", "bps target:min:max", "set tareget:min:max bps", mpi_enc_opt_bps},
{"fps", "in/output fps", "set input and output frame rate", mpi_enc_opt_fps},
{"qc", "quality control", "set qp_init:min:max:min_i:max_i", mpi_enc_opt_qc},
{"fqc", "frm quality control", "set fqp min_i:max_i:min_p:max_p", mpi_enc_opt_fqc},
{"fqc", "frame quality control", "set fqp min_i:max_i:min_p:max_p", mpi_enc_opt_fqc},
{"s", "instance_nb", "number of instances", mpi_enc_opt_s},
{"v", "trace option", "q - quiet f - show fps", mpi_enc_opt_v},
{"l", "loop count", "loop encoding times for each frame", mpi_enc_opt_l},
@@ -658,7 +684,9 @@ static MppOptInfo enc_opts[] = {
{"atr_p", "atr_str_p", "atr_str_p, 0:off 1 2 3", mpi_enc_opt_atr_p},
{"sao_i", "sao_str_i", "sao_str_i, 0:off 1 2 3", mpi_enc_opt_sao_i},
{"sao_p", "sao_str_p", "sao_str_p, 0:off 1 2 3", mpi_enc_opt_sao_p},
{"bc", "bitrate container", "rc_container, 0:off 1:weak 2:strong", mpi_enc_opt_bc}
{"bc", "bitrate container", "rc_container, 0:off 1:weak 2:strong", mpi_enc_opt_bc},
{"ibias", "bias i", "bias_i", mpi_enc_opt_bias_i},
{"pbias", "bias p", "bias_p", mpi_enc_opt_bias_p}
};
static RK_U32 enc_opt_cnt = MPP_ARRAY_ELEMS(enc_opts);

2
utils/mpi_enc_utils.h
View File

@@ -77,6 +77,8 @@ typedef struct MpiEncTestArgs_t {
/* -sm scene_mode */
RK_S32 scene_mode;
RK_S32 rc_container;
RK_S32 bias_i;
RK_S32 bias_p;
/* -qpdd cu_qp_delta_depth */
RK_S32 cu_qp_delta_depth;