Support user setting for vui_parameters_present_flag.
1. Default vui enable flag is true if not setting.
2. Call mpp_enc_cfg_set_s32(cfg, "h264:vui_en", vui_en) or
mpp_enc_cfg_set_s32(cfg, "h265:vui_en", vui_en) to
enable or disable the vui enable flag.
Platform: all
Spec: all
Reported-by: #556121 at redmine
Change-Id: Ie4a23c2879c3209377a5800d8e63c4081c34e0f7
Signed-off-by: wyc <yichen.wang@rock-chips.com>
The encoder speed mode is in range of 0 ~ 3.
0 - normal mode with all mode decision path enabled.
1 - fast mode
2 - faster mode
3 - fastest mode
Signed-off-by: toby.zhang <toby.zhang@rock-chips.com>
Change-Id: I0c607adbc1e4cea4025fa8a3816dc3a1ec1f13a1
Signed-off-by: toby.zhang <toby.zhang@rock-chips.com>
1. No need to encode IDR when fps_in is changed. So remove it from
`check_resend_hdr`
2. If application do not want any IDR encoded when only fps is changed,
call `mpp_enc_cfg_s32(cfg, "rc:fps_chg_no_idr", 0);` when
initializing.
3. Keeping CPB when only SPS, PPS are updated without IDR encoded for
H.264 encoder.
Change-Id: I034dd789a3f24318004d942624eb10240f7db2e9
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
Deblur_en is more generic for upper application.
Change-Id: Ibe4e0f81851fdbbe8fb8b7d840a4a9380e0403b1
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
1. Add cu_qp_delta_depth cfg
2. Configure AQ regs for H.265
3. Configure regs according to scene mode
4. Support fixed frame level QP
5. Add RDO lambda table index
6. Update stat info for HEVC
7. Add tuning code for H.264 encoder
Change-Id: Id7dae4ed55e1b94622aee72cfce8f24c833d00e1
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
Issue is introduced when user configs log2_max_frm_num.
1. use MppEncH264HwCfg instead of hw_poc_type.
2. slice_write can only use corresponding hardware config.
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Id5f3622512075eedc1e9dc99636c3f0dff43d6f1
Add parameters required for intra refresh
Add rate control corresponding to intra refresh
Change-Id: I6dbaf70e3c50cd0debf909ded9fb5c4f30df26ec
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
1. constraint the range of input argument.
2. add flip config, equal to vertical mirror transformation.
3. add mirroring_ext and rotation_ext to config set, for supporting
GET_CFG control.
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: I01c0b9187a18851354e81b5f08afc6dcaaba8365
Auto tile cfg will let encoder auto split picture into tiles
according to platform encoder core number.
When enabled on RK3588 all picture will be splited into two tiles.
Encoder cfg string: h265:auto_tile
Change-Id: I3bd91a7781fc2c7e0b43bf2e3be775a5b8098d78
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
Split output flag is for low delay packet output mode.
Change-Id: I2f743f14b89864625406ebf94687f4f838f0df15
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
vepu58x roi cfg generation is depended on vepu54x roi cfg.
1. Use roi_enable to enable roi test.
2. Use roi_type to test different roi config mode.
Old region mode is set to legacy now for future roi cfg will be more and
more complicated.
Change-Id: Ib9e8976b732f05625e7589b64752d38fbd83584b
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
The roi structure on vepu580 is too complex.
So we provide provide a buffer tunnel for externl user to config encoder
hardware directly.
External user should generate roi data structure according to datasheet.
Then config the base_addr, qp_addr, amv_addr, pmv_addr by metadata.
Change-Id: Iae50bf3ca36c1ff789140055d4d36a79afeb2e58
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
Some of NVR product may do some thing special when decoding the first
GOP of bitstream encoded by MPP, and report "gaps in frame_num is not
allowed" although frame_num is bitstream is continuous. Setting
gaps_in_frame_num_allowed_flag to true will avoid this problem.
1. Set gaps_in_frame_num_allowed_flag true as default
2. call mpp_enc_cfg_set_u32(cfg, "h264:gaps_not_allowed", 1) if you
want gaps_in_frame_num_allowed_flag to be false.
Change-Id: I8242fb318e051a61772c02a2c8bb59e4b589ff6d
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>