If the inter row rcb buf is placed in sram, may conflict with other
buffer in ddr, will result in slower access to data and degraded
decoding performance.
The issue will be resolved in chips after rk3588
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I79f5402c259ca5fa3a1223e5fb0f47bd0caa5b6d
When notify goes with control process the control notify should not
clear the other remaining notifies.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ie5adbf10047ccbaed8717d008b60e89e08817840
Rootcause:
The frame_mbs_only_flag is zero in the 10bit h264 source.
then, fbc fmt is disable because of frame_mbs_only_flag=0
means the source may contain filed that need go to iep.
Solution:
Add filter for 10bit.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I29163af98afbc92534863b979b38c8180b91c564
Hardware does not support H.264 stream at profile High 4:4:4
Predictive@L4.
Change-Id: I5c9d1bd83e731be3c7e9261d0e9db820d01a8cf7
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
mpp_dec_cfg and mpp_enc_cfg are same issue.
e.g. mpp_enc_cfg:
In 64-bit, the sizeof(MppEncCfgImpl) > cfg_size + sizeof(p->size)
because of memory alignment.
So malloc a memory with size cfg_size + sizeof(p->size) and cast into
MppEncCfgImpl will case out of bounds.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I7f23930ef44599332d465c49e7bd4422d45d7c3a
For some live stream, DOI may not be consecutive. Frames decoded by
referenced may remain at DPB and never removed since no video_edit_code
or video_sequence_end_code is inserted between sequences.
Change-Id: I341a9fa02af1172fd7e49fef4738bc32fae370a2
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
Frame DOI parsed from picture header may not equals to DOI recomputed.
So when judging a frame at DPB should be output or not, it may goes
wrong. Because a frame with smallest POI at DPB will have larger DOI than
DOI of a frame being parsing currently.
Change-Id: I534f56fcca7426383b671b9e34209e712f4c8a1e
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
The original buffer size is too small for complex image and it will
cause iommu pagefault.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I3b2f1fb81cfb007fe6718a73c9eaca7d3951806c
The HDR flag will not change the buffer size just ignore it.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ibebe60b8c0961e87b2b84236dd28a23e05f9d58f
1. Add LICENSE directory for Apache-2.0 and MIT
2. Add MIT license to vp8e code for linux kernel porting usage.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Idcd9eb812e0737ae5d90802f33c2726b729f663e
Flush frame when there is a frame in the dpb with poc > cur poc.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ib3a1f0a8bcdf1fddfa1f5b3928ea1dfd43bd4635
1. Define more decoder frame error level.
2. Setup errInfo according to error type and level
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I7d0e87d19fc5b24808cda6b2b1bdaa1e60d091f6
issue: no block encoding sends task to HAL twice, result in flushing
slice, prefix, reorder and marking accordingly.
1. fix slice reading logic.
2. malloc memory to store async encode info.
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: I7aedef0096d606ff91e1ed30d7e228a75359931d
When the frame period changes, it will be recorded in the last frame
period first, but this value is an error value, which cannot be updated
back to the correct frame period later, so the correct frame period
should be restored at this time.
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
Change-Id: I4b910efb0145b665ff664a552517ffa0ff920ba5
In the case of rk3588 mutilcore decoding, some field sources are decoded
error because the poc_hight is not configured correctly.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I850900a9139724bd58210ecbbd77ff46bf7e299c
