package/mpp
1
0
Fork 0
mirror of https://github.com/nyanmisaka/mpp.git synced 2025-10-16 22:21:11 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity

[m2v] add error mask for m2v dec

Browse Source 
Change-Id: I6767625084598e27b2fbcf5dedfe74c613987656
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
This commit is contained in:
sayon.chen
2016-09-29 11:29:04 +08:00
committed by Herman Chen
parent 56aecba3f7
commit d7870a2423
4 changed files with 24 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
mpp/codec/dec/m2v/m2vd_parser.c
View File

@@ -1249,6 +1249,7 @@ MPP_RET m2vd_convert_to_dxva(M2VDParserContext *p)
dst->bitstream_start_bit = readbits & 0x3f; dst->bitstream_start_bit = readbits & 0x3f;
dst->qp_tab = p->qp_tab_sw_buf; dst->qp_tab = p->qp_tab_sw_buf;
dst->CurrPic.Index7Bits = p->frame_cur->slot_index; dst->CurrPic.Index7Bits = p->frame_cur->slot_index;
p->cur_slot_index = p->frame_cur->slot_index;
if (p->frame_ref0->slot_index == 0xff) { if (p->frame_ref0->slot_index == 0xff) {
pbw = p->frame_cur; pbw = p->frame_cur;
@@ -1265,7 +1266,7 @@ MPP_RET m2vd_convert_to_dxva(M2VDParserContext *p)
dst->frame_refs[1].Index7Bits = pfw->slot_index; dst->frame_refs[1].Index7Bits = pfw->slot_index;
dst->frame_refs[2].Index7Bits = pbw->slot_index; dst->frame_refs[2].Index7Bits = pbw->slot_index;
dst->frame_refs[3].Index7Bits = pbw->slot_index; dst->frame_refs[3].Index7Bits = pbw->slot_index;
//p->frame_cur->->ErrorInfo = pfw->frame_space->ErrorInfo | pbw->frame_space->ErrorInfo; p->frame_cur->error_info = pfw->error_info | pbw->error_info;
} else { } else {
if ((p->pic_code_ext_head.picture_structure == M2VD_PIC_STRUCT_FRAME) || if ((p->pic_code_ext_head.picture_structure == M2VD_PIC_STRUCT_FRAME) ||
((p->pic_code_ext_head.picture_structure == M2VD_PIC_STRUCT_TOP_FIELD) && p->pic_code_ext_head.top_field_first) || ((p->pic_code_ext_head.picture_structure == M2VD_PIC_STRUCT_TOP_FIELD) && p->pic_code_ext_head.top_field_first) ||
@@ -1281,9 +1282,13 @@ MPP_RET m2vd_convert_to_dxva(M2VDParserContext *p)
} }
dst->frame_refs[2].Index7Bits = p->frame_cur->slot_index; dst->frame_refs[2].Index7Bits = p->frame_cur->slot_index;
dst->frame_refs[3].Index7Bits = p->frame_cur->slot_index; dst->frame_refs[3].Index7Bits = p->frame_cur->slot_index;
// p->frame_cur->frame_space->ErrorInfo = pbw->frame_space->ErrorInfo; p->frame_cur->error_info = pbw->error_info;
}
if (p->frame_cur->picCodingType == M2VD_CODING_TYPE_I) {
p->frame_cur->error_info = 0;
} }
dst->seq_ext_head_dec_flag = p->MPEG2_Flag; dst->seq_ext_head_dec_flag = p->MPEG2_Flag;
mpp_frame_set_errinfo(p->frame_cur->f, p->frame_cur->error_info);
FUN_T("FUN_O"); FUN_T("FUN_O");
return ret; return ret;
} }
@@ -1362,9 +1367,16 @@ __FAILED:
MPP_RET m2vd_parser_callback(void *ctx, void *errinfo) MPP_RET m2vd_parser_callback(void *ctx, void *errinfo)
{ {
MPP_RET ret = MPP_OK; MPP_RET ret = MPP_OK;
FUN_T("FUN_I"); M2VDContext *c = (M2VDContext *)ctx;
(void)ctx; M2VDParserContext *p = (M2VDParserContext *)c->parse_ctx;
MppFrame frame = NULL;
(void)errinfo; (void)errinfo;
FUN_T("FUN_I");
mpp_buf_slot_get_prop(p->frame_slots, p->cur_slot_index, SLOT_FRAME_PTR, &frame);
mpp_frame_set_errinfo(frame, 1);
m2vd_parser_reset(ctx);
FUN_T("FUN_O"); FUN_T("FUN_O");
return ret; return ret;
} }

1
mpp/codec/dec/m2v/m2vd_parser.h
View File

@@ -286,6 +286,7 @@ typedef struct M2VDParserContext_t {
MppBufSlots packet_slots; MppBufSlots packet_slots;
MppBufSlots frame_slots; MppBufSlots frame_slots;
IOInterruptCB notify_cb; IOInterruptCB notify_cb;
RK_U32 cur_slot_index;
RK_U64 pts; RK_U64 pts;

5
mpp/hal/vpu/m2vd/hal_m2vd_reg.c
View File

@@ -62,6 +62,7 @@ MPP_RET hal_m2vd_init(void *hal, MppHalCfg *cfg)
//configure //configure
p->packet_slots = cfg->packet_slots; p->packet_slots = cfg->packet_slots;
p->frame_slots = cfg->frame_slots; p->frame_slots = cfg->frame_slots;
p->int_cb = cfg->hal_int_cb;
mpp_env_get_u32("m2vh_debug", &m2vh_debug, 0); mpp_env_get_u32("m2vh_debug", &m2vh_debug, 0);
//get vpu socket //get vpu socket
@@ -362,6 +363,10 @@ MPP_RET hal_m2vd_wait(void *hal, HalTaskInfo *task)
fprintf(ctx->fp_reg_out, "[(D)%03d, (X)%03x] %08x\n", k, k, p_reg[k]); fprintf(ctx->fp_reg_out, "[(D)%03d, (X)%03x] %08x\n", k, k, p_reg[k]);
fflush(ctx->fp_reg_out); fflush(ctx->fp_reg_out);
} }
if (reg_out.interrupt.sw_dec_error_int | reg_out.interrupt.sw_dec_buffer_int) {
if (ctx->int_cb.callBack)
ctx->int_cb.callBack(ctx->int_cb.opaque, NULL);
}
if (M2VH_DBG_IRQ & m2vh_debug) if (M2VH_DBG_IRQ & m2vh_debug)
mpp_log("VPUClientWaitResult return interrupt:%08x", reg_out.interrupt); mpp_log("VPUClientWaitResult return interrupt:%08x", reg_out.interrupt);
#endif #endif

1
mpp/hal/vpu/m2vd/hal_m2vd_reg.h
View File

@@ -308,6 +308,7 @@ typedef struct M2VDHalContext_t {
MppBufferGroup group; MppBufferGroup group;
MppBuffer qp_table; MppBuffer qp_table;
RK_U32 dec_frame_cnt; RK_U32 dec_frame_cnt;
IOInterruptCB int_cb;
FILE *fp_reg_in; FILE *fp_reg_in;
FILE *fp_reg_out; FILE *fp_reg_out;
} M2VDHalContext; } M2VDHalContext;