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https://github.com/nyanmisaka/mpp.git
synced 2025-10-14 21:25:42 +08:00
[m2v] add error mask for m2v dec
Change-Id: I6767625084598e27b2fbcf5dedfe74c613987656 Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
This commit is contained in:
@@ -1249,6 +1249,7 @@ MPP_RET m2vd_convert_to_dxva(M2VDParserContext *p)
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dst->bitstream_start_bit = readbits & 0x3f;
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dst->qp_tab = p->qp_tab_sw_buf;
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dst->CurrPic.Index7Bits = p->frame_cur->slot_index;
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p->cur_slot_index = p->frame_cur->slot_index;
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if (p->frame_ref0->slot_index == 0xff) {
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pbw = p->frame_cur;
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@@ -1265,7 +1266,7 @@ MPP_RET m2vd_convert_to_dxva(M2VDParserContext *p)
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dst->frame_refs[1].Index7Bits = pfw->slot_index;
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dst->frame_refs[2].Index7Bits = pbw->slot_index;
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dst->frame_refs[3].Index7Bits = pbw->slot_index;
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//p->frame_cur->->ErrorInfo = pfw->frame_space->ErrorInfo | pbw->frame_space->ErrorInfo;
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p->frame_cur->error_info = pfw->error_info | pbw->error_info;
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} else {
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if ((p->pic_code_ext_head.picture_structure == M2VD_PIC_STRUCT_FRAME) ||
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((p->pic_code_ext_head.picture_structure == M2VD_PIC_STRUCT_TOP_FIELD) && p->pic_code_ext_head.top_field_first) ||
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@@ -1281,9 +1282,13 @@ MPP_RET m2vd_convert_to_dxva(M2VDParserContext *p)
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}
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dst->frame_refs[2].Index7Bits = p->frame_cur->slot_index;
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dst->frame_refs[3].Index7Bits = p->frame_cur->slot_index;
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// p->frame_cur->frame_space->ErrorInfo = pbw->frame_space->ErrorInfo;
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p->frame_cur->error_info = pbw->error_info;
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}
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if (p->frame_cur->picCodingType == M2VD_CODING_TYPE_I) {
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p->frame_cur->error_info = 0;
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}
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dst->seq_ext_head_dec_flag = p->MPEG2_Flag;
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mpp_frame_set_errinfo(p->frame_cur->f, p->frame_cur->error_info);
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FUN_T("FUN_O");
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return ret;
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}
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@@ -1362,9 +1367,16 @@ __FAILED:
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MPP_RET m2vd_parser_callback(void *ctx, void *errinfo)
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{
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MPP_RET ret = MPP_OK;
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FUN_T("FUN_I");
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(void)ctx;
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M2VDContext *c = (M2VDContext *)ctx;
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M2VDParserContext *p = (M2VDParserContext *)c->parse_ctx;
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MppFrame frame = NULL;
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(void)errinfo;
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FUN_T("FUN_I");
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mpp_buf_slot_get_prop(p->frame_slots, p->cur_slot_index, SLOT_FRAME_PTR, &frame);
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mpp_frame_set_errinfo(frame, 1);
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m2vd_parser_reset(ctx);
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FUN_T("FUN_O");
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return ret;
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}
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@@ -267,7 +267,7 @@ typedef struct M2VDParserContext_t {
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RK_U32 ref_frame_cnt;
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long long top_first_cnt;
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long long bottom_first_cnt;
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RK_S32 mHeaderDecFlag;
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RK_S32 mHeaderDecFlag;
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M2VDFrameHead Framehead[3];
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M2VDFrameHead *frame_ref0;
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M2VDFrameHead *frame_ref1;
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@@ -286,6 +286,7 @@ typedef struct M2VDParserContext_t {
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MppBufSlots packet_slots;
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MppBufSlots frame_slots;
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IOInterruptCB notify_cb;
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RK_U32 cur_slot_index;
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RK_U64 pts;
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@@ -62,6 +62,7 @@ MPP_RET hal_m2vd_init(void *hal, MppHalCfg *cfg)
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//configure
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p->packet_slots = cfg->packet_slots;
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p->frame_slots = cfg->frame_slots;
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p->int_cb = cfg->hal_int_cb;
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mpp_env_get_u32("m2vh_debug", &m2vh_debug, 0);
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//get vpu socket
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@@ -362,6 +363,10 @@ MPP_RET hal_m2vd_wait(void *hal, HalTaskInfo *task)
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fprintf(ctx->fp_reg_out, "[(D)%03d, (X)%03x] %08x\n", k, k, p_reg[k]);
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fflush(ctx->fp_reg_out);
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}
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if (reg_out.interrupt.sw_dec_error_int | reg_out.interrupt.sw_dec_buffer_int) {
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if (ctx->int_cb.callBack)
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ctx->int_cb.callBack(ctx->int_cb.opaque, NULL);
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}
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if (M2VH_DBG_IRQ & m2vh_debug)
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mpp_log("VPUClientWaitResult return interrupt:%08x", reg_out.interrupt);
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#endif
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@@ -308,6 +308,7 @@ typedef struct M2VDHalContext_t {
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MppBufferGroup group;
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MppBuffer qp_table;
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RK_U32 dec_frame_cnt;
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IOInterruptCB int_cb;
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FILE *fp_reg_in;
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FILE *fp_reg_out;
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} M2VDHalContext;
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