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fix[hal_265e_510]: modify srgn_max & rime_lvl val

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avoid some encoding errors

Change-Id: Id8b3e112ff1e2a5cfab400fc5f78412e855108bc
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
This commit is contained in:
Yanjun Liao
2024-03-27 13:52:37 +08:00
parent db81cc5217
commit cf1d60c324
1 changed files with 2 additions and 2 deletions
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4
mpp/hal/rkenc/h265e/hal_h265e_vepu510.c
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@@ -669,7 +669,7 @@ static void vepu510_h265_global_cfg_set(H265eV510HalContext *ctx, H265eV510RegSe
regs->reg_param.me_sqi_comb.cime_fuse = 1;
regs->reg_param.me_sqi_comb.itp_mode = 0;
regs->reg_param.me_sqi_comb.move_lambda = 2;
regs->reg_param.me_sqi_comb.rime_lvl_mrg = 0;
regs->reg_param.me_sqi_comb.rime_lvl_mrg = 1;
regs->reg_param.me_sqi_comb.rime_prelvl_en = 3;
regs->reg_param.me_sqi_comb.rime_prersu_en = 3;
@@ -1229,7 +1229,7 @@ static void vepu510_h265_set_me_regs(H265eV510HalContext *ctx, H265eSyntax_new *
regs->common.me_cfg.rme_srch_h = 3;
regs->common.me_cfg.rme_srch_v = 3;
regs->common.me_cfg.srgn_max_num = 72;
regs->common.me_cfg.srgn_max_num = 54;
regs->common.me_cfg.cime_dist_thre = 1024;
regs->common.me_cfg.rme_dis = 0;
regs->common.me_cfg.fme_dis = 0;