From cf1d60c324a775b7e7c94ff2c55df5ff24c908d1 Mon Sep 17 00:00:00 2001 From: Yanjun Liao Date: Wed, 27 Mar 2024 13:52:37 +0800 Subject: [PATCH] fix[hal_265e_510]: modify srgn_max & rime_lvl val avoid some encoding errors Change-Id: Id8b3e112ff1e2a5cfab400fc5f78412e855108bc Signed-off-by: Yanjun Liao --- mpp/hal/rkenc/h265e/hal_h265e_vepu510.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/mpp/hal/rkenc/h265e/hal_h265e_vepu510.c b/mpp/hal/rkenc/h265e/hal_h265e_vepu510.c index 9e3920a6..63905318 100644 --- a/mpp/hal/rkenc/h265e/hal_h265e_vepu510.c +++ b/mpp/hal/rkenc/h265e/hal_h265e_vepu510.c @@ -669,7 +669,7 @@ static void vepu510_h265_global_cfg_set(H265eV510HalContext *ctx, H265eV510RegSe regs->reg_param.me_sqi_comb.cime_fuse = 1; regs->reg_param.me_sqi_comb.itp_mode = 0; regs->reg_param.me_sqi_comb.move_lambda = 2; - regs->reg_param.me_sqi_comb.rime_lvl_mrg = 0; + regs->reg_param.me_sqi_comb.rime_lvl_mrg = 1; regs->reg_param.me_sqi_comb.rime_prelvl_en = 3; regs->reg_param.me_sqi_comb.rime_prersu_en = 3; @@ -1229,7 +1229,7 @@ static void vepu510_h265_set_me_regs(H265eV510HalContext *ctx, H265eSyntax_new * regs->common.me_cfg.rme_srch_h = 3; regs->common.me_cfg.rme_srch_v = 3; - regs->common.me_cfg.srgn_max_num = 72; + regs->common.me_cfg.srgn_max_num = 54; regs->common.me_cfg.cime_dist_thre = 1024; regs->common.me_cfg.rme_dis = 0; regs->common.me_cfg.fme_dis = 0;