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[h265d_parser2_syntax]: Optimize syntax fill
Change-Id: Ia60e1b3df5e7b72d5c6c2f67a359669e3903b08c Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
This commit is contained in:
@@ -164,26 +164,28 @@ static void fill_picture_parameters(const HEVCContext *h,
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pp->CurrPicOrderCntVal = h->poc;
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pp->ps_update_flag = h->ps_need_upate;
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for (i = 0; i < 32; i++) {
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pp->sps_lt_rps[i].lt_ref_pic_poc_lsb = sps->lt_ref_pic_poc_lsb_sps[i];
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pp->sps_lt_rps[i].used_by_curr_pic_lt_flag = sps->used_by_curr_pic_lt_sps_flag[i];
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}
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if (pp->ps_update_flag) {
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for (i = 0; i < 32; i++) {
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pp->sps_lt_rps[i].lt_ref_pic_poc_lsb = sps->lt_ref_pic_poc_lsb_sps[i];
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pp->sps_lt_rps[i].used_by_curr_pic_lt_flag = sps->used_by_curr_pic_lt_sps_flag[i];
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}
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for (i = 0; i < 64; i++) {
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if (i < sps->nb_st_rps) {
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for (i = 0; i < 64; i++) {
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if (i < sps->nb_st_rps) {
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RK_U32 n_pics = src_rps[i].num_negative_pics;
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dst_rps[i].num_negative_pics = n_pics;
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dst_rps[i].num_positive_pics = src_rps[i].num_delta_pocs - n_pics;
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for (j = 0; j < dst_rps[i].num_negative_pics; j++) {
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dst_rps[i].delta_poc_s0[j] = src_rps[i].delta_poc[j];
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dst_rps[i].s0_used_flag[j] = src_rps[i].used[j];
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}
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RK_U32 n_pics = src_rps[i].num_negative_pics;
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dst_rps[i].num_negative_pics = n_pics;
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dst_rps[i].num_positive_pics = src_rps[i].num_delta_pocs - n_pics;
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for (j = 0; j < dst_rps[i].num_negative_pics; j++) {
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dst_rps[i].delta_poc_s0[j] = src_rps[i].delta_poc[j];
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dst_rps[i].s0_used_flag[j] = src_rps[i].used[j];
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}
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for ( j = 0; j < dst_rps[i].num_positive_pics; j++) {
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dst_rps[i].delta_poc_s1[j] = src_rps[i].delta_poc[j + n_pics];
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dst_rps[i].s1_used_flag[j] = src_rps[i].used[j + n_pics];
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for ( j = 0; j < dst_rps[i].num_positive_pics; j++) {
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dst_rps[i].delta_poc_s1[j] = src_rps[i].delta_poc[j + n_pics];
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dst_rps[i].s1_used_flag[j] = src_rps[i].used[j + n_pics];
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}
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}
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}
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}
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@@ -260,7 +262,9 @@ static void fill_scaling_lists(const HEVCContext *h, DXVA_Qmatrix_HEVC *qm)
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const HEVCSPS *sps = (HEVCSPS *)h->sps_list[pps->sps_id];
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const ScalingList *sl = pps->scaling_list_data_present_flag ?
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&pps->scaling_list : &sps->scaling_list;
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if (!sps->scaling_list_enable_flag) {
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return;
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}
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memset(qm, 0, sizeof(DXVA_Qmatrix_HEVC));
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for (i = 0; i < 6; i++) {
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for (j = 0; j < 16; j++) {
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@@ -695,6 +695,9 @@ void hal_h265d_output_scalinglist_packet(void *hal, void *ptr, void *dxva)
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RK_U32 i, j, pos;
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h265d_dxva2_picture_context_t *dxva_cxt = (h265d_dxva2_picture_context_t*)dxva;
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HalH265dCtx *reg_cxt = ( HalH265dCtx *)hal;
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if (!dxva_cxt->pp.scaling_list_enabled_flag) {
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return;
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}
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if (memcmp((void*)&dxva_cxt->qm, reg_cxt->scaling_qm, sizeof(DXVA_Qmatrix_HEVC))) {
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memset(&sl, 0, sizeof(scalingList_t));
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for (i = 0; i < 6; i++) {
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