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[hal_h264e_rkv]: fix bugs in hal test
1. do not fix input_image_format while validate syntax, now yuv420sp and yuv420p are both supported in test case. 2. change the hw_buf type from MppBuffer* to MppBuffer when dump stream. Change-Id: Icf6b408e0ccaf07812c5cb2077101ede39d60c5a Signed-off-by: Lin Kesheng <lks@rock-chips.com>
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@@ -27,7 +27,7 @@
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#include "hal_h264e.h"
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#include "hal_h264e_rkv.h"
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#define RKVENC_DUMP_INFO 0
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#define RKVENC_DUMP_INFO 0
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#define RKVENC_FRAME_TYPE_AUTO 0x0000 /* Let x264 choose the right type */
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#define RKVENC_FRAME_TYPE_IDR 0x0001
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@@ -808,7 +808,7 @@ static void hal_h264e_rkv_dump_mpp_strm_out_header(h264e_hal_context *ctx, MppPa
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}
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void hal_h264e_rkv_dump_mpp_strm_out(h264e_hal_context *ctx, MppBuffer *hw_buf)
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void hal_h264e_rkv_dump_mpp_strm_out(h264e_hal_context *ctx, MppBuffer hw_buf)
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{
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#if RKVENC_DUMP_INFO
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h264e_hal_rkv_dump_files *dump_files = (h264e_hal_rkv_dump_files *)ctx->dump_files;
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@@ -822,13 +822,13 @@ void hal_h264e_rkv_dump_mpp_strm_out(h264e_hal_context *ctx, MppBuffer *hw_buf)
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h264e_rkv_ioctl_output_elem *out_elem = ioctl_output->elem;
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RK_U32 frame_num = ioctl_output->frame_num;
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h264e_hal_log_file("dump %d frames strm out below", frame_num);
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h264e_hal_log_file("dump %d frames strm out below", frame_num);
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for (k = 0; k < frame_num; k++) {
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strm_size = (RK_U32)out_elem[k].swreg69.bs_lgth;
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hw_buf_vir_addr = (RK_U8 *)mpp_buffer_get_ptr(hw_buf[k]);
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hw_buf_vir_addr = (RK_U8 *)mpp_buffer_get_ptr(hw_buf);
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sw_buf = mpp_malloc(RK_U8, strm_size);
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h264e_hal_log_file("dump frame %d, fd %d, strm_size: %d", k, mpp_buffer_get_fd(hw_buf[k]), strm_size);
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h264e_hal_log_file("dump frame %d, fd %d, strm_size: %d", k, mpp_buffer_get_fd(hw_buf), strm_size);
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memcpy(sw_buf, hw_buf_vir_addr, strm_size);
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@@ -838,9 +838,6 @@ void hal_h264e_rkv_dump_mpp_strm_out(h264e_hal_context *ctx, MppBuffer *hw_buf)
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mpp_free(sw_buf);
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}
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fflush(fp);
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(void)hw_buf;
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} else {
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h264e_hal_log_file("try to dump data to mpp_strm_out.txt, but file is not opened");
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}
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@@ -2638,7 +2635,6 @@ MPP_RET hal_h264e_rkv_set_ioctl_extra_info(h264e_rkv_ioctl_extra_info *extra_inf
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info = &extra_info->elem[1];
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info->reg_idx = 72;
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info->offset = frame_size * 5 / 4; //TODO: relevant with YUV format
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return MPP_OK;
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}
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@@ -2653,7 +2649,6 @@ static MPP_RET hal_h264e_rkv_validate_syntax(h264e_syntax *syn, h264e_hal_rkv_cs
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/* adjust */
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*src_fmt = hal_h264e_rkv_convert_csp(input_image_format);
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syn->input_image_format = src_fmt->fmt;
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syn->input_image_format = H264E_RKV_CSP_YUV420SP; //TODO: removed later
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syn->input_cb_addr = syn->input_luma_addr;
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syn->input_cr_addr = syn->input_luma_addr;
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@@ -2715,8 +2710,8 @@ MPP_RET hal_h264e_rkv_set_rc_regs(h264e_rkv_reg_set *regs, h264e_syntax *syn,
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regs->swreg54.rc_fact1 = 8; //sw_quality_factor_1;
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regs->swreg54.Reserved = 0x0;
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regs->swreg54.rc_qp_range = 4; //sw_rc_clip_qp_range;
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regs->swreg54.rc_max_qp = 40;
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regs->swreg54.rc_min_qp = 20;
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regs->swreg54.rc_max_qp = 40;
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regs->swreg54.rc_min_qp = 20;
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regs->swreg55.ctu_ebits = mb_target_size; //sw_ctu_target_bits;
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} else {
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@@ -2982,7 +2977,6 @@ MPP_RET hal_h264e_rkv_set_pp_regs(h264e_rkv_reg_set *regs, h264e_syntax *syn, Mp
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regs->swreg23.src_ystrid = stridey; //syn->swreg23.src_ystrid;
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regs->swreg23.src_cstrid = stridec; //syn->swreg23.src_cstrid; ////YUV420 planar;
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(void)test;
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}
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@@ -3119,8 +3113,7 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
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regs->swreg24_adr_srcy = syn->input_luma_addr; //syn->addr_cfg.adr_srcy;
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regs->swreg25_adr_srcu = syn->input_cb_addr; //syn->addr_cfg.adr_srcu;
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regs->swreg26_adr_srcv = syn->input_cr_addr; //syn->addr_cfg.adr_srcv;
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hal_h264e_rkv_set_roi_regs(regs, syn, bufs->hw_roi_buf[mul_buf_idx], ctx->frame_cnt, test_cfg);
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regs->swreg30_rfpw_addr = mpp_buffer_get_fd(dpb_ctx->fdec->hw_buf);//syn->addr_cfg.rfpw_addr; //TODO: extend recon luma buf
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