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refactor[mpp_enc_cfg]: Adjust cu_qp_delta_depth

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sync from mpp_interface

Change-Id: I2dfabef3acf01566df289396678a433ac84f3a15
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
This commit is contained in:
Yandong Lin
2025-01-09 11:36:39 +08:00
committed by Herman Chen
parent 2cb69a2860
commit 7939be1246
6 changed files with 11 additions and 11 deletions
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3
inc/rk_venc_cmd.h
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@@ -239,7 +239,6 @@ typedef enum MppEncRcCfgChange_e {
MPP_ENC_RC_CFG_CHANGE_REFRESH = (1 << 27), MPP_ENC_RC_CFG_CHANGE_REFRESH = (1 << 27),
MPP_ENC_RC_CFG_CHANGE_GOP_REF_CFG = (1 << 28), MPP_ENC_RC_CFG_CHANGE_GOP_REF_CFG = (1 << 28),
MPP_ENC_RC_CFG_CHANGE_FQP = (1 << 29), MPP_ENC_RC_CFG_CHANGE_FQP = (1 << 29),
MPP_ENC_RC_CFG_CHANGE_QPDD = (1 << 30),
MPP_ENC_RC_CFG_CHANGE_ALL = (0xFFFFFFFF), MPP_ENC_RC_CFG_CHANGE_ALL = (0xFFFFFFFF),
} MppEncRcCfgChange; } MppEncRcCfgChange;
@@ -417,7 +416,6 @@ typedef struct MppEncRcCfg_t {
RK_S32 fqp_min_p; RK_S32 fqp_min_p;
RK_S32 fqp_max_i; RK_S32 fqp_max_i;
RK_S32 fqp_max_p; RK_S32 fqp_max_p;
RK_S32 cu_qp_delta_depth;
RK_S32 mt_st_swth_frm_qp; RK_S32 mt_st_swth_frm_qp;
RK_S32 hier_qp_en; RK_S32 hier_qp_en;
@@ -1077,6 +1075,7 @@ typedef struct MppEncH265TransCfg_t {
RK_U32 defalut_ScalingList_enable; /* default: 0 */ RK_U32 defalut_ScalingList_enable; /* default: 0 */
RK_S32 cb_qp_offset; RK_S32 cb_qp_offset;
RK_S32 cr_qp_offset; RK_S32 cr_qp_offset;
RK_S32 diff_cu_qp_delta_depth;
} MppEncH265TransCfg; } MppEncH265TransCfg;
typedef struct MppEncH265MergeCfg_t { typedef struct MppEncH265MergeCfg_t {

2
mpp/base/mpp_enc_cfg.cpp
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@@ -139,7 +139,6 @@ public:
ENTRY(rc, fqp_min_p, S32, MPP_ENC_RC_CFG_CHANGE_FQP, rc, fqp_min_p) \ ENTRY(rc, fqp_min_p, S32, MPP_ENC_RC_CFG_CHANGE_FQP, rc, fqp_min_p) \
ENTRY(rc, fqp_max_i, S32, MPP_ENC_RC_CFG_CHANGE_FQP, rc, fqp_max_i) \ ENTRY(rc, fqp_max_i, S32, MPP_ENC_RC_CFG_CHANGE_FQP, rc, fqp_max_i) \
ENTRY(rc, fqp_max_p, S32, MPP_ENC_RC_CFG_CHANGE_FQP, rc, fqp_max_p) \ ENTRY(rc, fqp_max_p, S32, MPP_ENC_RC_CFG_CHANGE_FQP, rc, fqp_max_p) \
ENTRY(rc, cu_qp_delta_depth, S32, MPP_ENC_RC_CFG_CHANGE_QPDD, rc, cu_qp_delta_depth) \
ENTRY(rc, mt_st_swth_frm_qp, S32, MPP_ENC_RC_CFG_CHANGE_FQP, rc, mt_st_swth_frm_qp) \ ENTRY(rc, mt_st_swth_frm_qp, S32, MPP_ENC_RC_CFG_CHANGE_FQP, rc, mt_st_swth_frm_qp) \
/* prep config */ \ /* prep config */ \
ENTRY(prep, width, S32, MPP_ENC_PREP_CFG_CHANGE_INPUT, prep, width) \ ENTRY(prep, width, S32, MPP_ENC_PREP_CFG_CHANGE_INPUT, prep, width) \
@@ -202,6 +201,7 @@ public:
ENTRY(h265, scaling_list, U32, MPP_ENC_H265_CFG_TRANS_CHANGE, codec.h265, trans_cfg.defalut_ScalingList_enable) \ ENTRY(h265, scaling_list, U32, MPP_ENC_H265_CFG_TRANS_CHANGE, codec.h265, trans_cfg.defalut_ScalingList_enable) \
ENTRY(h265, cb_qp_offset, S32, MPP_ENC_H265_CFG_TRANS_CHANGE, codec.h265, trans_cfg.cb_qp_offset) \ ENTRY(h265, cb_qp_offset, S32, MPP_ENC_H265_CFG_TRANS_CHANGE, codec.h265, trans_cfg.cb_qp_offset) \
ENTRY(h265, cr_qp_offset, S32, MPP_ENC_H265_CFG_TRANS_CHANGE, codec.h265, trans_cfg.cr_qp_offset) \ ENTRY(h265, cr_qp_offset, S32, MPP_ENC_H265_CFG_TRANS_CHANGE, codec.h265, trans_cfg.cr_qp_offset) \
ENTRY(h265, diff_cu_qp_delta_depth, S32, MPP_ENC_H265_CFG_TRANS_CHANGE, codec.h265, trans_cfg.diff_cu_qp_delta_depth) \
ENTRY(h265, dblk_disable, U32, MPP_ENC_H265_CFG_DBLK_CHANGE, codec.h265, dblk_cfg.slice_deblocking_filter_disabled_flag) \ ENTRY(h265, dblk_disable, U32, MPP_ENC_H265_CFG_DBLK_CHANGE, codec.h265, dblk_cfg.slice_deblocking_filter_disabled_flag) \
ENTRY(h265, dblk_alpha, S32, MPP_ENC_H265_CFG_DBLK_CHANGE, codec.h265, dblk_cfg.slice_beta_offset_div2) \ ENTRY(h265, dblk_alpha, S32, MPP_ENC_H265_CFG_DBLK_CHANGE, codec.h265, dblk_cfg.slice_beta_offset_div2) \
ENTRY(h265, dblk_beta, S32, MPP_ENC_H265_CFG_DBLK_CHANGE, codec.h265, dblk_cfg.slice_tc_offset_div2) \ ENTRY(h265, dblk_beta, S32, MPP_ENC_H265_CFG_DBLK_CHANGE, codec.h265, dblk_cfg.slice_tc_offset_div2) \

6
mpp/codec/enc/h265/h265e_api.c
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@@ -109,6 +109,7 @@ static MPP_RET h265e_init(void *ctx, EncImplCfg *ctrlCfg)
h265->merge_cfg.max_mrg_cnd = 2; h265->merge_cfg.max_mrg_cnd = 2;
h265->merge_cfg.merge_left_flag = 1; h265->merge_cfg.merge_left_flag = 1;
h265->merge_cfg.merge_up_flag = 1; h265->merge_cfg.merge_up_flag = 1;
h265->trans_cfg.diff_cu_qp_delta_depth = 0;
p->cfg->tune.scene_mode = MPP_ENC_SCENE_MODE_DEFAULT; p->cfg->tune.scene_mode = MPP_ENC_SCENE_MODE_DEFAULT;
p->cfg->tune.lambda_idx_i = 2; p->cfg->tune.lambda_idx_i = 2;
p->cfg->tune.lambda_idx_p = 4; p->cfg->tune.lambda_idx_p = 4;
@@ -179,7 +180,6 @@ static MPP_RET h265e_init(void *ctx, EncImplCfg *ctrlCfg)
rc_cfg->fqp_min_p = INT_MAX; rc_cfg->fqp_min_p = INT_MAX;
rc_cfg->fqp_max_i = INT_MAX; rc_cfg->fqp_max_i = INT_MAX;
rc_cfg->fqp_max_p = INT_MAX; rc_cfg->fqp_max_p = INT_MAX;
rc_cfg->cu_qp_delta_depth = 0;
INIT_LIST_HEAD(&p->rc_list); INIT_LIST_HEAD(&p->rc_list);
h265e_dbg_func("leave ctx %p\n", ctx); h265e_dbg_func("leave ctx %p\n", ctx);
@@ -574,6 +574,10 @@ static MPP_RET h265e_proc_h265_cfg(MppEncH265Cfg *dst, MppEncH265Cfg *src)
src->trans_cfg.cb_qp_offset, src->trans_cfg.cr_qp_offset); src->trans_cfg.cb_qp_offset, src->trans_cfg.cr_qp_offset);
src->trans_cfg.cr_qp_offset = src->trans_cfg.cb_qp_offset; src->trans_cfg.cr_qp_offset = src->trans_cfg.cb_qp_offset;
} }
if (src->trans_cfg.diff_cu_qp_delta_depth > 2 || src->trans_cfg.diff_cu_qp_delta_depth < 0) {
mpp_log("diff_cu_qp_delta_depth must be in [0, 2]\n");
src->trans_cfg.diff_cu_qp_delta_depth = 0;
}
memcpy(&dst->trans_cfg, &src->trans_cfg, sizeof(src->trans_cfg)); memcpy(&dst->trans_cfg, &src->trans_cfg, sizeof(src->trans_cfg));
} }

3
mpp/codec/enc/h265/h265e_ps.c
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@@ -400,14 +400,13 @@ MPP_RET h265e_set_sps(H265eCtx *ctx, H265eSps *sps, H265eVps *vps)
MPP_RET h265e_set_pps(H265eCtx *ctx, H265ePps *pps, H265eSps *sps) MPP_RET h265e_set_pps(H265eCtx *ctx, H265ePps *pps, H265eSps *sps)
{ {
MppEncH265Cfg *codec = &ctx->cfg->codec.h265; MppEncH265Cfg *codec = &ctx->cfg->codec.h265;
MppEncRcCfg *rc = &ctx->cfg->rc;
pps->m_bConstrainedIntraPred = codec->const_intra_pred; pps->m_bConstrainedIntraPred = codec->const_intra_pred;
pps->m_PPSId = 0; pps->m_PPSId = 0;
pps->m_SPSId = 0; pps->m_SPSId = 0;
pps->m_picInitQPMinus26 = 0; pps->m_picInitQPMinus26 = 0;
pps->m_useDQP = 1; pps->m_useDQP = 1;
pps->m_maxCuDQPDepth = rc->cu_qp_delta_depth; pps->m_maxCuDQPDepth = codec->trans_cfg.diff_cu_qp_delta_depth;
pps->m_minCuDQPSize = (sps->m_maxCUSize >> pps->m_maxCuDQPDepth); pps->m_minCuDQPSize = (sps->m_maxCUSize >> pps->m_maxCuDQPDepth);
pps->m_sps = sps; pps->m_sps = sps;

3
mpp/codec/mpp_enc_impl.cpp
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@@ -696,9 +696,6 @@ MPP_RET mpp_enc_proc_rc_cfg(MppCodingType coding, MppEncRcCfg *dst, MppEncRcCfg
dst->refresh_num = src->refresh_num; dst->refresh_num = src->refresh_num;
} }
if (change & MPP_ENC_RC_CFG_CHANGE_QPDD)
dst->cu_qp_delta_depth = src->cu_qp_delta_depth;
// parameter checking // parameter checking
if (dst->rc_mode >= MPP_ENC_RC_MODE_BUTT) { if (dst->rc_mode >= MPP_ENC_RC_MODE_BUTT) {
mpp_err("invalid rc mode %d should be RC_MODE_VBR or RC_MODE_CBR\n", mpp_err("invalid rc mode %d should be RC_MODE_VBR or RC_MODE_CBR\n",

5
test/mpi_enc_test.c
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@@ -385,7 +385,6 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
} }
mpp_enc_cfg_set_s32(cfg, "rc:max_reenc_times", 0); mpp_enc_cfg_set_s32(cfg, "rc:max_reenc_times", 0);
mpp_enc_cfg_set_s32(cfg, "rc:cu_qp_delta_depth", p->cu_qp_delta_depth);
mpp_enc_cfg_set_s32(cfg, "tune:anti_flicker_str", p->anti_flicker_str); mpp_enc_cfg_set_s32(cfg, "tune:anti_flicker_str", p->anti_flicker_str);
mpp_enc_cfg_set_s32(cfg, "tune:atr_str_i", p->atr_str_i); mpp_enc_cfg_set_s32(cfg, "tune:atr_str_i", p->atr_str_i);
mpp_enc_cfg_set_s32(cfg, "tune:atr_str_p", p->atr_str_p); mpp_enc_cfg_set_s32(cfg, "tune:atr_str_p", p->atr_str_p);
@@ -541,7 +540,9 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
if (constraint_set & 0x3f0000) if (constraint_set & 0x3f0000)
mpp_enc_cfg_set_s32(cfg, "h264:constraint_set", constraint_set); mpp_enc_cfg_set_s32(cfg, "h264:constraint_set", constraint_set);
} break; } break;
case MPP_VIDEO_CodingHEVC : case MPP_VIDEO_CodingHEVC : {
mpp_enc_cfg_set_s32(cfg, "h265:diff_cu_qp_delta_depth", p->cu_qp_delta_depth);
} break;
case MPP_VIDEO_CodingMJPEG : case MPP_VIDEO_CodingMJPEG :
case MPP_VIDEO_CodingVP8 : { case MPP_VIDEO_CodingVP8 : {
} break; } break;