[mpp_callback]: Optimize callback module

1. Move callback module to osal for later mpp_device callback.
2. Make callback command a pre-defined value to avoid include issue.
3. Separate callback cmd and param to separate header.

Change-Id: Ibd5cf11650a1cd2a326baddb82dc60fa1767ac87
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>

mpp/base/CMakeLists.txt

@@ -14,7 +14,6 @@ add_library(mpp_base STATIC
     mpp_buffer.cpp
     mpp_packet.cpp
     mpp_frame.cpp
-    mpp_callback.cpp
     mpp_task_impl.cpp
     mpp_task.cpp
     mpp_meta.cpp

mpp/base/inc/mpp_dec_cb_param.h

@@ -14,11 +14,10 @@
  * limitations under the License.
  */
 
-#ifndef __MPP_CALLBACK_H__
-#define __MPP_CALLBACK_H__
+#ifndef __MPP_CALLBACK_OPS_H__
+#define __MPP_CALLBACK_OPS_H__
 
 #include "rk_type.h"
-#include "mpp_err.h"
 
 typedef enum MppCallBackCmd_e {
     MPP_CALLBACK_NONE       = 0,
@@ -30,28 +29,11 @@ typedef enum MppCallBackCmd_e {
     MPP_CALLBACK_CMD_BUTT,
 } MppCbCmd;
 
-/* DEC_CALLBACK_BASE */
+/* DEC_PARSER_CALLBACK */
 typedef struct DecCallBackParam_t {
     void    *task;
     RK_U32  *regs;
     RK_U32  hard_err;
 } DecCbHalDone;
 
-typedef MPP_RET (*MppCallBack)(void *ctx, MppCbCmd cmd, void *param);
-
-typedef struct DecCallBackCtx_t {
-    MppCallBack callBack;
-    void        *ctx;
-} MppCbCtx;
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-MPP_RET mpp_callback(MppCbCtx *ctx, MppCbCmd cmd, void *param);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __MPP_CALLBACK_H__ */
+#endif /* __MPP_CALLBACK_OPS_H__ */

mpp/codec/dec/avs/avsd_api.c

@@ -29,7 +29,7 @@
 #include "avsd_syntax.h"
 #include "avsd_api.h"
 #include "avsd_parse.h"
-
+#include "mpp_dec_cb_param.h"
 
 RK_U32 avsd_parse_debug = 0;
 

mpp/codec/dec/h264/h264d_api.c

@@ -30,6 +30,7 @@
 #include "h264d_slice.h"
 #include "h264d_dpb.h"
 #include "h264d_init.h"
+#include "mpp_dec_cb_param.h"
 
 RK_U32 rkv_h264d_parse_debug = 0;
 

mpp/codec/dec/mpg4/mpg4d_api.c

@@ -26,6 +26,7 @@
 #include "mpg4d_api.h"
 #include "mpg4d_parser.h"
 #include "mpp_packet_impl.h"
+#include "mpp_dec_cb_param.h"
 
 #define MPG4D_INIT_STREAM_SIZE      SZ_64K
 

mpp/codec/mpp_dec.cpp

@@ -32,6 +32,7 @@
 #include "mpp_dec_cfg_impl.h"
 
 #include "mpp_dec_vproc.h"
+#include "mpp_dec_cb_param.h"
 
 static RK_U32 mpp_dec_debug = 0;
 
@@ -1562,19 +1563,17 @@ MPP_RET mpp_dec_set_cfg(MppDecCfgSet *dst, MppDecCfgSet *src)
     return MPP_OK;
 }
 
-MPP_RET mpp_dec_callback(void *ctx, MppCbCmd cmd, void *param)
+MPP_RET mpp_dec_callback_hal_to_parser(const char *caller, void *ctx,
+                                       RK_S32 cmd, void *param)
 {
     MppDecImpl *p = (MppDecImpl *)ctx;
     MPP_RET ret = MPP_OK;
+    (void) caller;
 
-    switch (cmd) {
-    case DEC_PARSER_CALLBACK : {
-        if (p->parser)
-            ret = mpp_parser_callback(p->parser, param);
-    } break;
-    default : {
-    } break;
-    }
+    mpp_assert(cmd == DEC_PARSER_CALLBACK);
+
+    if (p->parser)
+        ret = mpp_parser_callback(p->parser, param);
 
     return ret;
 }
@@ -1616,8 +1615,9 @@ MPP_RET mpp_dec_init(MppDec *dec, MppDecInitCfg *cfg)
     mpp_dec_set_cfg(&p->cfg, cfg->cfg);
     mpp_dec_update_cfg(p);
 
-    p->dec_cb.callBack = mpp_dec_callback;
+    p->dec_cb.callBack = mpp_dec_callback_hal_to_parser;
     p->dec_cb.ctx = p;
+    p->dec_cb.cmd = DEC_PARSER_CALLBACK;
 
     status = &p->cfg.status;
 

mpp/hal/rkdec/avsd/hal_avsd_api.c

@@ -29,6 +29,7 @@
 
 #include "hal_avsd_api.h"
 #include "hal_avsd_reg.h"
+#include "mpp_dec_cb_param.h"
 
 RK_U32 avsd_hal_debug = 0;
 
@@ -302,13 +303,13 @@ MPP_RET hal_avsd_wait(void *decoder, HalTaskInfo *task)
 
 __SKIP_HARD:
     if (p_hal->dec_cb) {
-        DecCbHalDone m_ctx;
+        DecCbHalDone param;
 
-        m_ctx.task = (void *)&task->dec;
-        m_ctx.regs = (RK_U32 *)p_hal->p_regs;
-        m_ctx.hard_err = (!((AvsdRegs_t *)p_hal->p_regs)->sw01.dec_rdy_int);
+        param.task = (void *)&task->dec;
+        param.regs = (RK_U32 *)p_hal->p_regs;
+        param.hard_err = (!((AvsdRegs_t *)p_hal->p_regs)->sw01.dec_rdy_int);
 
-        mpp_callback(p_hal->dec_cb, DEC_PARSER_CALLBACK, &m_ctx);
+        mpp_callback(p_hal->dec_cb, &param);
     }
     update_parameters(p_hal);
     memset(&p_hal->p_regs[1], 0, sizeof(RK_U32));

mpp/hal/rkdec/avsd/hal_avsd_reg.c

@@ -23,8 +23,7 @@
 #include "avsd_syntax.h"
 #include "hal_avsd_api.h"
 #include "hal_avsd_reg.h"
-
-
+#include "mpp_dec_cb_param.h"
 
 static RK_S32 get_queue_pic(AvsdHalCtx_t *p_hal)
 {

mpp/hal/rkdec/h264d/hal_h264d_rkv_reg.c

@@ -29,6 +29,7 @@
 
 #include "hal_h264d_global.h"
 #include "hal_h264d_rkv_reg.h"
+#include "mpp_dec_cb_param.h"
 
 /* Number registers for the decoder */
 #define DEC_RKV_REGISTERS          78
@@ -785,10 +786,10 @@ MPP_RET rkv_h264d_wait(void *hal, HalTaskInfo *task)
 
 __SKIP_HARD:
     if (p_hal->dec_cb) {
-        DecCbHalDone m_ctx;
+        DecCbHalDone param;
 
-        m_ctx.task = (void *)&task->dec;
-        m_ctx.regs = (RK_U32 *)p_regs;
+        param.task = (void *)&task->dec;
+        param.regs = (RK_U32 *)p_regs;
 
         if (p_regs->sw01.dec_error_sta
             || (!p_regs->sw01.dec_rdy_sta)
@@ -796,11 +797,11 @@ __SKIP_HARD:
             || p_regs->sw45.strmd_error_status
             || p_regs->sw45.colmv_error_ref_picidx
             || p_regs->sw76.strmd_detect_error_flag)
-            m_ctx.hard_err = 1;
+            param.hard_err = 1;
         else
-            m_ctx.hard_err = 0;
+            param.hard_err = 0;
 
-        mpp_callback(p_hal->dec_cb, DEC_PARSER_CALLBACK, &m_ctx);
+        mpp_callback(p_hal->dec_cb, &param);
     }
     memset(&p_regs->sw01, 0, sizeof(RK_U32));
     if (p_hal->fast_mode) {

mpp/hal/rkdec/h264d/hal_h264d_vdpu1.c

@@ -31,6 +31,7 @@
 #include "hal_h264d_vdpu_com.h"
 #include "hal_h264d_vdpu1.h"
 #include "hal_h264d_vdpu1_reg.h"
+#include "mpp_dec_cb_param.h"
 
 const RK_U32 vdpu1_ref_idx[16] = {
     14, 15, 16, 17, 18, 19, 20, 21,
@@ -968,13 +969,13 @@ MPP_RET vdpu1_h264d_wait(void *hal, HalTaskInfo *task)
 
 __SKIP_HARD:
     if (p_hal->dec_cb) {
-        DecCbHalDone m_ctx;
+        DecCbHalDone param;
 
-        m_ctx.task = (void *)&task->dec;
-        m_ctx.regs = (RK_U32 *)reg_ctx->regs;
-        m_ctx.hard_err = !p_regs->SwReg01.sw_dec_rdy_int;
+        param.task = (void *)&task->dec;
+        param.regs = (RK_U32 *)reg_ctx->regs;
+        param.hard_err = !p_regs->SwReg01.sw_dec_rdy_int;
 
-        mpp_callback(p_hal->dec_cb, DEC_PARSER_CALLBACK, &m_ctx);
+        mpp_callback(p_hal->dec_cb, &param);
     }
     memset(&p_regs->SwReg01, 0, sizeof(RK_U32));
     if (p_hal->fast_mode) {

mpp/hal/rkdec/h264d/hal_h264d_vdpu2.c

@@ -32,6 +32,7 @@
 #include "hal_h264d_vdpu_com.h"
 #include "hal_h264d_vdpu2.h"
 #include "hal_h264d_vdpu2_reg.h"
+#include "mpp_dec_cb_param.h"
 
 const RK_U32 vdpu2_ref_idx[16] = {
     84, 85, 86, 87, 88, 89, 90, 91,
@@ -1055,13 +1056,13 @@ MPP_RET vdpu2_h264d_wait(void *hal, HalTaskInfo *task)
 
 __SKIP_HARD:
     if (p_hal->dec_cb) {
-        DecCbHalDone m_ctx;
+        DecCbHalDone param;
 
-        m_ctx.task = (void *)&task->dec;
-        m_ctx.regs = (RK_U32 *)reg_ctx->regs;
-        m_ctx.hard_err = !p_regs->sw55.dec_rdy_sts;
+        param.task = (void *)&task->dec;
+        param.regs = (RK_U32 *)reg_ctx->regs;
+        param.hard_err = !p_regs->sw55.dec_rdy_sts;
 
-        mpp_callback(p_hal->dec_cb, DEC_PARSER_CALLBACK, &m_ctx);
+        mpp_callback(p_hal->dec_cb, &param);
     }
     memset(&p_regs->sw55, 0, sizeof(RK_U32));
     if (p_hal->fast_mode) {

mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c

@@ -31,6 +31,7 @@
 #include "hal_h264d_global.h"
 #include "hal_h264d_vdpu34x.h"
 #include "vdpu34x_h264d.h"
+#include "mpp_dec_cb_param.h"
 
 /* Number registers for the decoder */
 #define DEC_VDPU34X_REGISTERS       276
@@ -1066,10 +1067,10 @@ MPP_RET vdpu34x_h264d_wait(void *hal, HalTaskInfo *task)
 
 __SKIP_HARD:
     if (p_hal->dec_cb) {
-        DecCbHalDone m_ctx;
+        DecCbHalDone param;
 
-        m_ctx.task = (void *)&task->dec;
-        m_ctx.regs = (RK_U32 *)p_regs;
+        param.task = (void *)&task->dec;
+        param.regs = (RK_U32 *)p_regs;
 
         if (p_regs->irq_status.reg224.dec_error_sta ||
             (!p_regs->irq_status.reg224.dec_rdy_sta) ||
@@ -1077,11 +1078,11 @@ __SKIP_HARD:
             p_regs->irq_status.reg226.strmd_error_status ||
             p_regs->irq_status.reg227.colmv_error_ref_picidx ||
             p_regs->irq_status.reg225.strmd_detect_error_flag)
-            m_ctx.hard_err = 1;
+            param.hard_err = 1;
         else
-            m_ctx.hard_err = 0;
+            param.hard_err = 0;
 
-        mpp_callback(p_hal->dec_cb, DEC_PARSER_CALLBACK, &m_ctx);
+        mpp_callback(p_hal->dec_cb, &param);
     }
     memset(&p_regs->irq_status.reg224, 0, sizeof(RK_U32));
     if (p_hal->fast_mode) {

mpp/hal/rkdec/h265d/hal_h265d_rkv.c

@@ -1022,7 +1022,7 @@ ERR_PROC:
         hw_regs->sw_interrupt.sw_dec_empty_sta) {
         if (!reg_cxt->fast_mode) {
             if (reg_cxt->dec_cb)
-                mpp_callback(reg_cxt->dec_cb, DEC_PARSER_CALLBACK, &task->dec);
+                mpp_callback(reg_cxt->dec_cb, &task->dec);
         } else {
             MppFrame mframe = NULL;
             mpp_buf_slot_get_prop(reg_cxt->slots, task->dec.output,

mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c

@@ -1240,7 +1240,7 @@ ERR_PROC:
         hw_regs->irq_status.reg224.buf_empty_sta) {
         if (!reg_cxt->fast_mode) {
             if (reg_cxt->dec_cb)
-                mpp_callback(reg_cxt->dec_cb, DEC_PARSER_CALLBACK, &task->dec);
+                mpp_callback(reg_cxt->dec_cb, &task->dec);
         } else {
             MppFrame mframe = NULL;
             mpp_buf_slot_get_prop(reg_cxt->slots, task->dec.output,

mpp/hal/rkdec/vp9d/hal_vp9d_rkv.c

@@ -614,7 +614,7 @@ MPP_RET hal_vp9d_rkv_wait(void *hal, HalTaskInfo *task)
 
         hal_vp9d_update_counts(mpp_buffer_get_ptr(hw_ctx->count_base), task->dec.syntax.data);
 
-        mpp_callback(p_hal->dec_cb, DEC_PARSER_CALLBACK, &pic_param->counts);
+        mpp_callback(p_hal->dec_cb, &pic_param->counts);
     }
     if (p_hal->fast_mode) {
         hw_ctx->g_buf[task->dec.reg_index].use_flag = 0;

mpp/hal/rkdec/vp9d/hal_vp9d_vdpu34x.c

@@ -959,7 +959,7 @@ static MPP_RET hal_vp9d_vdpu34x_wait(void *hal, HalTaskInfo *task)
     if (p_hal->dec_cb && task->dec.flags.wait_done) {
         DXVA_PicParams_VP9 *pic_param = (DXVA_PicParams_VP9*)task->dec.syntax.data;
         hal_vp9d_update_counts(mpp_buffer_get_ptr(hw_ctx->count_base), task->dec.syntax.data);
-        mpp_callback(p_hal->dec_cb, DEC_PARSER_CALLBACK, &pic_param->counts);
+        mpp_callback(p_hal->dec_cb, &pic_param->counts);
     }
 #endif
     if (p_hal->fast_mode) {

mpp/hal/vpu/h265e/hal_h265e_vepu22.c

@@ -2069,7 +2069,7 @@ MPP_RET hal_h265e_vepu22_wait(void *hal, HalTaskInfo *task)
         feedback.bs_size = 0;
     }
 
-    mpp_callback(ctx->enc_cb, ENC_CALLBACK_BASE, &feedback);
+    mpp_callback(ctx->enc_cb, &feedback);
     task->enc.length = feedback.bs_size;
     hal_h265e_dbg_func("leave hal %p,status = %d,size = %d\n",
                        hal, feedback.status, feedback.bs_size);

mpp/hal/vpu/m2vd/hal_m2vd_vdpu1.c

@@ -310,7 +310,7 @@ MPP_RET hal_m2vd_vdpu1_wait(void *hal, HalTaskInfo *task)
 
     if (reg_out->sw01.dec_error_int | reg_out->sw01.dec_buffer_int) {
         if (ctx->dec_cb)
-            mpp_callback(ctx->dec_cb, DEC_PARSER_CALLBACK, NULL);
+            mpp_callback(ctx->dec_cb, NULL);
     }
 
     (void)task;

mpp/hal/vpu/m2vd/hal_m2vd_vdpu2.c

@@ -387,7 +387,7 @@ MPP_RET hal_m2vd_vdpu2_wait(void *hal, HalTaskInfo *task)
     }
     if (reg_out->sw55.dec_error_int | reg_out->sw55.dec_buffer_int) {
         if (ctx->dec_cb)
-            mpp_callback(ctx->dec_cb, DEC_PARSER_CALLBACK, NULL);
+            mpp_callback(ctx->dec_cb, NULL);
     }
 
     if (M2VH_DBG_IRQ & m2vh_debug)

mpp/hal/vpu/mpg4d/hal_m4vd_vdpu1.c

@@ -30,6 +30,7 @@
 #include "hal_m4vd_com.h"
 #include "hal_m4vd_vdpu1.h"
 #include "hal_m4vd_vdpu1_reg.h"
+#include "mpp_dec_cb_param.h"
 
 static void vdpu1_mpg4d_setup_regs_by_syntax(hal_mpg4_ctx *ctx, MppSyntax syntax)
 {
@@ -466,13 +467,13 @@ MPP_RET vdpu1_mpg4d_wait(void *hal, HalTaskInfo *task)
         }
     }
     if (ctx->dec_cb) {
-        DecCbHalDone m_ctx;
+        DecCbHalDone param;
 
-        m_ctx.task = (void *)&task->dec;
-        m_ctx.regs = (RK_U32 *)ctx->regs;
-        m_ctx.hard_err = !regs->SwReg01.sw_dec_rdy_int;
+        param.task = (void *)&task->dec;
+        param.regs = (RK_U32 *)ctx->regs;
+        param.hard_err = !regs->SwReg01.sw_dec_rdy_int;
 
-        mpp_callback(ctx->dec_cb, DEC_PARSER_CALLBACK, &m_ctx);
+        mpp_callback(ctx->dec_cb, &param);
     }
 
     memset(&regs->SwReg01, 0, sizeof(RK_U32));

mpp/hal/vpu/mpg4d/hal_m4vd_vdpu2.c

@@ -30,6 +30,7 @@
 #include "hal_m4vd_com.h"
 #include "hal_m4vd_vdpu2.h"
 #include "hal_m4vd_vdpu2_reg.h"
+#include "mpp_dec_cb_param.h"
 
 static void vdpu2_mpg4d_setup_regs_by_syntax(hal_mpg4_ctx *ctx, MppSyntax syntax)
 {
@@ -465,15 +466,15 @@ MPP_RET vdpu2_mpg4d_wait(void *hal, HalTaskInfo *task)
     }
 
     if (ctx->dec_cb) {
-        DecCbHalDone m_ctx = { 0 };
+        DecCbHalDone param = { 0 };
 
         if (!regs->reg55_Interrupt.sw_dec_rdy_int)
-            m_ctx.hard_err = 1;
+            param.hard_err = 1;
 
-        m_ctx.task = (void *)&task->dec;
-        m_ctx.regs = (RK_U32 *)ctx->regs;
+        param.task = (void *)&task->dec;
+        param.regs = (RK_U32 *)ctx->regs;
 
-        mpp_callback(ctx->dec_cb, DEC_PARSER_CALLBACK, &m_ctx);
+        mpp_callback(ctx->dec_cb, &param);
     }
 
     (void)task;

osal/CMakeLists.txt

@@ -38,6 +38,7 @@ add_library(osal STATIC
     mpp_runtime.cpp
     mpp_allocator.cpp
     mpp_mem_pool.cpp
+    mpp_callback.cpp
     mpp_eventfd.cpp
     mpp_thread.cpp
     mpp_common.cpp

osal/inc/mpp_callback.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright 2021 Rockchip Electronics Co. LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MPP_CALLBACK_H__
+#define __MPP_CALLBACK_H__
+
+#include "rk_type.h"
+#include "mpp_err.h"
+
+typedef MPP_RET (*MppCallBack)(const char *caller, void *ctx, RK_S32 cmd, void *param);
+
+typedef struct DecCallBackCtx_t {
+    MppCallBack callBack;
+    void        *ctx;
+    RK_S32      cmd;
+} MppCbCtx;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define mpp_callback(ctx, param)  mpp_callback_f(__FUNCTION__, ctx, param)
+
+MPP_RET mpp_callback_f(const char *caller, MppCbCtx *ctx, void *param);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MPP_CALLBACK_H__ */

osal/mpp_callback.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright 2020 Rockchip Electronics Co. LTD
+ * Copyright 2021 Rockchip Electronics Co. LTD
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -18,10 +18,10 @@
 
 #include "mpp_callback.h"
 
-MPP_RET mpp_callback(MppCbCtx *ctx, MppCbCmd cmd, void *param)
+MPP_RET mpp_callback_f(const char *caller, MppCbCtx *ctx, void *param)
 {
     if (ctx && ctx->ctx && ctx->callBack)
-        return ctx->callBack(ctx->ctx, cmd, param);
+        return ctx->callBack(caller, ctx->ctx, ctx->cmd, param);
 
     return MPP_OK;
 }