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[hal_jpegd]: Add have_pp check

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Change-Id: Id9b9a5004d0bdc5fd88e084966ada360f575b1a7
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
This commit is contained in:
Herman Chen
2021-08-18 10:05:56 +08:00
parent 6da83e59c3
commit 549ef870ce
5 changed files with 16 additions and 1 deletions
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2
mpp/hal/vpu/jpegd/hal_jpegd_base.h
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@@ -39,6 +39,7 @@ typedef struct JpegdHalCtx {
MppBufSlots frame_slots;
MppDev dev;
MppClientType dev_type;
RK_U32 codec_type;
void *regs;
MppBufferGroup group;
MppBuffer frame_buf;
@@ -55,6 +56,7 @@ typedef struct JpegdHalCtx {
RK_S32 pkt_fd; /* input stream's physical address(fd) */
RK_S32 frame_fd; /* output picture's physical address(fd) */
RK_U32 have_pp;
PPInfo pp_info;
} JpegdHalCtx;

12
mpp/hal/vpu/jpegd/hal_jpegd_common.c
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@@ -432,6 +432,15 @@ void jpegd_write_qp_ac_dc_table(JpegdHalCtx *ctx,
return;
}
void jpegd_check_have_pp(JpegdHalCtx *ctx)
{
ctx->codec_type = mpp_get_vcodec_type();
ctx->have_pp = ((ctx->dev_type == VPU_CLIENT_VDPU1) &&
(ctx->codec_type & (1 << VPU_CLIENT_VDPU1_PP))) ||
((ctx->dev_type == VPU_CLIENT_VDPU2) &&
(ctx->codec_type & (1 << VPU_CLIENT_VDPU2_PP)));
}
MPP_RET jpegd_setup_output_fmt(JpegdHalCtx *ctx, JpegdSyntax *s, RK_S32 output)
{
jpegd_dbg_func("enter\n");
@@ -442,7 +451,8 @@ MPP_RET jpegd_setup_output_fmt(JpegdHalCtx *ctx, JpegdSyntax *s, RK_S32 output)
MppFrame frm = NULL;
MPP_RET ret = MPP_OK;
if (ctx->set_output_fmt_flag && (ctx->output_fmt != s->output_fmt)) {
if (ctx->have_pp && ctx->set_output_fmt_flag &&
ctx->output_fmt != s->output_fmt) {
MppFrameFormat fmt = MPP_FMT_BUTT;
/* Using pp to convert all format to yuv420sp */

1
mpp/hal/vpu/jpegd/hal_jpegd_common.h
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@@ -75,6 +75,7 @@ RK_U32 jpegd_vdpu_tail_0xFF_patch(MppBuffer stream, RK_U32 length);
void jpegd_write_qp_ac_dc_table(JpegdHalCtx *ctx,
JpegdSyntax*syntax);
void jpegd_check_have_pp(JpegdHalCtx *ctx);
MPP_RET jpegd_setup_output_fmt(JpegdHalCtx *ctx, JpegdSyntax *syntax,
RK_S32 output);

1
mpp/hal/vpu/jpegd/hal_jpegd_vdpu1.c
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@@ -785,6 +785,7 @@ MPP_RET hal_jpegd_vdpu1_init(void *hal, MppHalCfg *cfg)
pp_info->pp_enable = 0;
pp_info->pp_in_fmt = PP_IN_FORMAT_YUV420SEMI;
pp_info->pp_out_fmt = PP_OUT_FORMAT_YUV420INTERLAVE;
jpegd_check_have_pp(JpegHalCtx);
JpegHalCtx->output_fmt = MPP_FMT_YUV420SP;
JpegHalCtx->set_output_fmt_flag = 0;

1
mpp/hal/vpu/jpegd/hal_jpegd_vdpu2.c
View File

@@ -771,6 +771,7 @@ MPP_RET hal_jpegd_vdpu2_init(void *hal, MppHalCfg *cfg)
pp_info->pp_enable = 0;
pp_info->pp_in_fmt = PP_IN_FORMAT_YUV420SEMI;
pp_info->pp_out_fmt = PP_OUT_FORMAT_YUV420INTERLAVE;
jpegd_check_have_pp(JpegHalCtx);
JpegHalCtx->output_fmt = MPP_FMT_YUV420SP;
JpegHalCtx->set_output_fmt_flag = 0;