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https://github.com/nyanmisaka/mpp.git
synced 2025-10-08 10:30:04 +08:00
[vp8e]: Fix vp8 reencode logic error.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com> Change-Id: I0ca2e7725fb2dfb746c882eed14c0e9cf17353db Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
This commit is contained in:
@@ -785,7 +785,7 @@ static MPP_RET set_picbuf_ref(void *hal)
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return MPP_OK;
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}
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static void write_ivf_header(void *hal, RK_U8 *out)
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void write_ivf_header(void *hal, RK_U8 *dst)
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{
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RK_U8 data[IVF_HDR_BYTES] = {0};
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@@ -826,7 +826,7 @@ static void write_ivf_header(void *hal, RK_U8 *out)
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data[26] = (ctx->frame_cnt >> 16) & 0xff;
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data[27] = (ctx->frame_cnt >> 24) & 0xff;
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memcpy(out, data, IVF_HDR_BYTES);
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memcpy(dst, data, IVF_HDR_BYTES);
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}
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static void write_ivf_frame(void *hal, RK_U8 *out)
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@@ -1569,12 +1569,7 @@ MPP_RET hal_vp8e_update_buffers(void *hal, HalEncTask *task)
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RK_S32 disable_ivf = ctx->cfg->codec.vp8.disable_ivf;
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if (!disable_ivf) {
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if (ctx->frame_cnt == 0) {
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write_ivf_header(hal, p_out);
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p_out += IVF_HDR_BYTES;
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enc_task->length += IVF_HDR_BYTES;
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}
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p_out += enc_task->length;
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if (ctx->frame_size) {
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write_ivf_frame(ctx, p_out);
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@@ -357,8 +357,9 @@ typedef struct hal_vp8e_ctx_s {
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RK_U32 frame_size;
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RK_U32 buffer_ready;
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RK_U32 ivf_hdr_rdy;
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RK_U64 frame_cnt;
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RK_U8 last_frm_intra;
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RK_U32 last_frm_intra;
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Vp8FrmType frame_type;
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RK_U32 mb_per_frame;
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@@ -376,6 +377,7 @@ MPP_RET hal_vp8e_enc_strm_code(void *hal, HalEncTask *info);
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MPP_RET hal_vp8e_init_qp_table(void *hal);
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MPP_RET hal_vp8e_setup(void *hal);
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MPP_RET hal_vp8e_buf_free(void *hal);
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void write_ivf_header(void *hal, RK_U8 *dst);
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#ifdef __cplusplus
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}
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#endif
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@@ -307,6 +307,7 @@ static MPP_RET hal_vp8e_vepu1_init_v2(void *hal, MppEncHalCfg *cfg)
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ctx->frame_type = VP8E_FRM_KEY;
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ctx->prev_frame_lost = 0;
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ctx->frame_size = 0;
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ctx->ivf_hdr_rdy = 0;
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ctx->reg_size = SWREG_AMOUNT_VEPU1;
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hw_cfg->irq_disable = 0;
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@@ -448,6 +449,7 @@ static MPP_RET hal_vp8e_vepu1_wait_v2(void *hal, HalEncTask *task)
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Vp8eFeedback *fb = &ctx->feedback;
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Vp8eVepu1Reg_t *regs = (Vp8eVepu1Reg_t *)ctx->regs;
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RK_S32 sw_length = task->length;
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if (NULL == ctx->dev) {
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mpp_err_f("invalid dev ctx\n");
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@@ -470,7 +472,7 @@ static MPP_RET hal_vp8e_vepu1_wait_v2(void *hal, HalEncTask *task)
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ctx->frame_cnt++;
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task->rc_task->info.bit_real = ctx->frame_size << 3;
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task->hw_length = task->length;
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task->hw_length = task->length - sw_length;
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return ret;
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}
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@@ -493,6 +495,15 @@ static MPP_RET hal_vp8e_vepu1_get_task_v2(void *hal, HalEncTask *task)
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ctx->frame_type = task->rc_task->frm.is_intra ? VP8E_FRM_KEY : VP8E_FRM_P;
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if (!ctx->cfg->codec.vp8.disable_ivf && !ctx->ivf_hdr_rdy) {
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RK_U8 *p_out = mpp_buffer_get_ptr(task->output);
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write_ivf_header(hal, p_out);
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task->length += IVF_HDR_BYTES;
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ctx->ivf_hdr_rdy = 1;
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}
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return MPP_OK;
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}
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@@ -311,6 +311,7 @@ static MPP_RET hal_vp8e_vepu2_init_v2(void *hal, MppEncHalCfg *cfg)
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ctx->frame_type = VP8E_FRM_KEY;
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ctx->prev_frame_lost = 0;
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ctx->frame_size = 0;
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ctx->ivf_hdr_rdy = 0;
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ctx->reg_size = SWREG_AMOUNT_VEPU2;
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hw_cfg->irq_disable = 0;
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@@ -451,6 +452,7 @@ static MPP_RET hal_vp8e_vepu2_wait_v2(void *hal, HalEncTask *task)
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Vp8eFeedback *fb = &ctx->feedback;
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Vp8eVepu2Reg_t *regs = (Vp8eVepu2Reg_t *) ctx->regs;
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RK_S32 sw_length = task->length;
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if (NULL == ctx->dev) {
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mpp_err_f("invalid dev ctx\n");
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@@ -473,7 +475,7 @@ static MPP_RET hal_vp8e_vepu2_wait_v2(void *hal, HalEncTask *task)
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ctx->frame_cnt++;
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task->rc_task->info.bit_real = ctx->frame_size << 3;
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task->hw_length = task->length;
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task->hw_length = task->length - sw_length;
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return ret;
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}
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@@ -494,6 +496,16 @@ static MPP_RET hal_vp8e_vepu2_get_task_v2(void *hal, HalEncTask *task)
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}
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ctx->frame_type = task->rc_task->frm.is_intra ? VP8E_FRM_KEY : VP8E_FRM_P;
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if (!ctx->cfg->codec.vp8.disable_ivf && !ctx->ivf_hdr_rdy) {
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RK_U8 *p_out = mpp_buffer_get_ptr(task->output);
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write_ivf_header(hal, p_out);
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task->length += IVF_HDR_BYTES;
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ctx->ivf_hdr_rdy = 1;
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}
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return MPP_OK;
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}
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