[jpege]: add vpu1 and vpu2 jpeg encode rgb fmt support

Modify some register params to support 32-bit rgb fmt,including
vepu1 and vepu2.

Change-Id: I265ad77eb02f95cc51de3bc51a340b56cdebb702
Signed-off-by: sliver.chen <sliver.chen@rock-chips.com>
This commit is contained in:
sliver.chen
2018-01-22 19:42:14 +08:00
committed by Herman Chen
parent 53a02bf26f
commit 381a9d3e3b
2 changed files with 73 additions and 14 deletions

View File

@@ -167,6 +167,9 @@ MPP_RET hal_jpege_vepu1_gen_regs(void *hal, HalTaskInfo *task)
RK_S32 bitpos; RK_S32 bitpos;
RK_S32 bytepos; RK_S32 bytepos;
RK_U32 deflt_cfg; RK_U32 deflt_cfg;
RK_U32 r_mask = 0;
RK_U32 g_mask = 0;
RK_U32 b_mask = 0;
syntax->width = width; syntax->width = width;
syntax->height = height; syntax->height = height;
@@ -200,34 +203,61 @@ MPP_RET hal_jpege_vepu1_gen_regs(void *hal, HalTaskInfo *task)
((16 & (63)) << 8) | ((16 & (63)) << 8) |
((0 & (1)) << 6) | ((0 & (1)) << 6) |
((0 & (1)) << 5) | ((0 & (1)) << 5) |
((0 & (1)) << 4) | ((1 & (1)) << 4) |
((1 & (1)) << 3) | ((1 & (1)) << 3) |
((1 & (1)) << 1); ((1 & (1)) << 1);
switch (fmt) { switch (fmt) {
case MPP_FMT_YUV420P : { case MPP_FMT_YUV420P : {
val32 = 0; val32 = 0;
r_mask = 0;
g_mask = 0;
b_mask = 0;
} break; } break;
case MPP_FMT_YUV420SP : { case MPP_FMT_YUV420SP : {
val32 = 1; val32 = 1;
r_mask = 0;
g_mask = 0;
b_mask = 0;
} break; } break;
case MPP_FMT_YUV422_YUYV : { case MPP_FMT_YUV422_YUYV : {
val32 = 2; val32 = 2;
r_mask = 0;
g_mask = 0;
b_mask = 0;
} break; } break;
case MPP_FMT_YUV422_UYVY : { case MPP_FMT_YUV422_UYVY : {
val32 = 3; val32 = 3;
r_mask = 0;
g_mask = 0;
b_mask = 0;
} break; } break;
case MPP_FMT_RGB565 : { case MPP_FMT_RGB565 : {
val32 = 4; val32 = 4;
r_mask = 4;
g_mask = 10;
b_mask = 15;
} break; } break;
case MPP_FMT_RGB444 : { case MPP_FMT_RGB444 : {
val32 = 5; val32 = 5;
r_mask = 3;
g_mask = 7;
b_mask = 11;
} break; } break;
case MPP_FMT_RGB888 : { case MPP_FMT_RGB888 : {
val32 = 6; val32 = 7;
r_mask = 7;
g_mask = 15;
b_mask = 23;
} break;
case MPP_FMT_BGR888 : {
val32 = 7;
r_mask = 23;
g_mask = 15;
b_mask = 7;
} break; } break;
case MPP_FMT_RGB101010 : { case MPP_FMT_RGB101010 : {
val32 = 7; val32 = 8;
} break; } break;
default : { default : {
mpp_err_f("invalid input format %d\n", fmt); mpp_err_f("invalid input format %d\n", fmt);
@@ -352,9 +382,9 @@ MPP_RET hal_jpege_vepu1_gen_regs(void *hal, HalTaskInfo *task)
regs[53] = coeffA | (coeffB << 16); regs[53] = coeffA | (coeffB << 16);
regs[54] = coeffC | (coeffE << 16); regs[54] = coeffC | (coeffE << 16);
regs[55] = (0 << 26) | regs[55] = ((r_mask & 0x1f) << 26) |
(0 << 21) | ((g_mask & 0x1f) << 21) |
(0 << 16) | coeffF; ((b_mask & 0x1f) << 16) | coeffF;
} }
regs[14] |= 0x001; regs[14] |= 0x001;
@@ -487,7 +517,8 @@ MPP_RET hal_jpege_vepu1_control(void *hal, RK_S32 cmd, void *param)
if (cfg->format != MPP_FMT_YUV420SP && if (cfg->format != MPP_FMT_YUV420SP &&
cfg->format != MPP_FMT_YUV420P && cfg->format != MPP_FMT_YUV420P &&
cfg->format != MPP_FMT_RGB888) { cfg->format != MPP_FMT_RGB888 &&
cfg->format != MPP_FMT_BGR888) {
mpp_err("jpege: invalid format %d is not supportted\n", cfg->format); mpp_err("jpege: invalid format %d is not supportted\n", cfg->format);
ret = MPP_NOK; ret = MPP_NOK;
} }

View File

@@ -165,6 +165,9 @@ MPP_RET hal_jpege_vepu2_gen_regs(void *hal, HalTaskInfo *task)
RK_U32 val32; RK_U32 val32;
RK_S32 bitpos; RK_S32 bitpos;
RK_S32 bytepos; RK_S32 bytepos;
RK_U32 r_mask = 0;
RK_U32 g_mask = 0;
RK_U32 b_mask = 0;
syntax->width = width; syntax->width = width;
syntax->height = height; syntax->height = height;
@@ -233,27 +236,49 @@ MPP_RET hal_jpege_vepu2_gen_regs(void *hal, HalTaskInfo *task)
switch (fmt) { switch (fmt) {
case MPP_FMT_YUV420P : { case MPP_FMT_YUV420P : {
val32 = 0; val32 = 0;
r_mask = g_mask = b_mask = 0;
} break; } break;
case MPP_FMT_YUV420SP : { case MPP_FMT_YUV420SP : {
val32 = 1; val32 = 1;
r_mask = g_mask = b_mask = 0;
} break; } break;
case MPP_FMT_YUV422_YUYV : { case MPP_FMT_YUV422_YUYV : {
val32 = 2; val32 = 2;
r_mask = g_mask = b_mask = 0;
} break; } break;
case MPP_FMT_YUV422_UYVY : { case MPP_FMT_YUV422_UYVY : {
val32 = 3; val32 = 3;
r_mask = g_mask = b_mask = 0;
} break; } break;
case MPP_FMT_RGB565 : { case MPP_FMT_RGB565 : {
val32 = 4; val32 = 4;
r_mask = 15;
g_mask = 10;
b_mask = 4;
} break; } break;
case MPP_FMT_RGB444 : { case MPP_FMT_RGB444 : {
val32 = 5; val32 = 6;
r_mask = 11;
g_mask = 7;
b_mask = 3;
} break; } break;
case MPP_FMT_RGB888 : { case MPP_FMT_RGB888 : {
val32 = 6; val32 = 7;
r_mask = 7;
g_mask = 15;
b_mask = 23;
} break;
case MPP_FMT_BGR888 : {
val32 = 7;
r_mask = 23;
g_mask = 15;
b_mask = 7;
} break; } break;
case MPP_FMT_RGB101010 : { case MPP_FMT_RGB101010 : {
val32 = 7; val32 = 8;
r_mask = 29;
g_mask = 19;
b_mask = 9;
} break; } break;
default : { default : {
mpp_err_f("invalid input format %d\n", fmt); mpp_err_f("invalid input format %d\n", fmt);
@@ -321,7 +346,9 @@ MPP_RET hal_jpege_vepu2_gen_regs(void *hal, HalTaskInfo *task)
} }
/* TODO: 98 RGB bit mask */ /* TODO: 98 RGB bit mask */
regs[98] = 0; regs[98] = (r_mask & 0x1f) << 16 |
(g_mask & 0x1f) << 8 |
(b_mask & 0x1f);
regs[103] = (hor_stride >> 4) << 8 | regs[103] = (hor_stride >> 4) << 8 |
(ver_stride >> 4) << 20 | (ver_stride >> 4) << 20 |
@@ -331,10 +358,10 @@ MPP_RET hal_jpege_vepu2_gen_regs(void *hal, HalTaskInfo *task)
/* input byte swap configure */ /* input byte swap configure */
regs[105] = 7 << 26; regs[105] = 7 << 26;
if (val32 < 4) { if (fmt < MPP_FMT_RGB565) {
// YUV format // YUV format
regs[105] |= (7 << 29); regs[105] |= (7 << 29);
} else if (val32 < 7) { } else if (fmt < MPP_FMT_RGB888) {
// 16bit RGB // 16bit RGB
regs[105] |= (2 << 29); regs[105] |= (2 << 29);
} else { } else {
@@ -476,7 +503,8 @@ MPP_RET hal_jpege_vepu2_control(void *hal, RK_S32 cmd, void *param)
if (cfg->format != MPP_FMT_YUV420SP && if (cfg->format != MPP_FMT_YUV420SP &&
cfg->format != MPP_FMT_YUV420P && cfg->format != MPP_FMT_YUV420P &&
cfg->format != MPP_FMT_RGB888) { cfg->format != MPP_FMT_RGB888 &&
cfg->format != MPP_FMT_BGR888) {
mpp_err("jpege: invalid format %d is not supportted\n", cfg->format); mpp_err("jpege: invalid format %d is not supportted\n", cfg->format);
ret = MPP_NOK; ret = MPP_NOK;
} }