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[hal_mpeg4d]: setup all reference frame register regardless frame type

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git-svn-id: https://10.10.10.66:8443/svn/MediaProcessPlatform/trunk/mpp@988 6e48237b-75ef-9749-8fc9-41990f28c85a
This commit is contained in:
ChenHengming
2016-07-07 11:03:47 +00:00
parent 7f62c08337
commit 304292feb7
1 changed files with 4 additions and 0 deletions
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4
mpp/hal/vpu/mpg4d/hal_mpg4d_reg.c
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@@ -235,6 +235,8 @@ static void vpu_mpg4d_setup_regs_by_syntax(hal_mpg4_ctx *ctx, MppSyntax syntax)
regs->reg131_ref0_base = (RK_U32)ctx->fd_curr; regs->reg131_ref0_base = (RK_U32)ctx->fd_curr;
regs->reg148_ref1_base = (RK_U32)ctx->fd_curr; regs->reg148_ref1_base = (RK_U32)ctx->fd_curr;
} }
regs->reg134_ref2_base = (RK_U32)ctx->fd_curr;
regs->reg135_ref3_base = (RK_U32)ctx->fd_curr;
regs->reg136.sw_hrz_bit_of_fwd_mv = pp->vop_fcode_forward; regs->reg136.sw_hrz_bit_of_fwd_mv = pp->vop_fcode_forward;
regs->reg136.sw_vrz_bit_of_fwd_mv = pp->vop_fcode_forward; regs->reg136.sw_vrz_bit_of_fwd_mv = pp->vop_fcode_forward;
@@ -247,6 +249,8 @@ static void vpu_mpg4d_setup_regs_by_syntax(hal_mpg4_ctx *ctx, MppSyntax syntax)
regs->reg131_ref0_base = (RK_U32)ctx->fd_curr; regs->reg131_ref0_base = (RK_U32)ctx->fd_curr;
regs->reg148_ref1_base = (RK_U32)ctx->fd_curr; regs->reg148_ref1_base = (RK_U32)ctx->fd_curr;
regs->reg134_ref2_base = (RK_U32)ctx->fd_curr;
regs->reg135_ref3_base = (RK_U32)ctx->fd_curr;
regs->reg57_enable_ctrl.sw_write_mvs_e = 0; regs->reg57_enable_ctrl.sw_write_mvs_e = 0;
regs->reg62_directmv_base = mv_buf_fd; regs->reg62_directmv_base = mv_buf_fd;