From 304292feb72e51019c15ff9a923ab406d21c3aef Mon Sep 17 00:00:00 2001 From: ChenHengming Date: Thu, 7 Jul 2016 11:03:47 +0000 Subject: [PATCH] [hal_mpeg4d]: setup all reference frame register regardless frame type git-svn-id: https://10.10.10.66:8443/svn/MediaProcessPlatform/trunk/mpp@988 6e48237b-75ef-9749-8fc9-41990f28c85a --- mpp/hal/vpu/mpg4d/hal_mpg4d_reg.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/mpp/hal/vpu/mpg4d/hal_mpg4d_reg.c b/mpp/hal/vpu/mpg4d/hal_mpg4d_reg.c index 7f0d8d3d..2696664d 100644 --- a/mpp/hal/vpu/mpg4d/hal_mpg4d_reg.c +++ b/mpp/hal/vpu/mpg4d/hal_mpg4d_reg.c @@ -235,6 +235,8 @@ static void vpu_mpg4d_setup_regs_by_syntax(hal_mpg4_ctx *ctx, MppSyntax syntax) regs->reg131_ref0_base = (RK_U32)ctx->fd_curr; regs->reg148_ref1_base = (RK_U32)ctx->fd_curr; } + regs->reg134_ref2_base = (RK_U32)ctx->fd_curr; + regs->reg135_ref3_base = (RK_U32)ctx->fd_curr; regs->reg136.sw_hrz_bit_of_fwd_mv = pp->vop_fcode_forward; regs->reg136.sw_vrz_bit_of_fwd_mv = pp->vop_fcode_forward; @@ -247,6 +249,8 @@ static void vpu_mpg4d_setup_regs_by_syntax(hal_mpg4_ctx *ctx, MppSyntax syntax) regs->reg131_ref0_base = (RK_U32)ctx->fd_curr; regs->reg148_ref1_base = (RK_U32)ctx->fd_curr; + regs->reg134_ref2_base = (RK_U32)ctx->fd_curr; + regs->reg135_ref3_base = (RK_U32)ctx->fd_curr; regs->reg57_enable_ctrl.sw_write_mvs_e = 0; regs->reg62_directmv_base = mv_buf_fd;