package/mpp
1
0
Fork 0
mirror of https://github.com/nyanmisaka/mpp.git synced 2025-09-26 21:15:53 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity

refacotr[base]: Refactor mpp_dec_cfg from C++ to C

Browse Source 
1. Change mpp_dec_cfg entry_table define
2. Use new update function to update MppDecCfgSet

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ibaf98d69664c107f79ea51e6cd83419dc1bf450a
This commit is contained in:
Herman Chen
2025-05-13 11:11:37 +08:00
parent 47ba2a350e
commit 301d85254f
11 changed files with 246 additions and 474 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
mpp/base/CMakeLists.txt
View File

@@ -7,7 +7,7 @@ add_library(mpp_base OBJECT
mpp_enc_refs.cpp
mpp_enc_ref.cpp
mpp_enc_cfg.cpp
mpp_dec_cfg.cpp
mpp_dec_cfg.c
mpp_sys_cfg.cpp
mpp_sys_cfg_st.cpp
mpp_cluster.cpp

169
mpp/base/mpp_dec_cfg.c Normal file
View File

@@ -0,0 +1,169 @@
/* SPDX-License-Identifier: Apache-2.0 OR MIT */
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*/
#define MODULE_TAG "mpp_dec_cfg"
#include "rk_vdec_cfg.h"
#include <string.h>
#include "mpp_env.h"
#include "mpp_mem.h"
#include "mpp_lock.h"
#include "mpp_time.h"
#include "mpp_debug.h"
#include "mpp_common.h"
#include "mpp_singleton.h"
#include "mpp_trie.h"
#include "mpp_cfg.h"
#include "mpp_cfg_io.h"
#include "mpp_dec_cfg.h"
#define MPP_DEC_CFG_ENTRY_TABLE(prefix, ENTRY, STRCT, EHOOK, SHOOK, ALIAS) \
CFG_DEF_START() \
STRUCT_START(base) \
ENTRY(prefix, u32, rk_u32, type, FLAG_BASE(0), base, type) \
ENTRY(prefix, u32, rk_u32, coding, FLAG_AT(1), base, coding) \
ENTRY(prefix, u32, rk_u32, hw_type, FLAG_AT(2), base, hw_type) \
ENTRY(prefix, u32, rk_u32, batch_mode, FLAG_AT(3), base, batch_mode) \
ENTRY(prefix, u32, rk_u32, out_fmt, FLAG_AT(4), base, out_fmt) \
ENTRY(prefix, u32, rk_u32, fast_out, FLAG_AT(5), base, fast_out) \
ENTRY(prefix, u32, rk_u32, fast_parse, FLAG_AT(6), base, fast_parse) \
ENTRY(prefix, u32, rk_u32, split_parse, FLAG_AT(7), base, split_parse) \
ENTRY(prefix, u32, rk_u32, internal_pts, FLAG_AT(8), base, internal_pts) \
ENTRY(prefix, u32, rk_u32, sort_pts, FLAG_AT(9), base, sort_pts) \
ENTRY(prefix, u32, rk_u32, disable_error, FLAG_AT(10), base, disable_error) \
ENTRY(prefix, u32, rk_u32, enable_vproc, FLAG_AT(11), base, enable_vproc) \
ENTRY(prefix, u32, rk_u32, enable_fast_play, FLAG_AT(12), base, enable_fast_play) \
ENTRY(prefix, u32, rk_u32, enable_hdr_meta, FLAG_AT(13), base, enable_hdr_meta) \
ENTRY(prefix, u32, rk_u32, enable_thumbnail, FLAG_AT(14), base, enable_thumbnail) \
ENTRY(prefix, u32, rk_u32, enable_mvc, FLAG_AT(15), base, enable_mvc) \
ENTRY(prefix, u32, rk_u32, disable_dpb_chk, FLAG_AT(16), base, disable_dpb_chk) \
ENTRY(prefix, u32, rk_u32, disable_thread, FLAG_AT(17), base, disable_thread) \
ENTRY(prefix, u32, rk_u32, codec_mode, FLAG_AT(18), base, codec_mode) \
ENTRY(prefix, u32, rk_u32, dis_err_clr_mark, FLAG_AT(19), base, dis_err_clr_mark) \
STRUCT_END(base) \
STRUCT_START(cb) \
ENTRY(prefix, ptr, void *, pkt_rdy_cb, FLAG_BASE(0), cb, pkt_rdy_cb) \
ENTRY(prefix, ptr, void *, pkt_rdy_ctx, FLAG_AT(0), cb, pkt_rdy_ctx) \
ENTRY(prefix, s32, rk_s32, pkt_rdy_cmd, FLAG_AT(0), cb, pkt_rdy_cmd) \
ENTRY(prefix, ptr, void *, frm_rdy_cb, FLAG_AT(1), cb, frm_rdy_cb) \
ENTRY(prefix, ptr, void *, frm_rdy_ctx, FLAG_AT(1), cb, frm_rdy_ctx) \
ENTRY(prefix, s32, rk_s32, frm_rdy_cmd, FLAG_AT(1), cb, frm_rdy_cmd) \
STRUCT_END(cb) \
CFG_DEF_END()
rk_s32 mpp_dec_cfg_set_default(void *entry, KmppObj obj, const char *caller)
{
MppDecCfgSet *cfg = (MppDecCfgSet *)entry;
cfg->base.type = MPP_CTX_BUTT;
cfg->base.coding = MPP_VIDEO_CodingUnused;
cfg->base.hw_type = -1;
cfg->base.fast_parse = 1;
#ifdef ENABLE_FASTPLAY_ONCE
cfg->base.enable_fast_play = MPP_ENABLE_FAST_PLAY_ONCE;
#else
cfg->base.enable_fast_play = MPP_ENABLE_FAST_PLAY;
#endif
(void) obj;
(void) caller;
return rk_ok;
}
#define KMPP_OBJ_NAME mpp_dec_cfg
#define KMPP_OBJ_INTF_TYPE MppDecCfg
#define KMPP_OBJ_IMPL_TYPE MppDecCfgSet
#define KMPP_OBJ_SGLN_ID MPP_SGLN_DEC_CFG
#define KMPP_OBJ_FUNC_INIT mpp_dec_cfg_set_default
#define KMPP_OBJ_ENTRY_TABLE MPP_DEC_CFG_ENTRY_TABLE
#define KMPP_OBJ_ACCESS_DISABLE
#define KMPP_OBJ_HIERARCHY_ENABLE
#include "kmpp_obj_helper.h"
/* wrapper for old interface */
MPP_RET mpp_dec_cfg_init(MppDecCfg *cfg)
{
return mpp_dec_cfg_get(cfg);
}
MPP_RET mpp_dec_cfg_deinit(MppDecCfg cfg)
{
return mpp_dec_cfg_put(cfg);
}
#define DEC_CFG_SET_ACCESS(func_name, in_type, cfg_type) \
MPP_RET func_name(MppDecCfg cfg, const char *name, in_type val) \
{ \
if (NULL == cfg || NULL == name) { \
mpp_err_f("invalid input cfg %p name %p\n", cfg, name); \
return rk_nok; \
} \
return kmpp_obj_set_##cfg_type(cfg, name, val); \
}
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_s32, RK_S32, s32);
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_u32, RK_U32, u32);
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_s64, RK_S64, s64);
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_u64, RK_U64, u64);
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_ptr, void *, ptr);
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_st, void *, st);
#define DEC_CFG_GET_ACCESS(func_name, in_type, cfg_type) \
MPP_RET func_name(MppDecCfg cfg, const char *name, in_type *val) \
{ \
if (NULL == cfg || NULL == name) { \
mpp_err_f("invalid input cfg %p name %p\n", cfg, name); \
return rk_nok; \
} \
return kmpp_obj_get_##cfg_type(cfg, name, val); \
}
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_s32, RK_S32, s32);
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_u32, RK_U32, u32);
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_s64, RK_S64, s64);
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_u64, RK_U64, u64);
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_ptr, void *, ptr);
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_st, void , st);
void mpp_dec_cfg_show(void)
{
MppTrie trie = kmpp_objdef_get_trie(mpp_dec_cfg_def);
MppTrieInfo *root;
if (!trie)
return;
root = mpp_trie_get_info_first(trie);
mpp_log("dumping valid configure string start\n");
if (root) {
MppTrieInfo *node = root;
mpp_log("%-32s %-6s | %6s | %4s | %4s\n", "name", "type", "offset", "size", "flag (hex)");
do {
if (mpp_trie_info_is_self(node))
continue;
if (node->ctx_len == sizeof(KmppEntry)) {
KmppEntry *entry = (KmppEntry *)mpp_trie_info_ctx(node);
mpp_log("%-32s %-6s | %-6d | %-4d | %-4x\n", mpp_trie_info_name(node),
strof_elem_type(entry->tbl.elem_type), entry->tbl.elem_offset,
entry->tbl.elem_size, entry->tbl.flag_offset);
} else {
mpp_log("%-30s size - %d\n", mpp_trie_info_name(node), node->ctx_len);
}
} while ((node = mpp_trie_get_info_next(trie, node)));
}
mpp_log("dumping valid configure string done\n");
mpp_log("total cfg count %d with %d node size %d\n", mpp_trie_get_info_count(trie),
mpp_trie_get_node_count(trie), mpp_trie_get_buf_size(trie));
}

294
mpp/base/mpp_dec_cfg.cpp
View File

@@ -1,294 +0,0 @@
/*
* Copyright 2020 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define MODULE_TAG "mpp_dec_cfg"
#include "rk_vdec_cfg.h"
#include <string.h>
#include "mpp_env.h"
#include "mpp_mem.h"
#include "mpp_time.h"
#include "mpp_debug.h"
#include "mpp_common.h"
#include "mpp_thread.h"
#include "mpp_cfg.h"
#include "mpp_trie.h"
#include "mpp_dec_cfg.h"
#define MPP_DEC_CFG_DBG_FUNC (0x00000001)
#define MPP_DEC_CFG_DBG_INFO (0x00000002)
#define MPP_DEC_CFG_DBG_SET (0x00000004)
#define MPP_DEC_CFG_DBG_GET (0x00000008)
#define mpp_dec_cfg_dbg(flag, fmt, ...) _mpp_dbg_f(mpp_dec_cfg_debug, flag, fmt, ## __VA_ARGS__)
#define mpp_dec_cfg_dbg_func(fmt, ...) mpp_dec_cfg_dbg(MPP_DEC_CFG_DBG_FUNC, fmt, ## __VA_ARGS__)
#define mpp_dec_cfg_dbg_info(fmt, ...) mpp_dec_cfg_dbg(MPP_DEC_CFG_DBG_INFO, fmt, ## __VA_ARGS__)
#define mpp_dec_cfg_dbg_set(fmt, ...) mpp_dec_cfg_dbg(MPP_DEC_CFG_DBG_SET, fmt, ## __VA_ARGS__)
#define mpp_dec_cfg_dbg_get(fmt, ...) mpp_dec_cfg_dbg(MPP_DEC_CFG_DBG_GET, fmt, ## __VA_ARGS__)
RK_U32 mpp_dec_cfg_debug = 0;
class MppDecCfgService
{
private:
MppDecCfgService();
~MppDecCfgService();
MppDecCfgService(const MppDecCfgService &);
MppDecCfgService &operator=(const MppDecCfgService &);
MppCfgInfoHead mHead;
MppTrie mTrie;
RK_S32 mCfgSize;
public:
static MppDecCfgService *get() {
static Mutex lock;
static MppDecCfgService instance;
AutoMutex auto_lock(&lock);
return &instance;
}
MppTrieInfo *get_info(const char *name);
MppTrieInfo *get_info_first();
MppTrieInfo *get_info_next(MppTrieInfo *info);
RK_S32 get_node_count() { return mHead.node_count; };
RK_S32 get_info_count() { return mHead.info_count; };
RK_S32 get_info_size() { return mHead.info_size; };
RK_S32 get_cfg_size() { return mCfgSize; };
};
#define EXPAND_AS_TRIE(base, name, cfg_type, flag, field_change, field_data) \
do { \
MppCfgInfo tmp = { \
CFG_FUNC_TYPE_##cfg_type, \
(RK_U32)((long)&(((MppDecCfgSet *)0)->field_change.change)), \
flag, \
(RK_U32)((long)&(((MppDecCfgSet *)0)->field_change.field_data)), \
sizeof((((MppDecCfgSet *)0)->field_change.field_data)), \
}; \
mpp_trie_add_info(mTrie, #base":"#name, &tmp, sizeof(tmp)); \
} while (0);
#define ENTRY_TABLE(ENTRY) \
/* rc config */ \
ENTRY(base, type, U32, MPP_DEC_CFG_CHANGE_TYPE, base, type) \
ENTRY(base, coding, U32, MPP_DEC_CFG_CHANGE_CODING, base, coding) \
ENTRY(base, hw_type, U32, MPP_DEC_CFG_CHANGE_HW_TYPE, base, hw_type) \
ENTRY(base, batch_mode, U32, MPP_DEC_CFG_CHANGE_BATCH_MODE, base, batch_mode) \
ENTRY(base, out_fmt, U32, MPP_DEC_CFG_CHANGE_OUTPUT_FORMAT, base, out_fmt) \
ENTRY(base, fast_out, U32, MPP_DEC_CFG_CHANGE_FAST_OUT, base, fast_out) \
ENTRY(base, fast_parse, U32, MPP_DEC_CFG_CHANGE_FAST_PARSE, base, fast_parse) \
ENTRY(base, split_parse, U32, MPP_DEC_CFG_CHANGE_SPLIT_PARSE, base, split_parse) \
ENTRY(base, internal_pts, U32, MPP_DEC_CFG_CHANGE_INTERNAL_PTS, base, internal_pts) \
ENTRY(base, sort_pts, U32, MPP_DEC_CFG_CHANGE_SORT_PTS, base, sort_pts) \
ENTRY(base, disable_error, U32, MPP_DEC_CFG_CHANGE_DISABLE_ERROR, base, disable_error) \
ENTRY(base, enable_vproc, U32, MPP_DEC_CFG_CHANGE_ENABLE_VPROC, base, enable_vproc) \
ENTRY(base, enable_fast_play, U32, MPP_DEC_CFG_CHANGE_ENABLE_FAST_PLAY, base, enable_fast_play) \
ENTRY(base, enable_hdr_meta, U32, MPP_DEC_CFG_CHANGE_ENABLE_HDR_META, base, enable_hdr_meta) \
ENTRY(base, enable_thumbnail, U32, MPP_DEC_CFG_CHANGE_ENABLE_THUMBNAIL, base, enable_thumbnail) \
ENTRY(base, enable_mvc, U32, MPP_DEC_CFG_CHANGE_ENABLE_MVC, base, enable_mvc) \
ENTRY(base, disable_dpb_chk, U32, MPP_DEC_CFG_CHANGE_DISABLE_DPB_CHECK, base, disable_dpb_chk) \
ENTRY(base, disable_thread, U32, MPP_DEC_CFG_CHANGE_DISABLE_THREAD, base, disable_thread) \
ENTRY(base, codec_mode, U32, MPP_DEC_CFG_CHANGE_CODEC_MODE, base, codec_mode) \
ENTRY(base, dis_err_clr_mark, U32, MPP_DEC_CFG_CHANGE_DIS_ERR_CLR_MARK, base, dis_err_clr_mark) \
ENTRY(cb, pkt_rdy_cb, Ptr, MPP_DEC_CB_CFG_CHANGE_PKT_RDY, cb, pkt_rdy_cb) \
ENTRY(cb, pkt_rdy_ctx, Ptr, MPP_DEC_CB_CFG_CHANGE_PKT_RDY, cb, pkt_rdy_ctx) \
ENTRY(cb, pkt_rdy_cmd, S32, MPP_DEC_CB_CFG_CHANGE_PKT_RDY, cb, pkt_rdy_cmd) \
ENTRY(cb, frm_rdy_cb, Ptr, MPP_DEC_CB_CFG_CHANGE_FRM_RDY, cb, frm_rdy_cb) \
ENTRY(cb, frm_rdy_ctx, Ptr, MPP_DEC_CB_CFG_CHANGE_FRM_RDY, cb, frm_rdy_ctx) \
ENTRY(cb, frm_rdy_cmd, S32, MPP_DEC_CB_CFG_CHANGE_FRM_RDY, cb, frm_rdy_cmd)
MppDecCfgService::MppDecCfgService() :
mTrie(NULL)
{
rk_s32 ret = mpp_trie_init(&mTrie, "MppDecCfg");
if (ret) {
mpp_err_f("failed to init dec cfg set trie\n");
return ;
}
ENTRY_TABLE(EXPAND_AS_TRIE)
mpp_trie_add_info(mTrie, NULL, NULL, 0);
mHead.node_count = mpp_trie_get_node_count(mTrie);
mHead.info_count = mpp_trie_get_info_count(mTrie);
mHead.info_size = mpp_trie_get_buf_size(mTrie);
mpp_dec_cfg_dbg_func("node cnt: %d\n", mHead.node_count);
}
MppDecCfgService::~MppDecCfgService()
{
if (mTrie) {
mpp_trie_deinit(mTrie);
mTrie = NULL;
}
}
MppTrieInfo *MppDecCfgService::get_info(const char *name)
{
return mpp_trie_get_info(mTrie, name);
}
MppTrieInfo *MppDecCfgService::get_info_first()
{
if (NULL == mTrie)
return NULL;
return mpp_trie_get_info_first(mTrie);
}
MppTrieInfo *MppDecCfgService::get_info_next(MppTrieInfo *node)
{
if (NULL == mTrie)
return NULL;
return mpp_trie_get_info_next(mTrie, node);
}
void mpp_dec_cfg_set_default(MppDecCfgSet *cfg)
{
cfg->base.type = MPP_CTX_BUTT;
cfg->base.coding = MPP_VIDEO_CodingUnused;
cfg->base.hw_type = -1;
cfg->base.fast_parse = 1;
#ifdef ENABLE_FASTPLAY_ONCE
cfg->base.enable_fast_play = MPP_ENABLE_FAST_PLAY_ONCE;
#else
cfg->base.enable_fast_play = MPP_ENABLE_FAST_PLAY;
#endif
}
MPP_RET mpp_dec_cfg_init(MppDecCfg *cfg)
{
MppDecCfgSet *p = NULL;
if (NULL == cfg) {
mpp_err_f("invalid NULL input config\n");
return MPP_ERR_NULL_PTR;
}
mpp_env_get_u32("mpp_dec_cfg_debug", &mpp_dec_cfg_debug, 0);
p = mpp_calloc(MppDecCfgSet, 1);
if (NULL == p) {
mpp_err_f("create decoder config failed %p\n", p);
*cfg = NULL;
return MPP_ERR_NOMEM;
}
mpp_dec_cfg_set_default(p);
*cfg = p;
return MPP_OK;
}
MPP_RET mpp_dec_cfg_deinit(MppDecCfg cfg)
{
if (NULL == cfg) {
mpp_err_f("invalid NULL input config\n");
return MPP_ERR_NULL_PTR;
}
MPP_FREE(cfg);
return MPP_OK;
}
#define DEC_CFG_SET_ACCESS(func_name, in_type, cfg_type) \
MPP_RET func_name(MppDecCfg cfg, const char *name, in_type val) \
{ \
if (NULL == cfg || NULL == name) { \
mpp_err_f("invalid input cfg %p name %p\n", cfg, name); \
return MPP_ERR_NULL_PTR; \
} \
MppTrieInfo *node = MppDecCfgService::get()->get_info(name); \
MppCfgInfo *info = (MppCfgInfo *)mpp_trie_info_ctx(node); \
if (CHECK_CFG_INFO(info, name, CFG_FUNC_TYPE_##cfg_type)) { \
return MPP_NOK; \
} \
mpp_dec_cfg_dbg_set("name %s type %s\n", mpp_trie_info_name(node), strof_cfg_type(info->data_type)); \
MPP_RET ret = MPP_CFG_SET_##cfg_type(info, cfg, val); \
return ret; \
}
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_s32, RK_S32, S32);
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_u32, RK_U32, U32);
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_s64, RK_S64, S64);
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_u64, RK_U64, U64);
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_ptr, void *, Ptr);
DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_st, void *, St);
#define DEC_CFG_GET_ACCESS(func_name, in_type, cfg_type) \
MPP_RET func_name(MppDecCfg cfg, const char *name, in_type *val) \
{ \
if (NULL == cfg || NULL == name) { \
mpp_err_f("invalid input cfg %p name %p\n", cfg, name); \
return MPP_ERR_NULL_PTR; \
} \
MppTrieInfo *node = MppDecCfgService::get()->get_info(name); \
MppCfgInfo *info = (MppCfgInfo *)mpp_trie_info_ctx(node); \
if (CHECK_CFG_INFO(info, name, CFG_FUNC_TYPE_##cfg_type)) { \
return MPP_NOK; \
} \
mpp_dec_cfg_dbg_set("name %s type %s\n", mpp_trie_info_name(node), strof_cfg_type(info->data_type)); \
MPP_RET ret = MPP_CFG_GET_##cfg_type(info, cfg, val); \
return ret; \
}
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_s32, RK_S32, S32);
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_u32, RK_U32, U32);
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_s64, RK_S64, S64);
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_u64, RK_U64, U64);
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_ptr, void *, Ptr);
DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_st, void , St);
void mpp_dec_cfg_show(void)
{
MppDecCfgService *srv = MppDecCfgService::get();
MppTrieInfo *root = srv->get_info_first();
mpp_log("dumping valid configure string start\n");
if (root) {
MppTrieInfo *node = root;
do {
if (mpp_trie_info_is_self(node))
continue;
if (node->ctx_len == sizeof(MppCfgInfo)) {
MppCfgInfo *info = (MppCfgInfo *)mpp_trie_info_ctx(node);
mpp_log("%-25s type %s - %d:%d\n", mpp_trie_info_name(node),
strof_cfg_type(info->data_type), info->data_offset, info->data_size);
} else {
mpp_log("%-25s size - %d\n", mpp_trie_info_name(node), node->ctx_len);
}
} while ((node = srv->get_info_next(node)));
}
mpp_log("dumping valid configure string done\n");
mpp_log("total cfg count %d with %d node size %d\n",
srv->get_info_count(), srv->get_node_count(), srv->get_info_size());
}

5
mpp/codec/inc/mpp_dec.h
View File

@@ -35,7 +35,7 @@ typedef struct {
MppCodingType coding;
void *mpp;
MppDecCfgSet *cfg;
MppDecCfg cfg;
} MppDecInitCfg;
#ifdef __cplusplus
@@ -55,8 +55,7 @@ MPP_RET mpp_dec_notify(MppDec ctx, RK_U32 flag);
MPP_RET mpp_dec_callback(MppDec ctx, MppDecEvent event, void *arg);
/* update init cfg before init */
MPP_RET mpp_dec_set_cfg_by_cmd(MppDecCfgSet *set, MpiCmd cmd, void *param);
MPP_RET mpp_dec_set_cfg(MppDecCfgSet *dst, MppDecCfgSet *src);
MPP_RET mpp_dec_set_cfg_by_cmd(MppDecCfg cfg, MpiCmd cmd, void *param);
/*
* return positive value for the number of decoded frame

3
mpp/codec/inc/mpp_dec_impl.h
View File

@@ -90,7 +90,8 @@ struct MppDecImpl_t {
HalTaskGroup vproc_tasks;
// runtime configure set
MppDecCfgSet cfg;
MppDecCfg cfg_obj;
MppDecCfgSet *cfg;
/* control process */
MppMutexCond *cmd_lock;

203
mpp/codec/mpp_dec.cpp
View File

@@ -61,7 +61,7 @@ void dec_task_init(DecTask *task)
static MPP_RET mpp_dec_update_cfg(MppDecImpl *p)
{
MppDecCfgSet *cfg = &p->cfg;
MppDecCfgSet *cfg = p->cfg;
MppDecBaseCfg *base = &cfg->base;
MppDecStatusCfg *status = &cfg->status;
@@ -84,7 +84,7 @@ static MPP_RET mpp_dec_update_cfg(MppDecImpl *p)
static MPP_RET mpp_dec_check_fbc_cap(MppDecImpl *p)
{
MppDecBaseCfg *base = &p->cfg.base;
MppDecBaseCfg *base = &p->cfg->base;
if (MPP_FRAME_FMT_IS_FBC(base->out_fmt)) {
RK_U32 fbc = (RK_U32)base->out_fmt & MPP_FRAME_FBC_MASK;
@@ -115,8 +115,8 @@ MPP_RET mpp_dec_proc_cfg(MppDecImpl *dec, MpiCmd cmd, void *param)
MppFrame frame = (MppFrame)param;
/* update output frame format */
dec->cfg.base.out_fmt = mpp_frame_get_fmt(frame);
mpp_log_f("found MPP_DEC_SET_FRAME_INFO fmt %x\n", dec->cfg.base.out_fmt);
dec->cfg->base.out_fmt = mpp_frame_get_fmt(frame);
mpp_log_f("found MPP_DEC_SET_FRAME_INFO fmt %x\n", dec->cfg->base.out_fmt);
mpp_slots_set_prop(dec->frame_slots, SLOTS_FRAME_INFO, frame);
@@ -146,10 +146,10 @@ MPP_RET mpp_dec_proc_cfg(MppDecImpl *dec, MpiCmd cmd, void *param)
case MPP_DEC_SET_ENABLE_FAST_PLAY :
case MPP_DEC_SET_ENABLE_MVC :
case MPP_DEC_SET_DISABLE_DPB_CHECK: {
ret = mpp_dec_set_cfg_by_cmd(&dec->cfg, cmd, param);
ret = mpp_dec_set_cfg_by_cmd(dec->cfg_obj, cmd, param);
mpp_dec_update_cfg(dec);
mpp_dec_check_fbc_cap(dec);
dec->cfg.base.change = 0;
dec->cfg->base.change = 0;
} break;
case MPP_DEC_QUERY: {
MppDecQueryCfg *query = (MppDecQueryCfg *)param;
@@ -180,9 +180,7 @@ MPP_RET mpp_dec_proc_cfg(MppDecImpl *dec, MpiCmd cmd, void *param)
} break;
case MPP_DEC_SET_CFG: {
if (param) {
MppDecCfgSet *cfg = (MppDecCfgSet *)param;
mpp_dec_set_cfg(&dec->cfg, cfg);
kmpp_obj_update(dec->cfg_obj, (KmppObj)param);
mpp_dec_update_cfg(dec);
mpp_dec_check_fbc_cap(dec);
}
@@ -191,7 +189,7 @@ MPP_RET mpp_dec_proc_cfg(MppDecImpl *dec, MpiCmd cmd, void *param)
} break;
case MPP_DEC_GET_CFG: {
if (param)
memcpy(param, &dec->cfg, sizeof(dec->cfg));
ret = (MPP_RET)kmpp_obj_copy_entry(param, dec->cfg_obj);
dec_dbg_func("get dec cfg\n");
} break;
@@ -233,8 +231,8 @@ void mpp_dec_put_frame(Mpp *mpp, RK_S32 index, HalDecTaskFlag flags)
if (dec_vproc_get_version(dec->vproc) == 1 && mode == MPP_FRAME_FLAG_DEINTERLACED) {
mpp_frame_set_mode(frame, MPP_FRAME_FLAG_FRAME);
/*iep 1 can't no detect DEINTERLACED, direct disable*/
dec->cfg.base.enable_vproc &= (~MPP_VPROC_MODE_DETECTION);
dec->enable_deinterlace = dec->cfg.base.enable_vproc;
dec->cfg->base.enable_vproc &= (~MPP_VPROC_MODE_DETECTION);
dec->enable_deinterlace = dec->cfg->base.enable_vproc;
if (dec->vproc && !dec->enable_deinterlace) {
dec_vproc_deinit(dec->vproc);
dec->vproc = NULL;
@@ -293,13 +291,13 @@ void mpp_dec_put_frame(Mpp *mpp, RK_S32 index, HalDecTaskFlag flags)
mpp_assert(index >= 0);
mpp_assert(frame);
if (dec->cfg.base.disable_error && dec->cfg.base.dis_err_clr_mark) {
if (dec->cfg->base.disable_error && dec->cfg->base.dis_err_clr_mark) {
mpp_frame_set_errinfo(frame, 0);
mpp_frame_set_discard(frame, 0);
}
if (!change) {
if (dec->cfg.base.sort_pts) {
if (dec->cfg->base.sort_pts) {
MppPktTs *pkt_ts;
mpp_spinlock_lock(&dec->ts_lock);
@@ -479,102 +477,6 @@ static const char *timing_str[DEC_TIMING_BUTT] = {
"hw wait ",
};
MPP_RET mpp_dec_set_cfg(MppDecCfgSet *dst, MppDecCfgSet *src)
{
MppDecBaseCfg *src_base = &src->base;
MppDecCbCfg *src_cb = &src->cb;
if (src_base->change) {
MppDecBaseCfg *dst_base = &dst->base;
RK_U32 change = src_base->change;
if (change & MPP_DEC_CFG_CHANGE_TYPE)
dst_base->type = src_base->type;
if (change & MPP_DEC_CFG_CHANGE_CODING)
dst_base->coding = src_base->coding;
if (change & MPP_DEC_CFG_CHANGE_HW_TYPE)
dst_base->hw_type = src_base->hw_type;
if (change & MPP_DEC_CFG_CHANGE_BATCH_MODE)
dst_base->batch_mode = src_base->batch_mode;
if (change & MPP_DEC_CFG_CHANGE_OUTPUT_FORMAT)
dst_base->out_fmt = src_base->out_fmt;
if (change & MPP_DEC_CFG_CHANGE_FAST_OUT)
dst_base->fast_out = src_base->fast_out;
if (change & MPP_DEC_CFG_CHANGE_FAST_PARSE)
dst_base->fast_parse = src_base->fast_parse;
if (change & MPP_DEC_CFG_CHANGE_SPLIT_PARSE)
dst_base->split_parse = src_base->split_parse;
if (change & MPP_DEC_CFG_CHANGE_INTERNAL_PTS)
dst_base->internal_pts = src_base->internal_pts;
if (change & MPP_DEC_CFG_CHANGE_SORT_PTS)
dst_base->sort_pts = src_base->sort_pts;
if (change & MPP_DEC_CFG_CHANGE_DISABLE_ERROR)
dst_base->disable_error = src_base->disable_error;
if (change & MPP_DEC_CFG_CHANGE_DIS_ERR_CLR_MARK)
dst_base->dis_err_clr_mark = src_base->dis_err_clr_mark;
if (change & MPP_DEC_CFG_CHANGE_ENABLE_VPROC)
dst_base->enable_vproc = src_base->enable_vproc;
if (change & MPP_DEC_CFG_CHANGE_ENABLE_FAST_PLAY)
dst_base->enable_fast_play = src_base->enable_fast_play;
if (change & MPP_DEC_CFG_CHANGE_ENABLE_HDR_META)
dst_base->enable_hdr_meta = src_base->enable_hdr_meta;
if (change & MPP_DEC_CFG_CHANGE_ENABLE_THUMBNAIL)
dst_base->enable_thumbnail = src_base->enable_thumbnail;
if (change & MPP_DEC_CFG_CHANGE_ENABLE_MVC)
dst_base->enable_mvc = src_base->enable_mvc;
if (change & MPP_DEC_CFG_CHANGE_DISABLE_DPB_CHECK)
dst_base->disable_dpb_chk = src_base->disable_dpb_chk;
if (change & MPP_DEC_CFG_CHANGE_DISABLE_THREAD)
dst_base->disable_thread = src_base->disable_thread;
if (change & MPP_DEC_CFG_CHANGE_CODEC_MODE)
dst_base->codec_mode = src_base->codec_mode;
dst_base->change = change;
src_base->change = 0;
}
if (src_cb->change) {
MppDecCbCfg *dst_cb = &dst->cb;
RK_U32 change = src_cb->change;
if (change & MPP_DEC_CB_CFG_CHANGE_PKT_RDY) {
dst_cb->pkt_rdy_cb = src_cb->pkt_rdy_cb;
dst_cb->pkt_rdy_ctx = src_cb->pkt_rdy_ctx;
dst_cb->pkt_rdy_cmd = src_cb->pkt_rdy_cmd;
}
if (change & MPP_DEC_CB_CFG_CHANGE_FRM_RDY) {
dst_cb->frm_rdy_cb = src_cb->frm_rdy_cb;
dst_cb->frm_rdy_ctx = src_cb->frm_rdy_ctx;
dst_cb->frm_rdy_cmd = src_cb->frm_rdy_cmd;
}
dst_cb->change = change;
src_cb->change = 0;
}
return MPP_OK;
}
MPP_RET mpp_dec_callback_hal_to_parser(const char *caller, void *ctx,
RK_S32 cmd, void *param)
{
@@ -633,12 +535,13 @@ MPP_RET mpp_dec_init(MppDec *dec, MppDecInitCfg *cfg)
}
p->mpp = mpp;
mpp_dec_cfg_init(&p->cfg_obj);
dec_cfg = (MppDecCfgSet *)kmpp_obj_to_entry(p->cfg_obj);
p->cfg = dec_cfg;
coding = cfg->coding;
dec_cfg = &p->cfg;
mpp_assert(cfg->cfg);
mpp_dec_cfg_set_default(dec_cfg);
mpp_dec_set_cfg(dec_cfg, cfg->cfg);
kmpp_obj_update(p->cfg_obj, cfg->cfg);
mpp_dec_update_cfg(p);
p->dec_cb.callBack = mpp_dec_callback_hal_to_parser;
@@ -758,7 +661,7 @@ MPP_RET mpp_dec_init(MppDec *dec, MppDecInitCfg *cfg)
sem_init(&p->cmd_start, 0, 0);
sem_init(&p->cmd_done, 0, 0);
if (p->cfg.base.disable_thread) {
if (p->cfg->base.disable_thread) {
DecTask *task = mpp_calloc(DecTask, 1);
mpp_assert(task);
@@ -874,6 +777,12 @@ MPP_RET mpp_dec_deinit(MppDec ctx)
dec->ts_pool = NULL;
}
if (dec->cfg_obj) {
mpp_dec_cfg_deinit(dec->cfg_obj);
dec->cfg_obj = NULL;
}
dec->cfg = NULL;
MPP_FREE(dec->task_single);
mpp_free(dec);
dec_dbg_func("%p out\n", dec);
@@ -979,7 +888,7 @@ MPP_RET mpp_dec_notify(MppDec ctx, RK_U32 flag)
MPP_RET mpp_dec_callback(MppDec ctx, MppDecEvent event, void *arg)
{
MppDecImpl *dec = (MppDecImpl *)ctx;
MppDecCbCfg *cb = &dec->cfg.cb;
MppDecCbCfg *cb = &dec->cfg->cb;
Mpp *mpp = (Mpp *)dec->mpp;
MPP_RET ret = MPP_OK;
@@ -1021,70 +930,60 @@ MPP_RET mpp_dec_control(MppDec ctx, MpiCmd cmd, void *param)
return ret;
}
MPP_RET mpp_dec_set_cfg_by_cmd(MppDecCfgSet *set, MpiCmd cmd, void *param)
MPP_RET mpp_dec_set_cfg_by_cmd(MppDecCfg cfg, MpiCmd cmd, void *param)
{
MppDecBaseCfg *cfg = &set->base;
MppDecCfgSet *dst = (MppDecCfgSet *)kmpp_obj_to_entry(cfg);
MppDecBaseCfg *base = &dst->base;
MPP_RET ret = MPP_OK;
switch (cmd) {
case MPP_DEC_SET_PRESENT_TIME_ORDER : {
cfg->sort_pts = (param) ? (*((RK_U32 *)param)) : (1);
cfg->change |= MPP_DEC_CFG_CHANGE_SORT_PTS;
dec_dbg_func("sort time order %d\n", cfg->sort_pts);
ret = mpp_dec_cfg_set_u32(cfg, "base:sort_pts", (param) ? (*((RK_U32 *)param)) : (1));
dec_dbg_func("sort time order %d\n", base->sort_pts);
} break;
case MPP_DEC_SET_PARSER_SPLIT_MODE : {
cfg->split_parse = (param) ? (*((RK_U32 *)param)) : (0);
cfg->change |= MPP_DEC_CFG_CHANGE_SPLIT_PARSE;
dec_dbg_func("split parse mode %d\n", cfg->split_parse);
ret = mpp_dec_cfg_set_u32(cfg, "base:split_parse", (param) ? (*((RK_U32 *)param)) : (0));
dec_dbg_func("split parse mode %d\n", base->split_parse);
} break;
case MPP_DEC_SET_PARSER_FAST_MODE : {
cfg->fast_parse = (param) ? (*((RK_U32 *)param)) : (0);
cfg->change |= MPP_DEC_CFG_CHANGE_FAST_PARSE;
dec_dbg_func("fast parse mode %d\n", cfg->fast_parse);
ret = mpp_dec_cfg_set_u32(cfg, "base:fast_parse", (param) ? (*((RK_U32 *)param)) : (0));
dec_dbg_func("fast parse mode %d\n", base->fast_parse);
} break;
case MPP_DEC_SET_OUTPUT_FORMAT : {
cfg->out_fmt = (param) ? (*((MppFrameFormat *)param)) : (MPP_FMT_YUV420SP);
cfg->change |= MPP_DEC_CFG_CHANGE_OUTPUT_FORMAT;
ret = mpp_dec_cfg_set_u32(cfg, "base:out_fmt", (param) ? (*((RK_U32 *)param)) : (MPP_FMT_YUV420SP));
dec_dbg_func("fast out_fmt %d\n", base->out_fmt);
} break;
case MPP_DEC_SET_DISABLE_ERROR: {
cfg->disable_error = (param) ? (*((RK_U32 *)param)) : (1);
cfg->change |= MPP_DEC_CFG_CHANGE_DISABLE_ERROR;
dec_dbg_func("disable error %d\n", cfg->disable_error);
ret = mpp_dec_cfg_set_u32(cfg, "base:disable_error", (param) ? (*((RK_U32 *)param)) : (1));
dec_dbg_func("disable error %d\n", base->disable_error);
} break;
case MPP_DEC_SET_DIS_ERR_CLR_MARK: {
cfg->dis_err_clr_mark = (param) ? (*((RK_U32 *)param)) : (1);
cfg->change |= MPP_DEC_CFG_CHANGE_DIS_ERR_CLR_MARK;
dec_dbg_func("disable error not mark%d\n", cfg->dis_err_clr_mark);
ret = mpp_dec_cfg_set_u32(cfg, "base:dis_err_clr_mark", (param) ? (*((RK_U32 *)param)) : (1));
dec_dbg_func("disable error mark %x\n", base->dis_err_clr_mark);
} break;
case MPP_DEC_SET_IMMEDIATE_OUT : {
cfg->fast_out = (param) ? (*((RK_U32 *)param)) : (0);
cfg->change |= MPP_DEC_CFG_CHANGE_FAST_OUT;
dec_dbg_func("fast output mode %d\n", cfg->fast_out);
ret = mpp_dec_cfg_set_u32(cfg, "base:fast_out", (param) ? (*((RK_U32 *)param)) : (0));
dec_dbg_func("fast output mode %d\n", base->fast_out);
} break;
case MPP_DEC_SET_ENABLE_DEINTERLACE: {
cfg->enable_vproc = (param) ? (*((RK_U32 *)param)) : MPP_VPROC_MODE_DEINTELACE;
cfg->change |= MPP_DEC_CFG_CHANGE_ENABLE_VPROC;
dec_dbg_func("enable dec_vproc %x\n", cfg->enable_vproc);
ret = mpp_dec_cfg_set_u32(cfg, "base:enable_vproc", (param) ? (*((RK_U32 *)param)) : (MPP_VPROC_MODE_DEINTELACE));
dec_dbg_func("enable dec_vproc %x\n", base->enable_vproc);
} break;
case MPP_DEC_SET_ENABLE_FAST_PLAY : {
cfg->enable_fast_play = (param) ? (*((RK_U32 *)param)) : (0);
cfg->change |= MPP_DEC_CFG_CHANGE_ENABLE_FAST_PLAY;
dec_dbg_func("disable idr immediately output %d\n", cfg->enable_fast_play);
ret = mpp_dec_cfg_set_u32(cfg, "base:enable_fast_play", (param) ? (*((RK_U32 *)param)) : (0));
dec_dbg_func("disable idr immediately output %d\n", base->enable_fast_play);
} break;
case MPP_DEC_SET_ENABLE_MVC : {
cfg->enable_mvc = (param) ? (*((RK_U32 *)param)) : (0);
cfg->change |= MPP_DEC_CFG_CHANGE_ENABLE_MVC;
dec_dbg_func("enable MVC decoder %d\n", cfg->enable_mvc);
ret = mpp_dec_cfg_set_u32(cfg, "base:enable_mvc", (param) ? (*((RK_U32 *)param)) : (0));
dec_dbg_func("enable MVC decoder %d\n", base->enable_mvc);
} break;
case MPP_DEC_SET_DISABLE_DPB_CHECK : {
cfg->disable_dpb_chk = (param) ? (*((RK_U32 *)param)) : (0);
cfg->change |= MPP_DEC_CFG_CHANGE_DISABLE_DPB_CHECK;
dec_dbg_func("disable dpb discontinuous check %d\n", cfg->disable_dpb_chk);
ret = mpp_dec_cfg_set_u32(cfg, "base:disable_dpb_chk", (param) ? (*((RK_U32 *)param)) : (0));
dec_dbg_func("disable dpb discontinuous check %d\n", base->disable_dpb_chk);
} break;
case MPP_DEC_SET_CODEC_MODE : {
cfg->codec_mode = (param) ? (*((RK_U32 *)param)) : (0);
cfg->change |= MPP_DEC_CFG_CHANGE_CODEC_MODE;
dec_dbg_func("force use codec device %d\n", cfg->codec_mode);
ret = mpp_dec_cfg_set_u32(cfg, "base:codec_mode", (param) ? (*((RK_U32 *)param)) : (0));
dec_dbg_func("force use codec device %d\n", base->codec_mode);
} break;
default : {
mpp_err_f("unsupported cfg update cmd %x\n", cmd);

2
mpp/codec/mpp_dec_no_thread.cpp
View File

@@ -298,7 +298,7 @@ MPP_RET mpp_dec_decode(MppDec ctx, MppPacket packet)
mpp_buf_slot_get_prop(frame_slots, task_dec->output, SLOT_FRAME_PTR, &mframe);
if (MPP_FRAME_FMT_IS_HDR(mpp_frame_get_fmt(mframe)) &&
dec->cfg.base.enable_hdr_meta) {
dec->cfg->base.enable_hdr_meta) {
fill_hdr_meta_to_frame(mframe, dec->coding);
}
}

10
mpp/codec/mpp_dec_normal.cpp
View File

@@ -202,7 +202,7 @@ static RK_U32 reset_parser_thread(Mpp *mpp, DecTask *task)
mpp_buf_slot_clr_flag(frame_slots, index, SLOT_QUEUE_USE);
}
if (dec->cfg.base.sort_pts) {
if (dec->cfg->base.sort_pts) {
// flush
MppPktTs *ts, *pos;
@@ -383,7 +383,7 @@ static MPP_RET try_proc_dec_task(Mpp *mpp, DecTask *task)
mpp_clock_start(dec->clocks[DEC_PRS_PREPARE]);
mpp_parser_prepare(dec->parser, dec->mpp_pkt_in, task_dec);
mpp_clock_pause(dec->clocks[DEC_PRS_PREPARE]);
if (dec->cfg.base.sort_pts && task_dec->valid) {
if (dec->cfg->base.sort_pts && task_dec->valid) {
task->ts_cur.pts = mpp_packet_get_pts(dec->mpp_pkt_in);
task->ts_cur.dts = mpp_packet_get_dts(dec->mpp_pkt_in);
}
@@ -628,7 +628,7 @@ static MPP_RET try_proc_dec_task(Mpp *mpp, DecTask *task)
mpp_buf_slot_get_prop(frame_slots, output, SLOT_FRAME_PTR, &mframe);
if (MPP_FRAME_FMT_IS_HDR(mpp_frame_get_fmt(mframe)) &&
dec->cfg.base.enable_hdr_meta) {
dec->cfg->base.enable_hdr_meta) {
fill_hdr_meta_to_frame(mframe, dec->coding);
}
}
@@ -646,7 +646,7 @@ static MPP_RET try_proc_dec_task(Mpp *mpp, DecTask *task)
if (task->wait.dec_pic_match)
return MPP_NOK;
if (dec->cfg.base.sort_pts) {
if (dec->cfg->base.sort_pts) {
MppFrame frame = NULL;
MppPktTs *pkt_ts = (MppPktTs *)mpp_mem_pool_get(dec->ts_pool);
@@ -1227,7 +1227,7 @@ MPP_RET mpp_dec_control_normal(MppDecImpl *dec, MpiCmd cmd, void *param)
dec->cmd_send++;
dec_dbg_detail("detail: %p control cmd %08x param %p start disable_thread %d \n",
dec, cmd, param, dec->cfg.base.disable_thread);
dec, cmd, param, dec->cfg->base.disable_thread);
mpp_dec_notify_normal(dec, MPP_DEC_CONTROL);
sem_post(&dec->cmd_start);

2
mpp/inc/mpp.h
View File

@@ -215,7 +215,7 @@ private:
RK_U32 mStatus;
/* decoder paramter before init */
MppDecCfgSet mDecInitcfg;
MppDecCfg mDecCfg;
RK_U32 mParserFastMode;
RK_U32 mParserNeedSplit;
RK_U32 mParserInternalPts; /* for MPEG2/MPEG4 */

2
mpp/inc/mpp_dec_cfg.h
View File

@@ -136,7 +136,7 @@ typedef struct MppDecCfgSet_t {
extern "C" {
#endif
void mpp_dec_cfg_set_default(MppDecCfgSet *cfg);
rk_s32 mpp_dec_cfg_set_default(void *entry, KmppObj obj, const char *caller);
#ifdef __cplusplus
}

28
mpp/mpp.cpp
View File

@@ -130,10 +130,9 @@ Mpp::Mpp(MppCtx ctx)
{
mpp_env_get_u32("mpp_debug", &mpp_debug, 0);
memset(&mDecInitcfg, 0, sizeof(mDecInitcfg));
mpp_dec_cfg_set_default(&mDecInitcfg);
mDecInitcfg.base.enable_vproc = MPP_VPROC_MODE_DEINTELACE;
mDecInitcfg.base.change |= MPP_DEC_CFG_CHANGE_ENABLE_VPROC;
mpp_dec_cfg_init(&mDecCfg);
mpp_dec_cfg_set_u32(mDecCfg, "base:enable_vproc", MPP_VPROC_MODE_DEINTELACE);
mKmpp = NULL;
mVencInitKcfg = NULL;
mpp_dump_init(&mDump);
@@ -211,13 +210,12 @@ MPP_RET Mpp::init(MppCtxType type, MppCodingType coding)
mMppInPort = mpp_task_queue_get_port(mInputTaskQueue, MPP_PORT_OUTPUT);
mMppOutPort = mpp_task_queue_get_port(mOutputTaskQueue, MPP_PORT_INPUT);
mDecInitcfg.base.disable_thread = mDisableThread;
mDecInitcfg.base.change |= MPP_DEC_CFG_CHANGE_DISABLE_THREAD;
mpp_dec_cfg_set_u32(mDecCfg, "base:disable_thread", mDisableThread);
MppDecInitCfg cfg = {
coding,
this,
&mDecInitcfg,
mDecCfg,
};
ret = mpp_dec_init(&mDec, &cfg);
@@ -372,6 +370,11 @@ void Mpp::clear()
MPP_FREE(mKmpp);
}
if (mDecCfg) {
mpp_dec_cfg_deinit(mDecCfg);
mDecCfg = NULL;
}
mpp_dump_deinit(&mDump);
}
@@ -1335,7 +1338,7 @@ MPP_RET Mpp::control_dec(MpiCmd cmd, MppParam param)
return ret;
}
ret = mpp_dec_set_cfg_by_cmd(&mDecInitcfg, cmd, param);
ret = mpp_dec_set_cfg_by_cmd(mDecCfg, cmd, param);
} break;
case MPP_DEC_GET_STREAM_COUNT: {
AutoMutex autoLock(mPktIn->mutex());
@@ -1352,19 +1355,14 @@ MPP_RET Mpp::control_dec(MpiCmd cmd, MppParam param)
if (mDec)
ret = mpp_dec_control(mDec, cmd, param);
else if (param) {
MppDecCfgSet *cfg = (MppDecCfgSet *)param;
ret = mpp_dec_set_cfg(&mDecInitcfg, cfg);
ret = (MPP_RET)kmpp_obj_update(mDecCfg, param);
}
} break;
case MPP_DEC_GET_CFG : {
if (mDec)
ret = mpp_dec_control(mDec, cmd, param);
else if (param) {
MppDecCfgSet *cfg = (MppDecCfgSet *)param;
memcpy(cfg, &mDecInitcfg, sizeof(*cfg));
ret = MPP_OK;
ret = (MPP_RET)kmpp_obj_copy_entry(param, mDecCfg);
}
} break;
default : {