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[hal_h264e]: 1. merge from branch mpp_encAvc r1076， add the modification of HAL_RKV; 2. for HAL_VPU, ouput_strm_size is /=8 in hal, instead of controller.

Browse Source 
git-svn-id: https://10.10.10.66:8443/svn/MediaProcessPlatform/trunk/mpp@1134 6e48237b-75ef-9749-8fc9-41990f28c85a
This commit is contained in:
LinKesheng
2016-08-01 08:11:30 +00:00
parent 5d1317859a
commit 2ce82facd2
9 changed files with 757 additions and 691 deletions
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2
mpp/codec/enc/h264/src/H264CodeFrame.c
View File

@@ -153,8 +153,6 @@ void H264SetNewFrame(h264Instance_s * inst)
regValues_s *regs = &inst->asic.regs;
regs->outputStrmSize -= inst->stream.byteCnt;
regs->outputStrmSize /= 8; /* 64-bit addresses */
regs->outputStrmSize &= (~0x07); /* 8 multiple size */
/* 64-bit aligned stream base address */
regs->outputStrmBase += (inst->stream.byteCnt & (~0x07));

5
mpp/common/h264e_syntax.h
View File

@@ -86,7 +86,10 @@ typedef struct h264e_feedback_t {
RK_S32 mad_count;
RK_S32 rlc_count;
RK_U32 out_strm_size;
} h264e_feedback;
/* for VEPU future extansion */
//TODO: add nal size table feedback
}h264e_feedback;
typedef struct h264e_control_extra_info_cfg_t {

21
mpp/hal/rkenc/h264e/hal_h264e.h
View File

@@ -24,7 +24,7 @@
#include "mpp_packet.h"
#include "h264e_syntax.h"
#define H264E_HAL_LOG_MODE 0x00000111
extern RK_U32 h264e_hal_log_mode;
#define H264E_HAL_LOG_ERROR 0x00000001
#define H264E_HAL_LOG_ASSERT 0x00000010
@@ -46,25 +46,25 @@
#define h264e_hal_debug_enter() \
do {\
if (H264E_HAL_LOG_MODE & H264E_HAL_LOG_FLOW)\
if (h264e_hal_log_mode & H264E_HAL_LOG_FLOW)\
{ mpp_log("line(%d), func(%s), enter", __LINE__, __FUNCTION__); }\
} while (0)
#define h264e_hal_debug_leave() \
do {\
if (H264E_HAL_LOG_MODE & H264E_HAL_LOG_FLOW)\
if (h264e_hal_log_mode & H264E_HAL_LOG_FLOW)\
{ mpp_log("line(%d), func(%s), leave", __LINE__, __FUNCTION__); }\
} while (0)
#define h264e_hal_log_err(fmt, ...) \
do {\
if (H264E_HAL_LOG_MODE & H264E_HAL_LOG_ERROR)\
if (h264e_hal_log_mode & H264E_HAL_LOG_ERROR)\
{ mpp_err(fmt, ## __VA_ARGS__); }\
} while (0)
#define h264e_hal_log_detail(fmt, ...) \
do {\
if (H264E_HAL_LOG_MODE & H264E_HAL_LOG_DETAIL)\
if (h264e_hal_log_mode & H264E_HAL_LOG_DETAIL)\
{ mpp_log(fmt, ## __VA_ARGS__); }\
} while (0)
@@ -81,11 +81,20 @@
#define H264E_HAL_SET_REG(reg, addr, val) \
do { \
reg[(addr)>>2] = (RK_U32)(val); \
if(H264E_HAL_LOG_MODE & 0/*H264E_HAL_LOG_INFO*/) \
if(h264e_hal_log_mode & 0/*H264E_HAL_LOG_INFO*/) \
mpp_log("line(%d) set reg[%03d/%03x]: %08x", __LINE__, (addr)>>2, addr, val); \
} while (0)
#define H264E_HAL_VALIDATE_GT(val, name, limit) \
do { \
if((val)<=(limit)) { \
mpp_err("%s(%d) should > %d", name, val, limit); \
return MPP_NOK; \
} \
} while (0)
#define H264E_REF_MAX 16
#define H264E_MAX_PACKETED_PARAM_SIZE 256 //sps + pps

4
mpp/hal/rkenc/h264e/hal_h264e_api.c
View File

@@ -21,16 +21,20 @@
#include <unistd.h>
#include "vpu.h"
#include "mpp_hal.h"
#include "mpp_env.h"
#include "hal_h264e_api.h"
#include "hal_h264e.h"
#include "hal_h264e_vpu.h"
#include "hal_h264e_rkv.h"
RK_U32 h264e_hal_log_mode = 0;
MPP_RET hal_h264e_init(void *hal, MppHalCfg *cfg)
{
h264e_hal_context *ctx = (h264e_hal_context *)hal;
MppHalApi *api = &ctx->api;
mpp_env_get_u32("h264e_hal_debug", &h264e_hal_log_mode, 0x00000111);
if (!access("/dev/rkvenc", F_OK))
cfg->device_id = HAL_RKVENC;
else

605
mpp/hal/rkenc/h264e/hal_h264e_rkv.c
View File

@@ -34,7 +34,7 @@
#define RKVENC_IS_TYPE_B(x) ((x)==RKVENC_FRAME_TYPE_B || (x)==RKVENC_FRAME_TYPE_BREF)
#define RKVENC_IS_DISPOSABLE(type) ( type == RKVENC_FRAME_TYPE_B )
const RK_S32 h264e_csp_idx_map[RKV_H264E_CSP_BUTT] = {RKV_H264E_CSP2_BGRA, RKV_H264E_CSP2_BGR, RKV_H264E_CSP2_RGB, 0, RKV_H264E_CSP2_NV16, RKV_H264E_CSP2_I422, RKV_H264E_CSP2_NV12,
const RK_S32 h264e_csp_idx_map[H264E_RKV_CSP_BUTT] = {RKV_H264E_CSP2_BGRA, RKV_H264E_CSP2_BGR, RKV_H264E_CSP2_RGB, 0, RKV_H264E_CSP2_NV16, RKV_H264E_CSP2_I422, RKV_H264E_CSP2_NV12,
RKV_H264E_CSP2_I420, RKV_H264E_CSP2_RGB, RKV_H264E_CSP2_RGB
};
@@ -147,7 +147,517 @@ static const RK_U8 h264e_rkv_zigzag_scan8[2][64] = {
}
};
#if (RKV_H264E_NUM_REFS > 1)
static RK_U32 reg_idx2addr_map[132] = {
0xffff, //0, unvalid.
0x0000, //1
0x0004, //2
0x0008, //3
0x000c, //4
0x0010, //5
0x0014, //6
0x0018, //7
0x001C, //8
0x0030, //9
0x0034, //10
0x0038, //11
0x003c, //12
0x0040, //13
0x0044, //14
0x0048, //15
0x004c, //16
0x0050, //17
0x0054, //18
0x0058, //19
0x005c, //20
0x0060, //21.0~21.4
0x0074, //22.0~22.39
0x0114, //23
0x0118, //24
0x011c, //25
0x0120, //26
0x0124, //27
0x0128, //28
0x012c, //29
0x0130, //30
0x0134, //31
0x0138, //32
0x013c, //33
0x0140, //34
0x0144, //35
0x0148, //36
0x014c, //36
0x0150, //38
0x0154, //39
0x0158, //40
0x015c, //41
0x0160, //42
0x0164, //43
0x0168, //44
0x016c, //45
0x0170, //46
0x0174, //47
0x0178, //48
0x017c, //49
0x0180, //50
0x0184, //51
0x0188, //52
0x018c, //53
0x0190, //54
0x0194, //55
0x0198, //56
0x019c, //57
0x01a0, //58
0x01a4, //59
0x01a8, //60
0x01ac, //61
0x01b0, //62
0x01b4, //63
0x01b8, //64
0x01c0, //65
0x01c4, //66
0x01d0, //67.0~67.7
0x01f0, //68.0~68.7
0x0210, //69
0x0214, //70
0x0218, //71
0x021c, //72
0x0220, //73
0x0224, //74
0x0228, //75
0x022c, //76
0x0230, //77
0x0234, //78
0x0238, //79
0x0400, //80.0~80.255
0x0800, //81
0x0804, //82
0x0808, //83
0x0810, //84
0x0814, //85
0x0818, //86
0x0820, //87
0x0824, //88
0x0828, //89
0x082c, //90
0x0830, //91
0x0834, //92
0x0840, //93
0x0844, //94
0x0848, //95
0x084c, //96
0x0850, //97
0x0854, //98
0x0860, //99( 33 regs below are not present in c-model, included)
0x0864, //100
0x0868, //101
0x086c, //102
0x0870, //103
0x0874, //104
0x0880, //105
0x0884, //106
0x0888, //107
0x088c, //108
0x0890, //109
0x0894, //110
0x0898, //111
0x089c, //112
0x08a0, //113
0x08a4, //114
0x08a8, //115
0x08ac, //116
0x08b0, //117
0x08b4, //118
0x08b8, //119
0x08bc, //120
0x08c0, //121
0x08c4, //122
0x08c8, //123
0x08cc, //124
0x08d0, //125
0x08d4, //126
0x08d8, //127
0x08dc, //128
0x08e0, //129
0x08e4, //130
0x08e8, //131
};
static MPP_RET hal_h264e_rkv_close_dump_files(void *dump_files)
{
h264e_hal_rkv_dump_files *files = (h264e_hal_rkv_dump_files *)dump_files;
H264E_HAL_FCLOSE(files->fp_mpp_syntax_in);
H264E_HAL_FCLOSE(files->fp_mpp_reg_in);
H264E_HAL_FCLOSE(files->fp_mpp_reg_out);
H264E_HAL_FCLOSE(files->fp_mpp_strm_out);
H264E_HAL_FCLOSE(files->fp_mpp_feedback);
H264E_HAL_FCLOSE(files->fp_mpp_extra_ino_cfg);
return MPP_OK;
}
static MPP_RET hal_h264e_rkv_open_dump_files(void *dump_files)
{
if(h264e_hal_log_mode & H264E_HAL_LOG_FILE) {
char base_path[512];
char full_path[512];
h264e_hal_rkv_dump_files *files = (h264e_hal_rkv_dump_files *)dump_files;
strcpy(base_path, "/sdcard/h264e_data/");
sprintf(full_path, "%s%s", base_path, "mpp_syntax_in.txt");
files->fp_mpp_syntax_in = fopen(full_path, "wb");
if (!files->fp_mpp_syntax_in) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_reg_in.txt");
files->fp_mpp_reg_in = fopen(full_path, "wb");
if (!files->fp_mpp_reg_in) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_reg_out.txt");
files->fp_mpp_reg_out = fopen(full_path, "wb");
if (!files->fp_mpp_reg_out) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_feedback.txt");
files->fp_mpp_feedback = fopen(full_path, "wb");
if (!files->fp_mpp_feedback) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_strm_out.bin");
files->fp_mpp_strm_out = fopen(full_path, "wb");
if (!files->fp_mpp_strm_out) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_extra_info_cfg.txt");
files->fp_mpp_extra_ino_cfg= fopen(full_path, "wb");
if (!files->fp_mpp_extra_ino_cfg) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
}
return MPP_OK;
}
static void hal_h264e_rkv_dump_mpp_syntax_in(h264e_syntax *syn, h264e_hal_context *ctx)
{
h264e_hal_rkv_dump_files *dump_files = (h264e_hal_rkv_dump_files *)ctx->dump_files;
FILE *fp = dump_files->fp_mpp_syntax_in;
if (fp) {
//RK_S32 k = 0;
fprintf(fp, "#FRAME %d\n", ctx->frame_cnt);
fprintf(fp, "%-16d %s\n", syn->pic_luma_width, "pic_luma_width");
fprintf(fp, "%-16d %s\n", syn->pic_luma_height, "pic_luma_height");
fprintf(fp, "%-16d %s\n", syn->level_idc, "level_idc");
fprintf(fp, "%-16d %s\n", syn->profile_idc, "profile_idc");
fprintf(fp, "%-16d %s\n", syn->frame_coding_type, "frame_coding_type");
fprintf(fp, "%-16d %s\n", syn->qp, "swreg10.pic_qp");
fprintf(fp, "%-16d %s\n", syn->input_image_format, "swreg14.src_cfmt");
fprintf(fp, "%-16d %s\n", syn->enable_cabac, "swreg59.etpy_mode");
fprintf(fp, "%-16d %s\n", syn->pic_init_qp, "swreg59.pic_init_qp");
fprintf(fp, "%-16d %s\n", syn->chroma_qp_index_offset, "swreg59.cb_ofst");
fprintf(fp, "%-16d %s\n", syn->second_chroma_qp_index_offset, "swreg59.cr_ofst");
fprintf(fp, "%-16d %s\n", syn->slice_type, "swreg60.sli_type");
fprintf(fp, "%-16d %s\n", syn->pps_id, "swreg60.pps_id");
fprintf(fp, "%-16d %s\n", syn->frame_num, "swreg60.frm_num");
fprintf(fp, "%-16d %s\n", syn->cabac_init_idc, "swreg60.cbc_init_idc");
fprintf(fp, "%-16d %s\n", syn->idr_pic_id, "swreg61.idr_pid");
fprintf(fp, "%-16d %s\n", syn->pic_order_cnt_lsb, "swreg61.poc_lsb");
fprintf(fp, "%-16d %s\n", syn->keyframe_max_interval, "keyframe_max_interval");
fprintf(fp, "\n");
fflush(fp);
} else {
mpp_log("try to dump data to mpp_syntax_in.txt, but file is not opened");
}
}
static void hal_h264e_rkv_dump_mpp_reg_in(h264e_hal_context *ctx)
{
RK_S32 k = 0;
h264e_hal_rkv_dump_files *dump_files = (h264e_hal_rkv_dump_files *)ctx->dump_files;
FILE *fp = dump_files->fp_mpp_reg_in;
h264e_rkv_reg_set *reg_list = (h264e_rkv_reg_set *)ctx->regs;
RK_U32 *regs = (RK_U32 *)&reg_list[ctx->frame_cnt_gen_ready];
#if RKV_H264E_ADD_RESERVE_REGS
h264e_rkv_reg_set * r = (h264e_rkv_reg_set *)regs;
#endif
mpp_log("dump_rkv_mpp_reg_in enter, %d regs are dumped", RK_H264E_NUM_REGS);
if (fp) {
fprintf(fp, "#FRAME %d:\n", ctx->frame_cnt);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 1, 1, reg_idx2addr_map[ 1], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 2, 2, reg_idx2addr_map[ 2], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 3, 3, reg_idx2addr_map[ 3], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 4, 4, reg_idx2addr_map[ 4], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 5, 5, reg_idx2addr_map[ 5], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 6, 6, reg_idx2addr_map[ 6], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 7, 7, reg_idx2addr_map[ 7], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 8, 8, reg_idx2addr_map[ 8], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_08_09);
#endif
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 9, 9, reg_idx2addr_map[ 9], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 10, 10, reg_idx2addr_map[10], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 11, 11, reg_idx2addr_map[11], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 12, 12, reg_idx2addr_map[12], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 13, 13, reg_idx2addr_map[13], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 14, 14, reg_idx2addr_map[14], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 15, 15, reg_idx2addr_map[15], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 16, 16, reg_idx2addr_map[16], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 17, 17, reg_idx2addr_map[17], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 18, 18, reg_idx2addr_map[18], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 19, 19, reg_idx2addr_map[19], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 20, 20, reg_idx2addr_map[20], *regs++);
for (k = 0; k < 5; k++)
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 21, 21, reg_idx2addr_map[21], *regs++);
for (k = 0; k < 40; k++)
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 22, 22, reg_idx2addr_map[22], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 23, 23, reg_idx2addr_map[23], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 24, 24, reg_idx2addr_map[24], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 25, 25, reg_idx2addr_map[25], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 26, 26, reg_idx2addr_map[26], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 27, 27, reg_idx2addr_map[27], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 28, 28, reg_idx2addr_map[28], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 29, 29, reg_idx2addr_map[29], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 30, 30, reg_idx2addr_map[30], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 31, 31, reg_idx2addr_map[31], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 32, 32, reg_idx2addr_map[32], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 33, 33, reg_idx2addr_map[33], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 34, 34, reg_idx2addr_map[34], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 35, 35, reg_idx2addr_map[35], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 36, 36, reg_idx2addr_map[36], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 37, 37, reg_idx2addr_map[37], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 38, 38, reg_idx2addr_map[38], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 39, 39, reg_idx2addr_map[39], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 40, 40, reg_idx2addr_map[40], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 41, 41, reg_idx2addr_map[41], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 42, 42, reg_idx2addr_map[42], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 43, 43, reg_idx2addr_map[43], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 44, 44, reg_idx2addr_map[44], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 45, 45, reg_idx2addr_map[45], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 46, 46, reg_idx2addr_map[46], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 47, 47, reg_idx2addr_map[47], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 48, 48, reg_idx2addr_map[48], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 49, 49, reg_idx2addr_map[49], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 50, 50, reg_idx2addr_map[50], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 51, 51, reg_idx2addr_map[51], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 52, 52, reg_idx2addr_map[52], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 53, 53, reg_idx2addr_map[53], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 54, 54, reg_idx2addr_map[54], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 55, 55, reg_idx2addr_map[55], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 56, 56, reg_idx2addr_map[56], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 57, 57, reg_idx2addr_map[57], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 58, 58, reg_idx2addr_map[58], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 59, 59, reg_idx2addr_map[59], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 60, 60, reg_idx2addr_map[60], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 61, 61, reg_idx2addr_map[61], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 62, 62, reg_idx2addr_map[62], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 63, 63, reg_idx2addr_map[63], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 64, 64, reg_idx2addr_map[64], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_64_65);
#endif
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 65, 65, reg_idx2addr_map[65], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 66, 66, reg_idx2addr_map[66], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_66_67);
#endif
for (k = 0; k < 8; k++)
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 67, 67, reg_idx2addr_map[67], *regs++);
for (k = 0; k < 8; k++)
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 68, 68, reg_idx2addr_map[68], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 69, 69, reg_idx2addr_map[69], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 70, 70, reg_idx2addr_map[70], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 71, 71, reg_idx2addr_map[71], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 72, 72, reg_idx2addr_map[72], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 74, 73, reg_idx2addr_map[73], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 75, 74, reg_idx2addr_map[74], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 76, 75, reg_idx2addr_map[75], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 77, 76, reg_idx2addr_map[76], *regs++);
#if !RKV_H264E_REMOVE_UNNECESSARY_REGS
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 78, 77, reg_idx2addr_map[77], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 79, 78, reg_idx2addr_map[78], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 80, 79, reg_idx2addr_map[79], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_79_80);
#endif
for (k = 0; k < 256; k++)
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 73, 80, reg_idx2addr_map[80], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 81, 81, reg_idx2addr_map[81], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 82, 82, reg_idx2addr_map[82], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 83, 83, reg_idx2addr_map[83], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_83_84);
#endif
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 84, 84, reg_idx2addr_map[84], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 85, 85, reg_idx2addr_map[85], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 86, 86, reg_idx2addr_map[86], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_86_87);
#endif
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 87, 87, reg_idx2addr_map[87], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 88, 88, reg_idx2addr_map[88], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 89, 89, reg_idx2addr_map[89], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 90, 90, reg_idx2addr_map[90], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 91, 91, reg_idx2addr_map[91], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 92, 92, reg_idx2addr_map[92], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_92_93);
#endif
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 93, 93, reg_idx2addr_map[93], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 94, 94, reg_idx2addr_map[94], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 95, 95, reg_idx2addr_map[95], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 96, 96, reg_idx2addr_map[96], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 97, 97, reg_idx2addr_map[97], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 98, 98, reg_idx2addr_map[98], *regs );
#endif //#if !RKV_H264E_REMOVE_UNNECESSARY_REGS
fprintf(fp, "\n");
fflush(fp);
} else {
mpp_log("try to dump data to mpp_reg_in.txt, but file is not opened");
}
}
static void hal_h264e_rkv_dump_mpp_extra_info_cfg(h264e_hal_context *ctx, h264e_control_extra_info_cfg *cfg)
{
h264e_hal_rkv_dump_files *dump_files = (h264e_hal_rkv_dump_files *)ctx->dump_files;
FILE *fp = dump_files->fp_mpp_extra_ino_cfg;
if(fp) {
/* common cfg */
fprintf(fp, "%-16d %s\n", cfg->pic_luma_width, "pic_luma_width");
fprintf(fp, "%-16d %s\n", cfg->pic_luma_height, "pic_luma_height");
fprintf(fp, "%-16d %s\n", cfg->enable_cabac, "enable_cabac");
fprintf(fp, "%-16d %s\n", cfg->transform8x8_mode, "transform8x8_mode");
fprintf(fp, "%-16d %s\n", cfg->chroma_qp_index_offset, "chroma_qp_index_offset");
fprintf(fp, "%-16d %s\n", cfg->pic_init_qp, "pic_init_qp");
//RK_S32 rotation_enable; //0: 0/180 degrees, 1: 90/270 degrees //TODO: add rotation
/* additional cfg only for rkv */
fprintf(fp, "%-16d %s\n", cfg->input_image_format, "input_image_format");
fprintf(fp, "%-16d %s\n", cfg->profile_idc, "profile_idc");
fprintf(fp, "%-16d %s\n", cfg->level_idc, "level_idc"); //TODO: may be removed later, get from sps/pps instead
fprintf(fp, "%-16d %s\n", cfg->keyframe_max_interval, "keyframe_max_interval");
fprintf(fp, "%-16d %s\n", cfg->second_chroma_qp_index_offset, "second_chroma_qp_index_offset");
fprintf(fp, "%-16d %s\n", cfg->pps_id, "pps_id"); //TODO: may be removed later, get from sps/pps instead
fprintf(fp, "\n");
fflush(fp);
}
}
static void hal_h264e_rkv_dump_mpp_reg_out(h264e_hal_context *ctx)
{
RK_U32 k = 0;
h264e_hal_rkv_dump_files *dump_files = (h264e_hal_rkv_dump_files *)ctx->dump_files;
FILE *fp = dump_files->fp_mpp_reg_out;
h264e_rkv_ioctl_output *reg_out = (h264e_rkv_ioctl_output *)ctx->ioctl_output;
RK_U32 *p_reg = (RK_U32 *)reg_out + sizeof(reg_out->frame_num)/4;
if (fp) {
fprintf(fp, "%d frames out\n", reg_out->frame_num);
for(k= 0; k<ctx->num_frames_to_send; k++) {
fprintf(fp, "#FRAME %d:\n", (ctx->frame_cnt-1) - (ctx->num_frames_to_send-1-k));
for (k=0; k<12; k++) {
fprintf(fp, "reg[%03d/%03x]: %08x\n", k, k * 4, p_reg[k]);
}
fprintf(fp, "\n");
p_reg += sizeof(reg_out->elem[0])/4;
}
fflush(fp);
} else {
mpp_log("try to dump data to mpp_reg_out.txt, but file is not opened");
}
}
static void hal_h264e_rkv_dump_mpp_feedback(h264e_hal_context *ctx)
{
h264e_hal_rkv_dump_files *dump_files = (h264e_hal_rkv_dump_files *)ctx->dump_files;
FILE *fp = dump_files->fp_mpp_feedback;
if (fp) {
h264e_feedback *fb = &ctx->feedback;
(void)fb;
} else {
mpp_log("try to dump data to mpp_feedback.txt, but file is not opened");
}
}
static void hal_h264e_rkv_dump_mpp_strm_out_header(h264e_control_extra_info *extra_info, h264e_hal_context *ctx)
{
h264e_hal_rkv_dump_files *dump_files = (h264e_hal_rkv_dump_files *)ctx->dump_files;
FILE *fp = dump_files->fp_mpp_strm_out;
if (fp) {
fwrite(extra_info->buf, 1, extra_info->size, fp);
fflush(fp);
} else {
mpp_log("try to dump strm header to mpp_strm_out.txt, but file is not opened");
}
}
void hal_h264e_rkv_dump_mpp_strm_out(h264e_hal_context *ctx, MppBuffer *hw_buf)
{
h264e_hal_rkv_dump_files *dump_files = (h264e_hal_rkv_dump_files *)ctx->dump_files;
FILE *fp = dump_files->fp_mpp_strm_out;
if (fp) {
RK_U32 k = 0;
RK_U32 strm_size = 0;
RK_U8 *sw_buf = NULL;
RK_U8 *hw_buf_vir_addr = NULL;
h264e_rkv_ioctl_output *ioctl_output = (h264e_rkv_ioctl_output *)ctx->ioctl_output;
h264e_rkv_ioctl_output_elem *out_elem = ioctl_output->elem;
RK_U32 frame_num = ioctl_output->frame_num;
mpp_log("dump %d frames strm out below", frame_num);
for (k = 0; k < frame_num; k++) {
strm_size = (RK_U32)out_elem[k].swreg69.bs_lgth;
hw_buf_vir_addr = (RK_U8 *)mpp_buffer_get_ptr(hw_buf[k]);
sw_buf = mpp_malloc(RK_U8, strm_size);
mpp_log("dump frame %d strm_size: %d", k, strm_size);
memcpy(sw_buf, hw_buf_vir_addr, strm_size);
fwrite(sw_buf, 1, strm_size, fp);
if (sw_buf)
mpp_free(sw_buf);
}
fflush(fp);
(void)hw_buf;
} else {
mpp_log("try to dump data to mpp_strm_out.txt, but file is not opened");
}
}
void hal_h264e_rkv_frame_push( h264e_hal_rkv_frame **list, h264e_hal_rkv_frame *frame )
{
RK_S32 i = 0;
@@ -157,7 +667,6 @@ void hal_h264e_rkv_frame_push( h264e_hal_rkv_frame **list, h264e_hal_rkv_frame *
}
static h264e_hal_rkv_frame *hal_h264e_rkv_frame_new(h264e_hal_rkv_dpb_ctx *dpb_ctx)
{
RK_S32 k = 0;
@@ -706,9 +1215,6 @@ static MPP_RET hal_h264e_rkv_reference_frame_update( h264e_hal_context *ctx)
return MPP_OK;
}
#endif //RKV_H264E_NUM_REFS > 1
static MPP_RET hal_h264e_rkv_free_buffers(h264e_hal_context *ctx)
{
RK_S32 k = 0;
@@ -845,7 +1351,6 @@ static MPP_RET hal_h264e_rkv_allocate_buffers(h264e_hal_context *ctx, h264e_synt
}
}
h264e_hal_debug_leave();
return MPP_OK;
}
@@ -1580,13 +2085,13 @@ MPP_RET hal_h264e_rkv_set_pps(h264e_hal_pps *pps, h264e_hal_param *par, h264e_co
}
pps->i_pic_init_qs = 26 + H264_QP_BD_OFFSET;
pps->i_chroma_qp_index_offset = cfg->chroma_qp_index_offset;
pps->i_second_chroma_qp_index_offset = cfg->second_chroma_qp_index_offset;
pps->i_chroma_qp_index_offset = 0; //TODO: cfg->chroma_qp_index_offset;
pps->i_second_chroma_qp_index_offset = 0; //TODO: cfg->second_chroma_qp_index_offset;
pps->b_deblocking_filter_control = Sw_deblock_filter_ctrl_present_flag;
pps->b_constrained_intra_pred = par->constrained_intra;
pps->b_redundant_pic_cnt = 0;
pps->b_transform_8x8_mode = cfg->transform8x8_mode ? 1 : 0;
pps->b_transform_8x8_mode = 1; //TODO: cfg->transform8x8_mode ? 1 : 0;
pps->b_cqm_preset = b_cqm_preset;
@@ -1738,6 +2243,8 @@ static MPP_RET hal_h264e_rkv_set_extra_info(h264e_hal_context *ctx, void *param)
h264e_hal_pps *pps_info = &info->pps;
h264e_hal_debug_enter();
hal_h264e_rkv_dump_mpp_extra_info_cfg(ctx, cfg);
info->nal_num = 0;
hal_h264e_rkv_stream_reset(&info->stream);
@@ -1828,6 +2335,8 @@ MPP_RET hal_h264e_rkv_init(void *hal, MppHalCfg *cfg)
ctx->buffers = mpp_calloc(h264e_hal_rkv_buffers, 1);
ctx->extra_info = mpp_calloc(h264e_hal_rkv_out, 1);
ctx->dpb_ctx = mpp_calloc(h264e_hal_rkv_dpb_ctx, 1);
ctx->dump_files = mpp_calloc(h264e_hal_rkv_dump_files, 1);
hal_h264e_rkv_open_dump_files(ctx->dump_files);
hal_h264e_rkv_init_extra_info(ctx->extra_info);
hal_h264e_rkv_reference_init(ctx->dpb_ctx, &ctx->param);
@@ -1891,7 +2400,11 @@ MPP_RET hal_h264e_rkv_deinit(void *hal)
hal_h264e_rkv_reference_deinit(ctx->dpb_ctx);
MPP_FREE(ctx->dpb_ctx);
}
if(ctx->dump_files) {
hal_h264e_rkv_close_dump_files(ctx->dump_files);
MPP_FREE(ctx->dump_files);
}
#ifdef RKPLATFORM
if (ctx->vpu_socket <= 0) {
@@ -1932,6 +2445,24 @@ MPP_RET hal_h264e_rkv_set_ioctl_extra_info(h264e_rkv_ioctl_extra_info *extra_inf
return MPP_OK;
}
static MPP_RET hal_h264e_rkv_validate_syntax(h264e_syntax *syn)
{
h264e_hal_debug_enter();
/* validate */
H264E_HAL_VALIDATE_GT(syn->output_strm_limit_size, "output_strm_limit_size", 0);
H264E_HAL_VALIDATE_GT(syn->keyframe_max_interval, "keyframe_max_interval", 0);
/* adjust */
if((h264e_rkv_csp)syn->input_image_format == H264E_RKV_CSP_YUV420P){
syn->input_cb_addr = syn->input_luma_addr;
syn->input_cr_addr = syn->input_luma_addr;
}
h264e_hal_debug_leave();
return MPP_OK;
}
MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
{
RK_S32 k = 0;
@@ -1957,10 +2488,9 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
ctx->enc_mode = RKV_H264E_ENC_MODE;
h264e_hal_debug_enter();
hal_h264e_rkv_dump_mpp_syntax_in(syn, ctx);
mpp_assert(sps->i_level_idc == syn->level_idc);
mpp_assert(sps->i_profile_idc == syn->profile_idc);
hal_h264e_rkv_validate_syntax(syn);
hal_h264e_rkv_adjust_param(ctx); //TODO: future expansion
if (ctx->frame_cnt == 0) {
@@ -1989,24 +2519,13 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
hal_h264e_rkv_set_ioctl_extra_info(&ioctl_info->reg_info[0].extra_info, syn);
}
#if (RKV_H264E_NUM_REFS > 1)
if (MPP_OK != hal_h264e_rkv_reference_frame_set(ctx, syn)) {
if(MPP_OK != hal_h264e_rkv_reference_frame_set(ctx, syn)) {
h264e_hal_log_err("hal_h264e_rkv_reference_frame_set failed, multi-ref error");
}
#endif
h264e_hal_log_detail("generate regs when frame_cnt_gen_ready/(num_frames_to_send-1): %d/%d",
ctx->frame_cnt_gen_ready, ctx->num_frames_to_send - 1);
if (syn->frame_num != dpb_ctx->i_frame_num)
mpp_err("syn vs dpb_ctx: syn->frame_num(%d) != dpb_ctx->i_frame_num(%d)", syn->frame_num, dpb_ctx->i_frame_num);
if (syn->idr_pic_id != (RK_U16)dpb_ctx->i_idr_pic_id)
mpp_err("syn vs dpb_ctx: syn->idr_pic_id(%d) != dpb_ctx->i_idr_pic_id(%d)", syn->idr_pic_id, dpb_ctx->i_idr_pic_id);
if (syn->pic_order_cnt_lsb != (dpb_ctx->fdec->i_poc & ((1 << sps->i_log2_max_poc_lsb) - 1)))
mpp_err("syn vs dpb_ctx: syn->pic_order_cnt_lsb(%d) != (dpb_ctx->fdec->i_poc & ((1 << sps->i_log2_max_poc_lsb) - 1))(%d)",
syn->pic_order_cnt_lsb, (dpb_ctx->fdec->i_poc & ((1 << sps->i_log2_max_poc_lsb) - 1)));
memset(regs, 0, sizeof(h264e_rkv_reg_set));
regs->swreg01.rkvenc_ver = 0x1;
@@ -2154,9 +2673,9 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
regs->swreg36_meiw_addr = mpp_buffer_get_fd(bufs->hw_mei_buf[mul_buf_idx]);
regs->swreg37_bsbt_addr = syn->output_strm_addr;
if (VPUClientGetIOMMUStatus() > 0)
regs->swreg38_bsbb_addr = regs->swreg37_bsbt_addr | (pic_width_align16 * pic_height_align16 * 3) << 10; // TODO: stream size relative with syntax
regs->swreg38_bsbb_addr = regs->swreg37_bsbt_addr | (syn->output_strm_limit_size << 10); // TODO: stream size relative with syntax
else
regs->swreg38_bsbb_addr = regs->swreg37_bsbt_addr + (pic_width_align16 * pic_height_align16 * 3);
regs->swreg38_bsbb_addr = regs->swreg37_bsbt_addr + (syn->output_strm_limit_size);
regs->swreg39_bsbr_addr = regs->swreg38_bsbb_addr;
regs->swreg40_bsbw_addr = regs->swreg37_bsbt_addr; //syn->addr_cfg.bsbw_addr;
@@ -2290,7 +2809,7 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
regs->swreg55.ctu_ebits = 0; //syn->swreg55.ctu_ebits;
regs->swreg56.rect_size = (sps->i_profile_idc == H264_PROFILE_BASELINE && sps->i_level_idc <= 30);
regs->swreg56.inter_4x4 = !syn->h264_inter4x4_disabled; //NOTE!
regs->swreg56.inter_4x4 = 1;
regs->swreg56.arb_sel = 0; //syn->swreg56.arb_sel;
regs->swreg56.vlc_lmt = (sps->i_profile_idc < H264_PROFILE_HIGH && !syn->enable_cabac);
regs->swreg56.rdo_mark = 0; //syn->swreg56.rdo_mark;
@@ -2334,13 +2853,13 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
regs->swreg58.mpoc_lm4 = sps->i_log2_max_poc_lsb - 4; //syn->swreg58.mpoc_lm4;
regs->swreg59.etpy_mode = syn->enable_cabac;
regs->swreg59.trns_8x8 = 1; //syn->swreg59.trns_8x8;
regs->swreg59.trns_8x8 = pps->b_transform_8x8_mode; //syn->swreg59.trns_8x8;
regs->swreg59.csip_flg = par->constrained_intra; //syn->swreg59.csip_flg;
regs->swreg59.num_ref0_idx = pps->i_num_ref_idx_l0_default_active - 1; //syn->swreg59.num_ref0_idx;
regs->swreg59.num_ref1_idx = pps->i_num_ref_idx_l1_default_active - 1; //syn->swreg59.num_ref1_idx;
regs->swreg59.pic_init_qp = syn->pic_init_qp - H264_QP_BD_OFFSET;
regs->swreg59.cb_ofst = 0; //syn->chroma_qp_index_offset;
regs->swreg59.cr_ofst = 0; //syn->second_chroma_qp_index_offset;
regs->swreg59.cb_ofst = pps->i_chroma_qp_index_offset; //syn->chroma_qp_index_offset;
regs->swreg59.cr_ofst = pps->i_second_chroma_qp_index_offset; //syn->second_chroma_qp_index_offset;
regs->swreg59.wght_pred = 0x0;
regs->swreg59.dbf_cp_flg = 1; //syn->deblocking_filter_control;
@@ -2483,9 +3002,9 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
regs->swreg98.axip1_wrk_cyc = 0x0;
#endif //#if !RKV_H264E_REMOVE_UNNECESSARY_REGS
#if (RKV_H264E_NUM_REFS > 1)
hal_h264e_rkv_dump_mpp_reg_in(ctx);
hal_h264e_rkv_reference_frame_update(ctx);
#endif
dpb_ctx->i_frame_cnt++;
if (dpb_ctx->i_nal_ref_idc != RKVENC_NAL_PRIORITY_DISPOSABLE)
dpb_ctx->i_frame_num ++;
@@ -2548,9 +3067,17 @@ MPP_RET hal_h264e_rkv_start(void *hal, HalTaskInfo *task)
static MPP_RET hal_h264e_rkv_set_feedback(h264e_feedback *fb, h264e_rkv_ioctl_output *out)
{
(void)fb;
(void)out;
RK_U32 k = 0;
h264e_rkv_ioctl_output_elem *elem = NULL;
h264e_hal_debug_enter();
for(k=0; k<out->frame_num; k++) {
elem = &out->elem[k];
fb->hw_status = elem->hw_status;
fb->qp_sum = elem->swreg71.qp_sum;
fb->out_strm_size = elem->swreg69.bs_lgth;
}
h264e_hal_debug_leave();
return MPP_OK;
}
@@ -2616,6 +3143,9 @@ MPP_RET hal_h264e_rkv_wait(void *hal, HalTaskInfo *task)
int_cb.callBack(int_cb.opaque, fb);
}
hal_h264e_rkv_dump_mpp_reg_out(ctx);
hal_h264e_rkv_dump_mpp_feedback(ctx);
h264e_hal_debug_leave();
return MPP_OK;
@@ -2652,6 +3182,7 @@ MPP_RET hal_h264e_rkv_control(void *hal, RK_S32 cmd_type, void *param)
}
case MPP_ENC_GET_EXTRA_INFO: {
hal_h264e_rkv_get_extra_info(param, ctx->extra_info);
hal_h264e_rkv_dump_mpp_strm_out_header(param, ctx);
break;
}
default : {

35
mpp/hal/rkenc/h264e/hal_h264e_rkv.h
View File

@@ -36,7 +36,7 @@ enc_mode
#define RKV_H264E_LINKTABLE_EACH_NUM 1
#endif
#define RKV_H264E_NUM_REFS 3
#define RKV_H264E_NUM_REFS 1
#define RKV_H264E_LONGTERM_REF_EN 0
//-------------------------------------------------------------------------------
@@ -70,19 +70,18 @@ enc_mode
#define RKV_H264E_CQM_JVT 1
#define RKV_H264E_CQM_CUSTOM 2
typedef enum h264e_rkv_csp_t {
RKV_H264E_CSP_ARGB8888, // 0
RKV_H264E_CSP_BGR888, // 1
RKV_H264E_CSP_RGB565, // 2
RKV_H264E_CSP_NONE, // 3
RKV_H264E_CSP_YUV422sp, // 4
RKV_H264E_CSP_YUV422planar, // 5
RKV_H264E_CSP_YUV420sp, // 6
RKV_H264E_CSP_YUV420planar, // 7
RKV_H264E_CSP_YUYV422, // 8
RKV_H264E_CSP_UYVY422, // 9
RKV_H264E_CSP_BUTT, // 10
H264E_RKV_CSP_ARGB8888, // 0
H264E_RKV_CSP_BGR888, // 1
H264E_RKV_CSP_RGB565, // 2
H264E_RKV_CSP_NONE, // 3
H264E_RKV_CSP_YUV422SP, // 4
H264E_RKV_CSP_YUV422P, // 5
H264E_RKV_CSP_YUV420SP, // 6
H264E_RKV_CSP_YUV420P, // 7
H264E_RKV_CSP_YUYV422, // 8
H264E_RKV_CSP_UYVY422, // 9
H264E_RKV_CSP_BUTT, // 10
} h264e_rkv_csp;
@@ -149,6 +148,14 @@ typedef struct h264e_hal_rkv_nal_t {
RK_S32 sh_head_len;
} h264e_hal_rkv_nal;
typedef struct h264e_hal_rkv_dump_files_t {
FILE *fp_mpp_syntax_in;
FILE *fp_mpp_reg_in;
FILE *fp_mpp_reg_out;
FILE *fp_mpp_strm_out;
FILE *fp_mpp_feedback;
FILE *fp_mpp_extra_ino_cfg;
} h264e_hal_rkv_dump_files;
typedef struct h264e_hal_rkv_stream_t {
RK_U8 *p_start;
@@ -198,7 +205,7 @@ struct h264e_hal_rkv_frame_t;
typedef struct h264e_hal_rkv_frame_t {
MppBuffer hw_buf;
RK_S32 hw_buf_used;
RK_S32 i_frame_cnt; /* Presentation frame number */
RK_S32 i_frame_cnt; /* Presentation frame number */
RK_S32 i_frame_num; /* 7.4.3 frame_num */
RK_S32 long_term_flag;
RK_S32 reorder_longterm_flag;

109
mpp/hal/rkenc/h264e/hal_h264e_vpu.c
View File

@@ -713,49 +713,48 @@ const RK_S32 h264_context_init[3][460][2] = {
#ifdef H264E_DUMP_DATA_TO_FILE
static MPP_RET hal_h264e_vpu_open_dump_files(void *dump_files)
{
#if (H264E_HAL_LOG_MODE & H264E_HAL_LOG_FILE)
char base_path[512];
char full_path[512];
h264e_hal_vpu_dump_files *files = (h264e_hal_vpu_dump_files *)dump_files;
strcpy(base_path, "/sdcard/h264e_data/");
if (h264e_hal_log_mode & H264E_HAL_LOG_FILE) {
char base_path[512];
char full_path[512];
h264e_hal_vpu_dump_files *files = (h264e_hal_vpu_dump_files *)dump_files;
strcpy(base_path, "/sdcard/h264e_data/");
sprintf(full_path, "%s%s", base_path, "mpp_syntax_in.txt");
files->fp_mpp_syntax_in = fopen(full_path, "wb");
if (!files->fp_mpp_syntax_in) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
sprintf(full_path, "%s%s", base_path, "mpp_syntax_in.txt");
files->fp_mpp_syntax_in = fopen(full_path, "wb");
if (!files->fp_mpp_syntax_in) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_reg_in.txt");
files->fp_mpp_reg_in = fopen(full_path, "wb");
if (!files->fp_mpp_reg_in) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_reg_out.txt");
files->fp_mpp_reg_out = fopen(full_path, "wb");
if (!files->fp_mpp_reg_out) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_feedback.txt");
files->fp_mpp_feedback = fopen(full_path, "wb");
if (!files->fp_mpp_feedback) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_strm_out.bin");
files->fp_mpp_strm_out = fopen(full_path, "wb");
if (!files->fp_mpp_strm_out) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
}
sprintf(full_path, "%s%s", base_path, "mpp_reg_in.txt");
files->fp_mpp_reg_in = fopen(full_path, "wb");
if (!files->fp_mpp_reg_in) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_reg_out.txt");
files->fp_mpp_reg_out = fopen(full_path, "wb");
if (!files->fp_mpp_reg_out) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_feedback.txt");
files->fp_mpp_feedback = fopen(full_path, "wb");
if (!files->fp_mpp_feedback) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_strm_out.bin");
files->fp_mpp_strm_out = fopen(full_path, "wb");
if (!files->fp_mpp_strm_out) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
#endif //#if (H264E_HAL_LOG_MODE & H264E_HAL_LOG_FILE)
(void)dump_files;
return MPP_OK;
}
@@ -833,7 +832,7 @@ static void hal_h264e_vpu_dump_mpp_reg_in(h264e_hal_context *ctx)
RK_S32 k = 0;
RK_U32 *reg = (RK_U32 *)ctx->regs;
fprintf(fp, "#FRAME %d:\n", ctx->frame_cnt);
for (k = 0; k < ON2_H264E_NUM_REGS; k++) {
for (k = 0; k < VEPU_H264E_NUM_REGS; k++) {
fprintf(fp, "reg[%03d/%03x]: %08x\n", k, k * 4, reg[k]);
//mpp_log("reg[%03d/%03x]: %08x", k, k*4, reg[k]);
}
@@ -851,7 +850,7 @@ static void hal_h264e_vpu_dump_mpp_reg_out(h264e_hal_context *ctx)
RK_S32 k = 0;
RK_U32 *reg = (RK_U32 *)ctx->regs;
fprintf(fp, "#FRAME %d:\n", ctx->frame_cnt - 1);
for (k = 0; k < ON2_H264E_NUM_REGS; k++) {
for (k = 0; k < VEPU_H264E_NUM_REGS; k++) {
fprintf(fp, "reg[%03d/%03x]: %08x\n", k, k * 4, reg[k]);
//mpp_log("reg[%03d/%03x]: %08x", k, k*4, reg[k]);
}
@@ -1622,6 +1621,23 @@ MPP_RET hal_h264e_vpu_deinit(void *hal)
return MPP_OK;
}
static MPP_RET hal_h264e_vpu_validate_syntax(h264e_syntax *syn)
{
h264e_hal_debug_enter();
/* validate */
H264E_HAL_VALIDATE_GT(syn->output_strm_limit_size, "output_strm_limit_size", 0);
H264E_HAL_VALIDATE_GT(syn->keyframe_max_interval, "keyframe_max_interval", 0);
/* adjust */
syn->output_strm_limit_size /= 8; /* 64-bit addresses */
syn->output_strm_limit_size &= (~0x07); /* 8 multiple size */
h264e_hal_debug_leave();
return MPP_OK;
}
MPP_RET hal_h264e_vpu_gen_regs(void *hal, HalTaskInfo *task)
{
RK_S32 scaler = 0, i = 0;
@@ -1654,6 +1670,7 @@ MPP_RET hal_h264e_vpu_gen_regs(void *hal, HalTaskInfo *task)
#ifdef H264E_DUMP_DATA_TO_FILE
hal_h264e_vpu_dump_mpp_syntax_in(syn, ctx);
#endif
hal_h264e_vpu_validate_syntax(syn);
memset(reg, 0, sizeof(h264e_vpu_reg_set));
@@ -1927,8 +1944,8 @@ MPP_RET hal_h264e_vpu_start(void *hal, HalTaskInfo *task)
#ifdef RKPLATFORM
if (ctx->vpu_socket > 0) {
RK_U32 *p_regs = (RK_U32 *)ctx->regs;
h264e_hal_log_detail("vpu client is sending %d regs", ON2_H264E_NUM_REGS);
if (MPP_OK != VPUClientSendReg(ctx->vpu_socket, p_regs, ON2_H264E_NUM_REGS)) {
h264e_hal_log_detail("vpu client is sending %d regs", VEPU_H264E_NUM_REGS);
if (MPP_OK != VPUClientSendReg(ctx->vpu_socket, p_regs, VEPU_H264E_NUM_REGS)) {
mpp_err("VPUClientSendReg Failed!!!");
return MPP_ERR_VPUHW;
} else {
@@ -1981,7 +1998,7 @@ MPP_RET hal_h264e_vpu_wait(void *hal, HalTaskInfo *task)
VPU_CMD_TYPE cmd = 0;
RK_S32 length = 0;
RK_S32 hw_ret = VPUClientWaitResult(ctx->vpu_socket, (RK_U32 *)reg_out,
ON2_H264E_NUM_REGS, &cmd, &length);
VEPU_H264E_NUM_REGS, &cmd, &length);
h264e_hal_log_detail("VPUClientWaitResult: ret %d, cmd %d, len %d\n", hw_ret, cmd, length);

4
mpp/hal/rkenc/h264e/hal_h264e_vpu.h
View File

@@ -606,7 +606,7 @@
#define VDPU_REG_PRED_FLT_PRED_BC_TAP_4_3(x) (((x) & 0x3ff) << 12)
#define VDPU_REG_PRED_FLT_PRED_BC_TAP_5_0(x) (((x) & 0x3ff) << 2)
#define ON2_H264E_NUM_REGS 184
#define VEPU_H264E_NUM_REGS 184
#define H264E_CABAC_TABLE_BUF_SIZE (52*2*464)
typedef struct h264e_hal_vpu_dump_files_t {
@@ -654,7 +654,7 @@ typedef struct h264e_hal_vpu_buffers_t {
} h264e_hal_vpu_buffers;
typedef struct h264e_vpu_reg_set_t {
RK_U32 val[ON2_H264E_NUM_REGS];
RK_U32 val[VEPU_H264E_NUM_REGS];
} h264e_vpu_reg_set;
MPP_RET hal_h264e_vpu_init (void *hal, MppHalCfg *cfg);

663
mpp/hal/rkenc/h264e/test/h264e_hal_test.c
View File

@@ -29,8 +29,6 @@
#include "hal_h264e_vpu.h"
#include "hal_h264e_rkv.h"
#define H264E_HAL_FPGA_TEST 0
#define H264E_HAL_FPGA_FAST_MODE 0
static HalDeviceId test_device_id = HAL_RKVENC;
@@ -61,174 +59,22 @@ RK_U32 g_frame_cnt = 0;
RK_U32 g_frame_read_cnt = 0;
extern const RK_S32 h264_context_init_intra[460][2];
extern const RK_S32 h264_context_init[3][460][2];
extern const RK_S32 h264e_csp_idx_map[RKV_H264E_CSP_BUTT];
extern const RK_S32 h264e_csp_idx_map[H264E_RKV_CSP_BUTT];
#ifdef H264E_DUMP_DATA_TO_FILE
extern void hal_h264e_vpu_dump_mpp_strm_out(h264e_hal_context *ctx, MppBuffer hw_buf);
#endif
#if 0
extern MPP_RET hal_h264e_rkv_stream_init(h264e_hal_rkv_stream *s);
extern MPP_RET hal_h264e_rkv_set_sps(h264e_hal_sps *sps, h264e_hal_param *par, h264e_syntax *syn);
extern MPP_RET hal_h264e_rkv_sps_write(h264e_hal_sps *sps, h264e_hal_rkv_stream *s);
extern MPP_RET hal_h264e_rkv_set_pps(h264e_hal_pps *pps, h264e_hal_param *par, h264e_syntax *syn, h264e_hal_sps *sps);
extern MPP_RET hal_h264e_rkv_pps_write(h264e_hal_pps *pps, h264e_hal_sps *sps, h264e_hal_rkv_stream *s);
extern MPP_RET hal_h264e_rkv_stream_deinit(h264e_hal_rkv_stream *s);
extern void hal_h264e_rkv_nals_init(h264e_hal_rkv_out *out);
extern void hal_h264e_rkv_nals_deinit(h264e_hal_rkv_out *out);
extern void hal_h264e_rkv_nal_start(h264e_hal_rkv_out *out, RK_S32 i_type, RK_S32 i_ref_idc);
extern MPP_RET hal_h264e_rkv_encapsulate_nals(h264e_hal_rkv_out *out);
extern void hal_h264e_rkv_nal_end(h264e_hal_rkv_out *out);
#endif
extern void hal_h264e_rkv_dump_mpp_strm_out(h264e_hal_context *ctx, MppBuffer *hw_buf);
typedef struct h264e_hal_test_cfg_t {
RK_U32 hw_mode;
char input_syntax_file_path[256];
char input_yuv_file_path[256];
} h264e_hal_test_cfg;
static RK_U32 reg_idx2addr_map[132] = {
0xffff, //0, unvalid.
0x0000, //1
0x0004, //2
0x0008, //3
0x000c, //4
0x0010, //5
0x0014, //6
0x0018, //7
0x001C, //8
0x0030, //9
0x0034, //10
0x0038, //11
0x003c, //12
0x0040, //13
0x0044, //14
0x0048, //15
0x004c, //16
0x0050, //17
0x0054, //18
0x0058, //19
0x005c, //20
0x0060, //21.0~21.4
0x0074, //22.0~22.39
0x0114, //23
0x0118, //24
0x011c, //25
0x0120, //26
0x0124, //27
0x0128, //28
0x012c, //29
0x0130, //30
0x0134, //31
0x0138, //32
0x013c, //33
0x0140, //34
0x0144, //35
0x0148, //36
0x014c, //36
0x0150, //38
0x0154, //39
0x0158, //40
0x015c, //41
0x0160, //42
0x0164, //43
0x0168, //44
0x016c, //45
0x0170, //46
0x0174, //47
0x0178, //48
0x017c, //49
0x0180, //50
0x0184, //51
0x0188, //52
0x018c, //53
0x0190, //54
0x0194, //55
0x0198, //56
0x019c, //57
0x01a0, //58
0x01a4, //59
0x01a8, //60
0x01ac, //61
0x01b0, //62
0x01b4, //63
0x01b8, //64
0x01c0, //65
0x01c4, //66
0x01d0, //67.0~67.7
0x01f0, //68.0~68.7
0x0210, //69
0x0214, //70
0x0218, //71
0x021c, //72
0x0220, //73
0x0224, //74
0x0228, //75
0x022c, //76
0x0230, //77
0x0234, //78
0x0238, //79
0x0400, //80.0~80.255
0x0800, //81
0x0804, //82
0x0808, //83
0x0810, //84
0x0814, //85
0x0818, //86
0x0820, //87
0x0824, //88
0x0828, //89
0x082c, //90
0x0830, //91
0x0834, //92
0x0840, //93
0x0844, //94
0x0848, //95
0x084c, //96
0x0850, //97
0x0854, //98
0x0860, //99( 33 regs below are not present in c-model, included)
0x0864, //100
0x0868, //101
0x086c, //102
0x0870, //103
0x0874, //104
0x0880, //105
0x0884, //106
0x0888, //107
0x088c, //108
0x0890, //109
0x0894, //110
0x0898, //111
0x089c, //112
0x08a0, //113
0x08a4, //114
0x08a8, //115
0x08ac, //116
0x08b0, //117
0x08b4, //118
0x08b8, //119
0x08bc, //120
0x08c0, //121
0x08c4, //122
0x08c8, //123
0x08cc, //124
0x08d0, //125
0x08d4, //126
0x08d8, //127
0x08dc, //128
0x08e0, //129
0x08e4, //130
0x08e8, //131
};
static MPP_RET h264e_rkv_test_open_files(h264e_hal_test_cfg test_cfg)
{
char base_path[512];
char full_path[512];
#if H264E_HAL_FPGA_TEST
strcpy(base_path, "/");
#else
strcpy(base_path, "/sdcard/h264e_data/");
#endif
sprintf(full_path, "%s", test_cfg.input_yuv_file_path);
fp_h264e_yuv_in = fopen(full_path, "rb");
@@ -244,56 +90,14 @@ static MPP_RET h264e_rkv_test_open_files(h264e_hal_test_cfg test_cfg)
return MPP_ERR_OPEN_FILE;
}
#if !H264E_HAL_FPGA_FAST_MODE
sprintf(full_path, "%s%s", base_path, "mpp_syntax_in.txt");
fp_mpp_syntax_in = fopen(full_path, "wb");
if (!fp_mpp_syntax_in) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
#if 0
sprintf(full_path, "%s%s", base_path, "mpp_yuv_in.yuv");
fp_mpp_yuv_in = fopen(full_path, "wb");
if (!fp_mpp_yuv_in) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_reg_in.txt");
fp_mpp_reg_in = fopen(full_path, "wb");
if (!fp_mpp_reg_in) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_reg_out.txt");
fp_mpp_reg_out = fopen(full_path, "wb");
if (!fp_mpp_reg_out) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_feedback.txt");
fp_mpp_feedback = fopen(full_path, "wb");
if (!fp_mpp_feedback) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
sprintf(full_path, "%s%s", base_path, "mpp_wr2hw_reg_in.txt");
fp_mpp_wr2hw_reg_in = fopen(full_path, "wb");
if (!fp_mpp_syntax_in) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
#endif //!H264E_HAL_FPGA_FAST_MODE
sprintf(full_path, "%s%s", base_path, "mpp_strm_out.bin");
fp_mpp_strm_out = fopen(full_path, "wb");
if (!fp_mpp_strm_out) {
mpp_err("%s open error", full_path);
return MPP_ERR_OPEN_FILE;
}
#endif
return MPP_OK;
}
@@ -617,10 +421,8 @@ static MPP_RET get_vpu_syntax_in(h264e_syntax *syn, MppBuffer *hw_in_buf, MppBuf
return MPP_OK;
}
static void dump_rkv_mpp_syntax_in(h264e_hal_rkv_dbg_info *info, h264e_syntax *syn)
#if 0
static void dump_rkv_mpp_dbg_info(h264e_hal_rkv_dbg_info *info, h264e_syntax *syn)
{
if (fp_mpp_syntax_in) {
RK_S32 k = 0;
@@ -862,342 +664,11 @@ static void dump_rkv_mpp_syntax_in(h264e_hal_rkv_dbg_info *info, h264e_syntax *s
mpp_log("try to dump data to mpp_syntax_in.txt, but file is not opened");
}
}
static void dump_rkv_mpp_reg_in( h264e_hal_context *ctx)
{
RK_S32 k = 0;
h264e_rkv_reg_set *reg_list = (h264e_rkv_reg_set *)ctx->regs;
RK_U32 *regs = (RK_U32 *)&reg_list[ctx->frame_cnt_gen_ready - 1];
#if RKV_H264E_ADD_RESERVE_REGS
h264e_rkv_reg_set * r = (h264e_rkv_reg_set *)regs;
#endif
mpp_log("dump_rkv_mpp_reg_in enter, %d regs are dumped", RK_H264E_NUM_REGS);
if (fp_mpp_reg_in) {
FILE *fp = fp_mpp_reg_in;
fprintf(fp, "#FRAME %d:\n", g_frame_cnt);
//mpp_log("%d", r->swreg45.cime_rama_max);
//mpp_log("%d", r->swreg45.cime_rama_h);
//mpp_log("%d", r->swreg45.cach_l2_tag);
//mpp_log("%d", r->swreg45.cach_l1_dtmr);
//mpp_log("%d", r->swreg45.reserve);
//mpp_log("%d", r->swreg57.nal_ref_idc);
//mpp_log("%d", r->swreg57.nal_unit_type);
//mpp_log("%d", r->swreg57.reserve);
//mpp_log("%d", r->swreg59.etpy_mode);
//mpp_log("%d", r->swreg59.trns_8x8);
//mpp_log("%d", r->swreg59.csip_flg);
//mpp_log("%d", r->swreg59.num_ref0_idx);
//mpp_log("%d", r->swreg59.num_ref1_idx);
//mpp_log("%d", r->swreg59.pic_init_qp);
//mpp_log("%d", r->swreg59.cb_ofst);
//mpp_log("%d", r->swreg59.cr_ofst);
//mpp_log("%d", r->swreg59.wght_pred);
//mpp_log("%d", r->swreg59.dbf_cp_flg);
//mpp_log("%d", r->swreg59.reserve);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 1, 1, reg_idx2addr_map[ 1], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 2, 2, reg_idx2addr_map[ 2], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 3, 3, reg_idx2addr_map[ 3], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 4, 4, reg_idx2addr_map[ 4], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 5, 5, reg_idx2addr_map[ 5], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 6, 6, reg_idx2addr_map[ 6], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 7, 7, reg_idx2addr_map[ 7], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 8, 8, reg_idx2addr_map[ 8], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_08_09);
#endif
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 9, 9, reg_idx2addr_map[ 9], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 10, 10, reg_idx2addr_map[10], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 11, 11, reg_idx2addr_map[11], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 12, 12, reg_idx2addr_map[12], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 13, 13, reg_idx2addr_map[13], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 14, 14, reg_idx2addr_map[14], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 15, 15, reg_idx2addr_map[15], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 16, 16, reg_idx2addr_map[16], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 17, 17, reg_idx2addr_map[17], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 18, 18, reg_idx2addr_map[18], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 19, 19, reg_idx2addr_map[19], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 20, 20, reg_idx2addr_map[20], *regs++);
for (k = 0; k < 5; k++)
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 21, 21, reg_idx2addr_map[21], *regs++);
for (k = 0; k < 40; k++)
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 22, 22, reg_idx2addr_map[22], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 23, 23, reg_idx2addr_map[23], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 24, 24, reg_idx2addr_map[24], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 25, 25, reg_idx2addr_map[25], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 26, 26, reg_idx2addr_map[26], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 27, 27, reg_idx2addr_map[27], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 28, 28, reg_idx2addr_map[28], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 29, 29, reg_idx2addr_map[29], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 30, 30, reg_idx2addr_map[30], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 31, 31, reg_idx2addr_map[31], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 32, 32, reg_idx2addr_map[32], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 33, 33, reg_idx2addr_map[33], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 34, 34, reg_idx2addr_map[34], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 35, 35, reg_idx2addr_map[35], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 36, 36, reg_idx2addr_map[36], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 37, 37, reg_idx2addr_map[37], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 38, 38, reg_idx2addr_map[38], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 39, 39, reg_idx2addr_map[39], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 40, 40, reg_idx2addr_map[40], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 41, 41, reg_idx2addr_map[41], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 42, 42, reg_idx2addr_map[42], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 43, 43, reg_idx2addr_map[43], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 44, 44, reg_idx2addr_map[44], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 45, 45, reg_idx2addr_map[45], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 46, 46, reg_idx2addr_map[46], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 47, 47, reg_idx2addr_map[47], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 48, 48, reg_idx2addr_map[48], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 49, 49, reg_idx2addr_map[49], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 50, 50, reg_idx2addr_map[50], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 51, 51, reg_idx2addr_map[51], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 52, 52, reg_idx2addr_map[52], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 53, 53, reg_idx2addr_map[53], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 54, 54, reg_idx2addr_map[54], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 55, 55, reg_idx2addr_map[55], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 56, 56, reg_idx2addr_map[56], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 57, 57, reg_idx2addr_map[57], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 58, 58, reg_idx2addr_map[58], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 59, 59, reg_idx2addr_map[59], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 60, 60, reg_idx2addr_map[60], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 61, 61, reg_idx2addr_map[61], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 62, 62, reg_idx2addr_map[62], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 63, 63, reg_idx2addr_map[63], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 64, 64, reg_idx2addr_map[64], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_64_65);
#endif
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 65, 65, reg_idx2addr_map[65], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 66, 66, reg_idx2addr_map[66], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_66_67);
#endif
for (k = 0; k < 8; k++)
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 67, 67, reg_idx2addr_map[67], *regs++);
for (k = 0; k < 8; k++)
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 68, 68, reg_idx2addr_map[68], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 69, 69, reg_idx2addr_map[69], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 70, 70, reg_idx2addr_map[70], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 71, 71, reg_idx2addr_map[71], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 72, 72, reg_idx2addr_map[72], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 74, 73, reg_idx2addr_map[73], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 75, 74, reg_idx2addr_map[74], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 76, 75, reg_idx2addr_map[75], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 77, 76, reg_idx2addr_map[76], *regs++);
#if !RKV_H264E_REMOVE_UNNECESSARY_REGS
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 78, 77, reg_idx2addr_map[77], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 79, 78, reg_idx2addr_map[78], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 80, 79, reg_idx2addr_map[79], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_79_80);
#endif
for (k = 0; k < 256; k++)
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 73, 80, reg_idx2addr_map[80], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 81, 81, reg_idx2addr_map[81], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 82, 82, reg_idx2addr_map[82], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 83, 83, reg_idx2addr_map[83], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_83_84);
#endif
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 84, 84, reg_idx2addr_map[84], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 85, 85, reg_idx2addr_map[85], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 86, 86, reg_idx2addr_map[86], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_86_87);
#endif
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 87, 87, reg_idx2addr_map[87], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 88, 88, reg_idx2addr_map[88], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 89, 89, reg_idx2addr_map[89], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 90, 90, reg_idx2addr_map[90], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 91, 91, reg_idx2addr_map[91], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 92, 92, reg_idx2addr_map[92], *regs++);
#if RKV_H264E_ADD_RESERVE_REGS
regs += MPP_ARRAY_ELEMS(r->reserve_92_93);
#endif
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 93, 93, reg_idx2addr_map[93], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 94, 94, reg_idx2addr_map[94], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 95, 95, reg_idx2addr_map[95], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 96, 96, reg_idx2addr_map[96], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 97, 97, reg_idx2addr_map[97], *regs++);
fprintf(fp, "reg[%03d/%03d/%04x]: %08x\n", 98, 98, reg_idx2addr_map[98], *regs );
#endif //#if !RKV_H264E_REMOVE_UNNECESSARY_REGS
fprintf(fp, "\n");
fflush(fp);
} else {
mpp_log("try to dump data to mpp_reg_in.txt, but file is not opened");
}
}
static void dump_rkv_mpp_reg_out(void *regs)
{
RK_S32 k = 0;
RK_U32 *reg = (RK_U32 *)regs;
if (fp_mpp_reg_out) {
fprintf(fp_mpp_reg_out, "#FRAME %d:\n", g_frame_cnt);
for (k = 0; k < RK_H264E_NUM_REGS; k++) {
fprintf(fp_mpp_reg_out, "reg[%03d/%03x]: %08x\n", k, k * 4, reg[k]);
//mpp_log("reg[%03d/%03x]: %08x", k, k*4, reg[k]);
}
fprintf(fp_mpp_reg_out, "\n");
fflush(fp_mpp_reg_out);
} else {
mpp_log("try to dump data to mpp_reg_out.txt, but file is not opened");
}
}
static void dump_rkv_mpp_feedback(h264e_feedback *fb)
{
(void)fb;
if (fp_mpp_feedback) {
} else {
mpp_log("try to dump data to mpp_feedback.txt, but file is not opened");
}
}
static void dump_rkv_mpp_wr2hw_reg_in(void *regs)
{
//dump: 2~67, 80, | total 372
//left: 1, 68~79, 81~98 | total 38
RK_S32 k = 0;
RK_U32 *reg = (RK_U32 *)regs;
#if RKV_H264E_ADD_RESERVE_REGS
h264e_rkv_reg_set * r = (h264e_rkv_reg_set *)regs;
#endif
if (fp_mpp_wr2hw_reg_in) {
FILE *fp = fp_mpp_wr2hw_reg_in;
//fprintf(fp_mpp_reg_out, "#FRAME %d:\n", g_frame_cnt);
RK_S32 ofs_9_64 = 0;
RK_S32 ofs_65_66 = 0;
RK_S32 ofs_67_79 = 0;
RK_S32 ofs_80_83 = 0;
//RK_S32 ofs_84_86 = 0;
//RK_S32 ofs_87_92 = 0;
//RK_S32 ofs_93_98 = 0;
#if RKV_H264E_ADD_RESERVE_REGS
ofs_9_64 = MPP_ARRAY_ELEMS(r->reserve_08_09);
ofs_65_66 = ofs_9_64 + MPP_ARRAY_ELEMS(r->reserve_64_65);
ofs_67_79 = ofs_65_66 + MPP_ARRAY_ELEMS(r->reserve_66_67);
#if !RKV_H264E_REMOVE_UNNECESSARY_REGS
ofs_80_83 = ofs_67_79 + MPP_ARRAY_ELEMS(r->reserve_79_80);
//ofs_84_86 = ofs_80_83 + MPP_ARRAY_ELEMS(r->reserve_83_84);
//ofs_87_92 = ofs_84_86 + MPP_ARRAY_ELEMS(r->reserve_86_87);
//ofs_93_98 = ofs_87_92 + MPP_ARRAY_ELEMS(r->reserve_92_93);
#endif
#endif
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[24], reg[66 + ofs_9_64]); //0
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[25], reg[67 + ofs_9_64]); //1
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[26], reg[68 + ofs_9_64]); //2
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[27], reg[69 + ofs_9_64]); //3
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[28], reg[70 + ofs_9_64]); //4
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[29], reg[71 + ofs_9_64]); //5
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[30], reg[72 + ofs_9_64]); //6
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[31], reg[73 + ofs_9_64]); //7
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[32], reg[74 + ofs_9_64]); //8
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[33], reg[75 + ofs_9_64]); //9
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[34], reg[76 + ofs_9_64]); //10
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[35], reg[77 + ofs_9_64]); //11
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[36], reg[78 + ofs_9_64]); //12
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[37], reg[79 + ofs_9_64]); //13
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[38], reg[80 + ofs_9_64]); //14
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[40], reg[82 + ofs_9_64]); //15
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[39], reg[81 + ofs_9_64]); //16
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[3 ], reg[2 ]); //17
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[4 ], reg[3 ]); //18
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[5 ], reg[4 ]); //19
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[6 ], reg[5 ]); //20
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[7 ], reg[6 ]); //21
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[8 ], reg[7 ]); //22
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[9 ], reg[8 + ofs_9_64]); //23
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[10], reg[9 + ofs_9_64]); //24
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[11], reg[10 + ofs_9_64]); //25
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[12], reg[11 + ofs_9_64]); //26
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[13], reg[12 + ofs_9_64]); //27
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[14], reg[13 + ofs_9_64]); //28
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[15], reg[14 + ofs_9_64]); //29
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[16], reg[15 + ofs_9_64]); //30
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[17], reg[16 + ofs_9_64]); //31
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[18], reg[17 + ofs_9_64]); //32
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[19], reg[18 + ofs_9_64]); //33
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[20], reg[19 + ofs_9_64]); //34
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[23], reg[65 + ofs_9_64]); //35
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[41], reg[83 + ofs_9_64]); //36
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[42], reg[84 + ofs_9_64]); //37
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[43], reg[85 + ofs_9_64]); //38
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[44], reg[86 + ofs_9_64]); //39
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[45], reg[87 + ofs_9_64]); //40
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[46], reg[88 + ofs_9_64]); //41
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[47], reg[89 + ofs_9_64]); //42
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[48], reg[90 + ofs_9_64]); //43
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[49], reg[91 + ofs_9_64]); //44
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[50], reg[92 + ofs_9_64]); //45
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[51], reg[93 + ofs_9_64]); //46
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[52], reg[94 + ofs_9_64]); //47
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[53], reg[95 + ofs_9_64]); //48
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[54], reg[96 + ofs_9_64]); //49
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[55], reg[97 + ofs_9_64]); //50
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[56], reg[98 + ofs_9_64]); //51
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[57], reg[99 + ofs_9_64]); //52
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[58], reg[100 + ofs_9_64]); //53
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[59], reg[101 + ofs_9_64]); //54
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[60], reg[102 + ofs_9_64]); //55
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[61], reg[103 + ofs_9_64]); //56
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[62], reg[104 + ofs_9_64]); //57
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[63], reg[105 + ofs_9_64]); //58
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[64], reg[106 + ofs_9_64]); //59
for (k = 0; k < 5; k++)
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[21] + k * 4, reg[20 + k + ofs_9_64]); //60~64
for (k = 0; k < 40; k++)
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[22] + k * 4, reg[25 + k + ofs_9_64]); //65~104
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[65], reg[107 + ofs_65_66]); //105
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[66], reg[108 + ofs_65_66]); //106
for (k = 0; k < 8; k++)
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[67] + 4 * k, reg[109 + k + ofs_67_79]); //107~114
#if !RKV_H264E_REMOVE_UNNECESSARY_REGS
for (k = 0; k < 256; k++)
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[80] + 4 * k, reg[136 + k + ofs_80_83]); //115~370
#endif
fprintf(fp, "0x%08x 0x%08x,\n", reg_idx2addr_map[2], reg[1]); //371
(void)ofs_80_83;
fflush(fp);
} else {
mpp_log("try to dump data to mpp_reg_out.txt, but file is not opened");
}
}
static void dump_rkv_mpp_strm_out_header(h264e_control_extra_info *extra_info)
{
if (fp_mpp_strm_out) {
FILE *fp = fp_mpp_strm_out;
fwrite(extra_info->buf, 1, extra_info->size, fp);
fflush(fp);
} else {
mpp_log("try to dump strm header to mpp_strm_out.txt, but file is not opened");
}
}
static MPP_RET get_rkv_syntax_in(h264e_hal_rkv_dbg_info *info, h264e_syntax *syn,
#if 0
static MPP_RET get_rkv_dbg_info(h264e_hal_rkv_dbg_info *info, h264e_syntax *syn,
MppBuffer *hw_in_buf, MppBuffer *hw_output_strm_buf)
{
@@ -1216,7 +687,6 @@ static MPP_RET get_rkv_syntax_in(h264e_hal_rkv_dbg_info *info, h264e_syntax *syn
if (hw_output_strm_buf[buf_idx])
syn->output_strm_addr = mpp_buffer_get_fd(hw_output_strm_buf[buf_idx]);
syn->keyframe_max_interval = 4;
if (fp_golden_syntax_in) {
FILE *fp = fp_golden_syntax_in;
@@ -1454,6 +924,8 @@ static MPP_RET get_rkv_syntax_in(h264e_hal_rkv_dbg_info *info, h264e_syntax *syn
H264E_HAL_FSCAN(fp, "%x\n", info->swreg73_osd_indx_tab_i[k]);
H264E_HAL_FSCAN(fp, "%x\n", info->swreg77.bsbw_addr);
H264E_HAL_FSCAN(fp, "%x\n", syn->keyframe_max_interval);
fgets(temp, 512, fp);
@@ -1467,49 +939,72 @@ static MPP_RET get_rkv_syntax_in(h264e_hal_rkv_dbg_info *info, h264e_syntax *syn
syn->qp = info->swreg10.pic_qp;
syn->frame_num = info->swreg60.frm_num;
syn->input_image_format = info->swreg14.src_cfmt;
syn->transform8x8_mode = info->swreg59.trns_8x8;
syn->transform8x8_mode = info->swreg59.trns_8x8;
}
h264e_hal_debug_leave();
return MPP_OK;
}
#endif
static MPP_RET get_rkv_syntax_in( h264e_syntax *syn, MppBuffer *hw_in_buf, MppBuffer *hw_output_strm_buf)
static void dump_rkv_mpp_strm_out(MppBuffer *hw_buf, void *ioctl_output)
{
if (fp_mpp_strm_out) {
RK_U32 k = 0;
RK_U32 strm_size = 0;
RK_U8 *sw_buf = NULL;
RK_U8 *hw_buf_vir_addr = NULL;
h264e_rkv_ioctl_output *out = (h264e_rkv_ioctl_output *)ioctl_output;
h264e_rkv_ioctl_output_elem *out_elem = out->elem;
RK_U32 frame_num = out->frame_num;
//RK_S32 k = 0;
RK_U32 buf_idx = g_frame_read_cnt % RKV_H264E_LINKTABLE_FRAME_NUM;
h264e_hal_debug_enter();
mpp_assert(fp_golden_syntax_in);
memset(syn, 0, sizeof(h264e_syntax));
mpp_log("dump %d frames strm out below", frame_num);
for (k = 0; k < frame_num; k++) {
strm_size = (RK_U32)out_elem[k].swreg69.bs_lgth;
hw_buf_vir_addr = (RK_U8 *)mpp_buffer_get_ptr(hw_buf[k]);
sw_buf = mpp_malloc(RK_U8, strm_size);
mpp_log("dump frame %d strm_size: %d", k, strm_size);
memcpy(sw_buf, hw_buf_vir_addr, strm_size);
fwrite(sw_buf, 1, strm_size, fp_mpp_strm_out);
if (sw_buf)
mpp_free(sw_buf);
}
fflush(fp_mpp_strm_out);
(void)hw_buf;
} else {
mpp_log("try to dump data to mpp_strm_out.txt, but file is not opened");
if (hw_in_buf[buf_idx]) {
syn->input_luma_addr = mpp_buffer_get_fd(hw_in_buf[buf_idx]);
syn->input_cb_addr = syn->input_luma_addr; //NOTE: transfer offset in extra_info
syn->input_cr_addr = syn->input_luma_addr;
}
if (hw_output_strm_buf[buf_idx])
syn->output_strm_addr = mpp_buffer_get_fd(hw_output_strm_buf[buf_idx]);
syn->output_strm_limit_size = 1024 * 1024 * 2;
if (fp_golden_syntax_in) {
FILE *fp = fp_golden_syntax_in;
char temp[512] = {0};
RK_S32 data = 0;
if (!fgets(temp, 512, fp))
return MPP_EOS_STREAM_REACHED;
H264E_HAL_FSCAN(fp, "%d\n", syn->pic_luma_width);
H264E_HAL_FSCAN(fp, "%d\n", syn->pic_luma_height);
H264E_HAL_FSCAN(fp, "%d\n", syn->level_idc);
H264E_HAL_FSCAN(fp, "%d\n", syn->profile_idc);
H264E_HAL_FSCAN(fp, "%d\n", syn->frame_coding_type);
H264E_HAL_FSCAN(fp, "%d\n", syn->qp);
H264E_HAL_FSCAN(fp, "%d\n", syn->input_image_format);
H264E_HAL_FSCAN(fp, "%d\n", syn->enable_cabac);
H264E_HAL_FSCAN(fp, "%d\n", syn->pic_init_qp);
H264E_HAL_FSCAN(fp, "%d\n", syn->chroma_qp_index_offset);
H264E_HAL_FSCAN(fp, "%d\n", syn->second_chroma_qp_index_offset);
H264E_HAL_FSCAN(fp, "%d\n", syn->slice_type);
H264E_HAL_FSCAN(fp, "%d\n", syn->pps_id);
H264E_HAL_FSCAN(fp, "%d\n", syn->frame_num);
H264E_HAL_FSCAN(fp, "%d\n", syn->cabac_init_idc);
H264E_HAL_FSCAN(fp, "%d\n", syn->idr_pic_id);
H264E_HAL_FSCAN(fp, "%d\n", syn->pic_order_cnt_lsb);
H264E_HAL_FSCAN(fp, "%x\n", syn->keyframe_max_interval);
fgets(temp, 512, fp);
} else {
mpp_err("rkv_syntax_in.txt doesn't exits");
}
h264e_hal_debug_leave();
return MPP_OK;
}
static MPP_RET h264e_hal_test_parse_options(int arg_num, char **arg_str, h264e_hal_test_cfg *cfg)
@@ -1726,7 +1221,7 @@ MPP_RET h264e_hal_rkv_test()
HalTaskInfo task_info;
h264e_control_extra_info_cfg extra_info_cfg;
h264e_control_extra_info extra_info;
h264e_hal_rkv_dbg_info dbg_info;
//h264e_hal_rkv_dbg_info dbg_info;
h264e_syntax syntax_data[RKV_H264E_LINKTABLE_FRAME_NUM];
MppBufferGroup hw_input_buf_grp = NULL;
MppBufferGroup hw_output_buf_grp = NULL;
@@ -1735,15 +1230,24 @@ MPP_RET h264e_hal_rkv_test()
RK_U32 frame_luma_stride = 0;
struct timeval t0;
get_rkv_syntax_in(&dbg_info, &syntax_data[0], hw_input_buf_mul, hw_output_strm_buf_mul);
get_rkv_syntax_in(&syntax_data[0], hw_input_buf_mul, hw_output_strm_buf_mul);
fseek(fp_golden_syntax_in, 0L, SEEK_SET);
frame_luma_stride = ((syntax_data[0].pic_luma_width + 15) & (~15)) * ((syntax_data[0].pic_luma_height + 15) & (~15));
h264e_hal_test_init(&ctx, &task_info, syntax_data);
if (MPP_OK != mpp_buffer_group_get_internal(&hw_input_buf_grp, MPP_BUFFER_TYPE_ION)) {
mpp_err("hw_input_buf_grp get failed, test is ended early");
goto __test_end;
}
if (MPP_OK != mpp_buffer_group_get_internal(&hw_output_buf_grp, MPP_BUFFER_TYPE_ION)) {
mpp_err("hw_output_buf_grp get failed, test is ended early");
goto __test_end;
}
for (k = 0; k < RKV_H264E_LINKTABLE_FRAME_NUM; k++)
mpp_buffer_get(hw_input_buf_grp, &hw_input_buf_mul[k], frame_luma_stride * 3 / 2);
@@ -1759,7 +1263,6 @@ MPP_RET h264e_hal_rkv_test()
h264e_hal_set_extra_info_cfg(&extra_info_cfg, &syntax_data[0]); //TODO: use dbg info for input instead
hal_h264e_rkv_control(&ctx, MPP_ENC_SET_EXTRA_INFO, &extra_info_cfg);
hal_h264e_rkv_control(&ctx, MPP_ENC_GET_EXTRA_INFO, &extra_info);
dump_rkv_mpp_strm_out_header(&extra_info);
do {
/* get golden input */
@@ -1769,11 +1272,10 @@ MPP_RET h264e_hal_rkv_test()
mpp_log("read %d frames input", frame_num);
for (k = 0; k < frame_num; k++, g_frame_read_cnt++) {
syn = &syntax_data[g_frame_read_cnt % RKV_H264E_LINKTABLE_FRAME_NUM];
if (MPP_EOS_STREAM_REACHED == get_rkv_syntax_in(&dbg_info, syn, hw_input_buf_mul, hw_output_strm_buf_mul)) {
if (MPP_EOS_STREAM_REACHED == get_rkv_syntax_in(syn, hw_input_buf_mul, hw_output_strm_buf_mul)) {
mpp_log("syntax input file end, total %d frames are encoded, test is ended", g_frame_cnt);
goto __test_end;
}
dump_rkv_mpp_syntax_in(&dbg_info, syn);
ret = get_rkv_h264e_yuv_in_frame(syn, hw_input_buf_mul);
if (ret == MPP_EOS_STREAM_REACHED) {
mpp_log("yuv file end, total %d frames are encoded, test is ended", g_frame_cnt);
@@ -1790,8 +1292,6 @@ MPP_RET h264e_hal_rkv_test()
/* generate registers */
hal_h264e_gen_regs(&ctx, &task_info);
dump_rkv_mpp_reg_in(&ctx);
dump_rkv_mpp_wr2hw_reg_in(ctx.regs);
/* run hardware */
gettimeofday(&t0, NULL);
@@ -1800,13 +1300,10 @@ MPP_RET h264e_hal_rkv_test()
hal_h264e_start(&ctx, &task_info);
hal_h264e_wait(&ctx, &task_info);
dump_rkv_mpp_reg_out(ctx.regs);
dump_rkv_mpp_feedback(&ctx.feedback);
g_frame_cnt ++;
if (g_frame_cnt == g_frame_read_cnt)
dump_rkv_mpp_strm_out(hw_output_strm_buf_mul, ctx.ioctl_output);
hal_h264e_rkv_dump_mpp_strm_out(&ctx, hw_output_strm_buf_mul);
} while (1);
@@ -1836,7 +1333,7 @@ int main(int argc, char **argv)
h264e_hal_test_cfg test_cfg;
mpp_log("******* h264e hal test start *******");
if (MPP_OK != h264e_hal_test_parse_options(argc, argv, &test_cfg)) {
mpp_err("parse opitons failed, test is ended early");
goto __test_end;