mirror of
https://github.com/bolucat/Archive.git
synced 2025-10-26 17:50:48 +08:00
Update On Thu Jul 4 20:30:58 CEST 2024
This commit is contained in:
github-action[bot]
1
.github/update.log
vendored
1
.github/update.log
vendored
@@ -692,3 +692,4 @@ Update On Sun Jun 30 20:30:33 CEST 2024
|
||||
Update On Mon Jul 1 20:30:34 CEST 2024
|
||||
Update On Tue Jul 2 20:34:08 CEST 2024
|
||||
Update On Wed Jul 3 20:29:03 CEST 2024
|
||||
Update On Thu Jul 4 20:30:48 CEST 2024
|
||||
|
||||
@@ -40,7 +40,7 @@
|
||||
"react-hook-form-mui": "7.0.1",
|
||||
"react-i18next": "14.1.2",
|
||||
"react-markdown": "9.0.1",
|
||||
"react-router-dom": "6.24.0",
|
||||
"react-router-dom": "6.24.1",
|
||||
"react-transition-group": "4.4.5",
|
||||
"react-virtuoso": "4.7.10",
|
||||
"swr": "2.2.5",
|
||||
|
||||
@@ -90,14 +90,14 @@
|
||||
"eslint-plugin-promise": "6.4.0",
|
||||
"eslint-plugin-react": "7.34.3",
|
||||
"lint-staged": "15.2.7",
|
||||
"npm-run-all2": "6.2.0",
|
||||
"npm-run-all2": "6.2.2",
|
||||
"postcss": "8.4.39",
|
||||
"postcss-html": "1.7.0",
|
||||
"postcss-import": "16.1.0",
|
||||
"postcss-scss": "4.0.9",
|
||||
"prettier": "3.3.2",
|
||||
"prettier-plugin-toml": "2.0.1",
|
||||
"react-devtools": "5.3.0",
|
||||
"react-devtools": "5.3.1",
|
||||
"stylelint": "16.6.1",
|
||||
"stylelint-config-html": "1.1.0",
|
||||
"stylelint-config-recess-order": "5.0.1",
|
||||
|
||||
64
clash-nyanpasu/pnpm-lock.yaml
generated
64
clash-nyanpasu/pnpm-lock.yaml
generated
@@ -86,8 +86,8 @@ importers:
|
||||
specifier: 15.2.7
|
||||
version: 15.2.7
|
||||
npm-run-all2:
|
||||
specifier: 6.2.0
|
||||
version: 6.2.0
|
||||
specifier: 6.2.2
|
||||
version: 6.2.2
|
||||
postcss:
|
||||
specifier: 8.4.39
|
||||
version: 8.4.39
|
||||
@@ -107,8 +107,8 @@ importers:
|
||||
specifier: 2.0.1
|
||||
version: 2.0.1(prettier@3.3.2)
|
||||
react-devtools:
|
||||
specifier: 5.3.0
|
||||
version: 5.3.0(bufferutil@4.0.8)(utf-8-validate@5.0.10)
|
||||
specifier: 5.3.1
|
||||
version: 5.3.1(bufferutil@4.0.8)(utf-8-validate@5.0.10)
|
||||
stylelint:
|
||||
specifier: 16.6.1
|
||||
version: 16.6.1(typescript@5.5.3)
|
||||
@@ -178,7 +178,7 @@ importers:
|
||||
version: 11.11.5(@emotion/react@11.11.4(react@19.0.0-rc-fb9a90fa48-20240614)(types-react@19.0.0-rc.1))(react@19.0.0-rc-fb9a90fa48-20240614)(types-react@19.0.0-rc.1)
|
||||
'@generouted/react-router':
|
||||
specifier: 1.19.5
|
||||
version: 1.19.5(react-router-dom@6.24.0(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614)(vite@5.3.3(@types/node@20.14.9)(less@4.2.0)(sass@1.77.6)(stylus@0.62.0))
|
||||
version: 1.19.5(react-router-dom@6.24.1(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614)(vite@5.3.3(@types/node@20.14.9)(less@4.2.0)(sass@1.77.6)(stylus@0.62.0))
|
||||
'@juggle/resize-observer':
|
||||
specifier: 3.4.0
|
||||
version: 3.4.0
|
||||
@@ -258,8 +258,8 @@ importers:
|
||||
specifier: 9.0.1
|
||||
version: 9.0.1(react@19.0.0-rc-fb9a90fa48-20240614)(types-react@19.0.0-rc.1)
|
||||
react-router-dom:
|
||||
specifier: 6.24.0
|
||||
version: 6.24.0(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614)
|
||||
specifier: 6.24.1
|
||||
version: 6.24.1(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614)
|
||||
react-transition-group:
|
||||
specifier: 4.4.5
|
||||
version: 4.4.5(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614)
|
||||
@@ -1442,8 +1442,8 @@ packages:
|
||||
'@popperjs/core@2.11.8':
|
||||
resolution: {integrity: sha512-P1st0aksCrn9sGZhp8GMYwBnQsbvAWsZAX44oXNNvLHGqAOcoVxmjZiohstwQ7SqKnbR47akdNi+uleWD8+g6A==}
|
||||
|
||||
'@remix-run/router@1.17.0':
|
||||
resolution: {integrity: sha512-2D6XaHEVvkCn682XBnipbJjgZUU7xjLtA4dGJRBVUKpEaDYOZMENZoZjAOSb7qirxt5RupjzZxz4fK2FO+EFPw==}
|
||||
'@remix-run/router@1.17.1':
|
||||
resolution: {integrity: sha512-mCOMec4BKd6BRGBZeSnGiIgwsbLGp3yhVqAD8H+PxiRNEHgDpZb8J1TnrSDlg97t0ySKMQJTHCWBCmBpSmkF6Q==}
|
||||
engines: {node: '>=14.0.0'}
|
||||
|
||||
'@rollup/pluginutils@5.1.0':
|
||||
@@ -4281,9 +4281,9 @@ packages:
|
||||
resolution: {integrity: sha512-dMxCf+zZ+3zeQZXKxmyuCKlIDPGuv8EF940xbkC4kQVDTtqoh6rJFO+JTKSA6/Rwi0getWmtuy4Itup0AMcaDQ==}
|
||||
engines: {node: ^14.17.0 || ^16.13.0 || >=18.0.0}
|
||||
|
||||
npm-run-all2@6.2.0:
|
||||
resolution: {integrity: sha512-wA7yVIkthe6qJBfiJ2g6aweaaRlw72itsFGF6HuwCHKwtwAx/4BY1vVpk6bw6lS8RLMsexoasOkd0aYOmsFG7Q==}
|
||||
engines: {node: ^14.18.0 || >=16.0.0, npm: '>= 8'}
|
||||
npm-run-all2@6.2.2:
|
||||
resolution: {integrity: sha512-Q+alQAGIW7ZhKcxLt8GcSi3h3ryheD6xnmXahkMRVM5LYmajcUrSITm8h+OPC9RYWMV2GR0Q1ntTUCfxaNoOJw==}
|
||||
engines: {node: ^14.18.0 || ^16.13.0 || >=18.0.0, npm: '>= 8'}
|
||||
hasBin: true
|
||||
|
||||
npm-run-path@2.0.2:
|
||||
@@ -4709,11 +4709,11 @@ packages:
|
||||
resolution: {integrity: sha512-y3bGgqKj3QBdxLbLkomlohkvsA8gdAiUQlSBJnBhfn+BPxg4bc62d8TcBW15wavDfgexCgccckhcZvywyQYPOw==}
|
||||
hasBin: true
|
||||
|
||||
react-devtools-core@5.3.0:
|
||||
resolution: {integrity: sha512-IG3T+azv48Oc5VLdHR4XdBNKNZIUOKRtx0sJMRvb++Zom/uqtx73j6u37JCsIBNIaq6vA7RPH5Bbcf/Wj53KXA==}
|
||||
react-devtools-core@5.3.1:
|
||||
resolution: {integrity: sha512-7FSb9meX0btdBQLwdFOwt6bGqvRPabmVMMslv8fgoSPqXyuGpgQe36kx8gR86XPw7aV1yVouTp6fyZ0EH+NfUw==}
|
||||
|
||||
react-devtools@5.3.0:
|
||||
resolution: {integrity: sha512-m7M+bBKlFM/dPfdHkM0Rcp0cqu8GrFDs3OPYq3nZ6OcWIfvQxrtPP/JayzVuf3KoPt5r/fA50F1HChEbikDKyQ==}
|
||||
react-devtools@5.3.1:
|
||||
resolution: {integrity: sha512-RcSV/u+lPChcTB+A4fij0xkE204yzKdAsGUFy6+DrfUzWSawB+cu0n3WLmJcJXQ/VnmjSUlIrqmVLicRhT/gLA==}
|
||||
hasBin: true
|
||||
|
||||
react-dom@19.0.0-rc-fb9a90fa48-20240614:
|
||||
@@ -4791,15 +4791,15 @@ packages:
|
||||
react: npm:react@rc
|
||||
react-dom: npm:react-dom@rc
|
||||
|
||||
react-router-dom@6.24.0:
|
||||
resolution: {integrity: sha512-960sKuau6/yEwS8e+NVEidYQb1hNjAYM327gjEyXlc6r3Skf2vtwuJ2l7lssdegD2YjoKG5l8MsVyeTDlVeY8g==}
|
||||
react-router-dom@6.24.1:
|
||||
resolution: {integrity: sha512-U19KtXqooqw967Vw0Qcn5cOvrX5Ejo9ORmOtJMzYWtCT4/WOfFLIZGGsVLxcd9UkBO0mSTZtXqhZBsWlHr7+Sg==}
|
||||
engines: {node: '>=14.0.0'}
|
||||
peerDependencies:
|
||||
react: npm:react@rc
|
||||
react-dom: npm:react-dom@rc
|
||||
|
||||
react-router@6.24.0:
|
||||
resolution: {integrity: sha512-sQrgJ5bXk7vbcC4BxQxeNa5UmboFm35we1AFK0VvQaz9g0LzxEIuLOhHIoZ8rnu9BO21ishGeL9no1WB76W/eg==}
|
||||
react-router@6.24.1:
|
||||
resolution: {integrity: sha512-PTXFXGK2pyXpHzVo3rR9H7ip4lSPZZc0bHG5CARmj65fTT6qG7sTngmb6lcYu1gf3y/8KxORoy9yn59pGpCnpg==}
|
||||
engines: {node: '>=14.0.0'}
|
||||
peerDependencies:
|
||||
react: npm:react@rc
|
||||
@@ -6338,12 +6338,12 @@ snapshots:
|
||||
postcss: 7.0.32
|
||||
purgecss: 2.3.0
|
||||
|
||||
'@generouted/react-router@1.19.5(react-router-dom@6.24.0(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614)(vite@5.3.3(@types/node@20.14.9)(less@4.2.0)(sass@1.77.6)(stylus@0.62.0))':
|
||||
'@generouted/react-router@1.19.5(react-router-dom@6.24.1(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614)(vite@5.3.3(@types/node@20.14.9)(less@4.2.0)(sass@1.77.6)(stylus@0.62.0))':
|
||||
dependencies:
|
||||
fast-glob: 3.3.2
|
||||
generouted: 1.19.5(vite@5.3.3(@types/node@20.14.9)(less@4.2.0)(sass@1.77.6)(stylus@0.62.0))
|
||||
react: 19.0.0-rc-fb9a90fa48-20240614
|
||||
react-router-dom: 6.24.0(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614)
|
||||
react-router-dom: 6.24.1(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614)
|
||||
vite: 5.3.3(@types/node@20.14.9)(less@4.2.0)(sass@1.77.6)(stylus@0.62.0)
|
||||
|
||||
'@humanwhocodes/config-array@0.11.14':
|
||||
@@ -6769,7 +6769,7 @@ snapshots:
|
||||
|
||||
'@popperjs/core@2.11.8': {}
|
||||
|
||||
'@remix-run/router@1.17.0': {}
|
||||
'@remix-run/router@1.17.1': {}
|
||||
|
||||
'@rollup/pluginutils@5.1.0(rollup@4.17.2)':
|
||||
dependencies:
|
||||
@@ -9911,7 +9911,7 @@ snapshots:
|
||||
|
||||
npm-normalize-package-bin@3.0.1: {}
|
||||
|
||||
npm-run-all2@6.2.0:
|
||||
npm-run-all2@6.2.2:
|
||||
dependencies:
|
||||
ansi-styles: 6.2.1
|
||||
cross-spawn: 7.0.3
|
||||
@@ -10330,7 +10330,7 @@ snapshots:
|
||||
minimist: 1.2.8
|
||||
strip-json-comments: 2.0.1
|
||||
|
||||
react-devtools-core@5.3.0(bufferutil@4.0.8)(utf-8-validate@5.0.10):
|
||||
react-devtools-core@5.3.1(bufferutil@4.0.8)(utf-8-validate@5.0.10):
|
||||
dependencies:
|
||||
shell-quote: 1.8.1
|
||||
ws: 7.5.9(bufferutil@4.0.8)(utf-8-validate@5.0.10)
|
||||
@@ -10338,13 +10338,13 @@ snapshots:
|
||||
- bufferutil
|
||||
- utf-8-validate
|
||||
|
||||
react-devtools@5.3.0(bufferutil@4.0.8)(utf-8-validate@5.0.10):
|
||||
react-devtools@5.3.1(bufferutil@4.0.8)(utf-8-validate@5.0.10):
|
||||
dependencies:
|
||||
cross-spawn: 5.1.0
|
||||
electron: 23.3.13
|
||||
internal-ip: 6.2.0
|
||||
minimist: 1.2.8
|
||||
react-devtools-core: 5.3.0(bufferutil@4.0.8)(utf-8-validate@5.0.10)
|
||||
react-devtools-core: 5.3.1(bufferutil@4.0.8)(utf-8-validate@5.0.10)
|
||||
update-notifier: 2.5.0
|
||||
transitivePeerDependencies:
|
||||
- bufferutil
|
||||
@@ -10417,16 +10417,16 @@ snapshots:
|
||||
react: 19.0.0-rc-fb9a90fa48-20240614
|
||||
react-dom: 19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614)
|
||||
|
||||
react-router-dom@6.24.0(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614):
|
||||
react-router-dom@6.24.1(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614):
|
||||
dependencies:
|
||||
'@remix-run/router': 1.17.0
|
||||
'@remix-run/router': 1.17.1
|
||||
react: 19.0.0-rc-fb9a90fa48-20240614
|
||||
react-dom: 19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614)
|
||||
react-router: 6.24.0(react@19.0.0-rc-fb9a90fa48-20240614)
|
||||
react-router: 6.24.1(react@19.0.0-rc-fb9a90fa48-20240614)
|
||||
|
||||
react-router@6.24.0(react@19.0.0-rc-fb9a90fa48-20240614):
|
||||
react-router@6.24.1(react@19.0.0-rc-fb9a90fa48-20240614):
|
||||
dependencies:
|
||||
'@remix-run/router': 1.17.0
|
||||
'@remix-run/router': 1.17.1
|
||||
react: 19.0.0-rc-fb9a90fa48-20240614
|
||||
|
||||
react-transition-group@4.4.5(react-dom@19.0.0-rc-fb9a90fa48-20240614(react@19.0.0-rc-fb9a90fa48-20240614))(react@19.0.0-rc-fb9a90fa48-20240614):
|
||||
|
||||
@@ -400,16 +400,6 @@ const resolveUninstall = () => {
|
||||
});
|
||||
};
|
||||
|
||||
const resolveSetDnsScript = () =>
|
||||
resolveResource({
|
||||
file: "set_dns.sh",
|
||||
downloadURL: `https://github.com/clash-verge-rev/set-dns-script/releases/download/script/set_dns.sh`,
|
||||
});
|
||||
const resolveUnSetDnsScript = () =>
|
||||
resolveResource({
|
||||
file: "unset_dns.sh",
|
||||
downloadURL: `https://github.com/clash-verge-rev/set-dns-script/releases/download/script/unset_dns.sh`,
|
||||
});
|
||||
const resolveMmdb = () =>
|
||||
resolveResource({
|
||||
file: "Country.mmdb",
|
||||
@@ -449,8 +439,6 @@ const tasks = [
|
||||
{ name: "service", func: resolveService, retry: 5 },
|
||||
{ name: "install", func: resolveInstall, retry: 5 },
|
||||
{ name: "uninstall", func: resolveUninstall, retry: 5 },
|
||||
{ name: "set_dns_script", func: resolveSetDnsScript, retry: 5 },
|
||||
{ name: "unset_dns_script", func: resolveUnSetDnsScript, retry: 5 },
|
||||
{ name: "mmdb", func: resolveMmdb, retry: 5 },
|
||||
{ name: "geosite", func: resolveGeosite, retry: 5 },
|
||||
{ name: "geoip", func: resolveGeoIP, retry: 5 },
|
||||
|
||||
@@ -227,16 +227,16 @@ impl IVerge {
|
||||
#[cfg(not(target_os = "windows"))]
|
||||
verge_redir_port: Some(7895),
|
||||
#[cfg(not(target_os = "windows"))]
|
||||
verge_redir_enabled: Some(true),
|
||||
verge_redir_enabled: Some(false),
|
||||
#[cfg(target_os = "linux")]
|
||||
verge_tproxy_port: Some(7896),
|
||||
#[cfg(target_os = "linux")]
|
||||
verge_tproxy_enabled: Some(true),
|
||||
verge_tproxy_enabled: Some(false),
|
||||
verge_mixed_port: Some(7897),
|
||||
verge_socks_port: Some(7898),
|
||||
verge_socks_enabled: Some(true),
|
||||
verge_socks_enabled: Some(false),
|
||||
verge_port: Some(7899),
|
||||
verge_http_enabled: Some(true),
|
||||
verge_http_enabled: Some(false),
|
||||
enable_proxy_guard: Some(false),
|
||||
use_default_bypass: Some(true),
|
||||
proxy_guard_duration: Some(30),
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
function main(config) {
|
||||
function main(config, _name) {
|
||||
if (config.mode === "script") {
|
||||
config.mode = "rule";
|
||||
}
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
function main(config) {
|
||||
function main(config, _name) {
|
||||
if (Array.isArray(config.proxies)) {
|
||||
config.proxies.forEach((p, i) => {
|
||||
if (p.type === "hysteria" && typeof p.alpn === "string") {
|
||||
|
||||
@@ -32,21 +32,21 @@ pub async fn enhance() -> (Mapping, Vec<String>, HashMap<String, ResultLog>) {
|
||||
verge.clash_core.clone(),
|
||||
verge.enable_tun_mode.unwrap_or(false),
|
||||
verge.enable_builtin_enhanced.unwrap_or(true),
|
||||
verge.verge_socks_enabled.unwrap_or(true),
|
||||
verge.verge_http_enabled.unwrap_or(true),
|
||||
verge.verge_socks_enabled.unwrap_or(false),
|
||||
verge.verge_http_enabled.unwrap_or(false),
|
||||
)
|
||||
};
|
||||
#[cfg(not(target_os = "windows"))]
|
||||
let redir_enabled = {
|
||||
let verge = Config::verge();
|
||||
let verge = verge.latest();
|
||||
verge.verge_redir_enabled.unwrap_or(true)
|
||||
verge.verge_redir_enabled.unwrap_or(false)
|
||||
};
|
||||
#[cfg(target_os = "linux")]
|
||||
let tproxy_enabled = {
|
||||
let verge = Config::verge();
|
||||
let verge = verge.latest();
|
||||
verge.verge_tproxy_enabled.unwrap_or(true)
|
||||
verge.verge_tproxy_enabled.unwrap_or(false)
|
||||
};
|
||||
|
||||
// 从profiles里拿东西
|
||||
@@ -59,6 +59,7 @@ pub async fn enhance() -> (Mapping, Vec<String>, HashMap<String, ResultLog>) {
|
||||
groups_item,
|
||||
global_merge,
|
||||
global_script,
|
||||
profile_name,
|
||||
) = {
|
||||
let profiles = Config::profiles();
|
||||
let profiles = profiles.latest();
|
||||
@@ -123,6 +124,12 @@ pub async fn enhance() -> (Mapping, Vec<String>, HashMap<String, ResultLog>) {
|
||||
data: ChainType::Script(tmpl::ITEM_SCRIPT.into()),
|
||||
});
|
||||
|
||||
let name = profiles
|
||||
.get_item(&profiles.get_current().unwrap_or_default())
|
||||
.ok()
|
||||
.and_then(|item| item.name.clone())
|
||||
.unwrap_or_default();
|
||||
|
||||
(
|
||||
current,
|
||||
merge,
|
||||
@@ -132,6 +139,7 @@ pub async fn enhance() -> (Mapping, Vec<String>, HashMap<String, ResultLog>) {
|
||||
groups,
|
||||
global_merge,
|
||||
global_script,
|
||||
name,
|
||||
)
|
||||
};
|
||||
|
||||
@@ -147,7 +155,7 @@ pub async fn enhance() -> (Mapping, Vec<String>, HashMap<String, ResultLog>) {
|
||||
if let ChainType::Script(script) = global_script.data {
|
||||
let mut logs = vec![];
|
||||
|
||||
match use_script(script, config.to_owned()) {
|
||||
match use_script(script, config.to_owned(), profile_name.to_owned()) {
|
||||
Ok((res_config, res_logs)) => {
|
||||
exists_keys.extend(use_keys(&res_config));
|
||||
config = res_config;
|
||||
@@ -180,7 +188,7 @@ pub async fn enhance() -> (Mapping, Vec<String>, HashMap<String, ResultLog>) {
|
||||
if let ChainType::Script(script) = script_item.data {
|
||||
let mut logs = vec![];
|
||||
|
||||
match use_script(script, config.to_owned()) {
|
||||
match use_script(script, config.to_owned(), profile_name.to_owned()) {
|
||||
Ok((res_config, res_logs)) => {
|
||||
exists_keys.extend(use_keys(&res_config));
|
||||
config = res_config;
|
||||
@@ -239,7 +247,7 @@ pub async fn enhance() -> (Mapping, Vec<String>, HashMap<String, ResultLog>) {
|
||||
.for_each(|item| {
|
||||
log::debug!(target: "app", "run builtin script {}", item.uid);
|
||||
if let ChainType::Script(script) = item.data {
|
||||
match use_script(script, config.to_owned()) {
|
||||
match use_script(script, config.to_owned(), "".to_string()) {
|
||||
Ok((res_config, _)) => {
|
||||
config = res_config;
|
||||
}
|
||||
|
||||
@@ -2,7 +2,11 @@ use super::use_lowercase;
|
||||
use anyhow::{Error, Result};
|
||||
use serde_yaml::Mapping;
|
||||
|
||||
pub fn use_script(script: String, config: Mapping) -> Result<(Mapping, Vec<(String, String)>)> {
|
||||
pub fn use_script(
|
||||
script: String,
|
||||
config: Mapping,
|
||||
name: String,
|
||||
) -> Result<(Mapping, Vec<(String, String)>)> {
|
||||
use boa_engine::{native_function::NativeFunction, Context, JsValue, Source};
|
||||
use std::sync::{Arc, Mutex};
|
||||
let mut context = Context::default();
|
||||
@@ -42,7 +46,7 @@ pub fn use_script(script: String, config: Mapping) -> Result<(Mapping, Vec<(Stri
|
||||
let code = format!(
|
||||
r#"try{{
|
||||
{script};
|
||||
JSON.stringify(main({config_str})||'')
|
||||
JSON.stringify(main({config_str},'{name}')||'')
|
||||
}} catch(err) {{
|
||||
`__error_flag__ ${{err.toString()}}`
|
||||
}}"#
|
||||
@@ -97,7 +101,7 @@ fn test_script() {
|
||||
"#;
|
||||
|
||||
let config = serde_yaml::from_str(config).unwrap();
|
||||
let (config, results) = use_script(script.into(), config).unwrap();
|
||||
let (config, results) = use_script(script.into(), config, "".to_string()).unwrap();
|
||||
|
||||
let config_str = serde_yaml::to_string(&config).unwrap();
|
||||
|
||||
|
||||
@@ -16,14 +16,7 @@ pub fn use_seq(seq_map: SeqMap, config: Mapping, name: &str) -> Mapping {
|
||||
val.as_sequence().unwrap_or(&Sequence::default()).clone()
|
||||
});
|
||||
let mut seq = origin_seq.clone();
|
||||
prepend.reverse();
|
||||
for item in prepend {
|
||||
seq.insert(0, item);
|
||||
}
|
||||
|
||||
for item in append {
|
||||
seq.push(item);
|
||||
}
|
||||
let mut delete_names = Vec::new();
|
||||
for item in delete {
|
||||
let item = item.clone();
|
||||
@@ -47,6 +40,15 @@ pub fn use_seq(seq_map: SeqMap, config: Mapping, name: &str) -> Mapping {
|
||||
}
|
||||
});
|
||||
|
||||
prepend.reverse();
|
||||
for item in prepend {
|
||||
seq.insert(0, item);
|
||||
}
|
||||
|
||||
for item in append {
|
||||
seq.push(item);
|
||||
}
|
||||
|
||||
let mut config = config.clone();
|
||||
config.insert(Value::from(name), Value::from(seq));
|
||||
return config;
|
||||
|
||||
@@ -27,7 +27,7 @@ pub const ITEM_MERGE_EMPTY: &str = "# Profile Enhancement Merge Template for Cla
|
||||
/// enhanced profile
|
||||
pub const ITEM_SCRIPT: &str = "// Define main function (script entry)
|
||||
|
||||
function main(config) {
|
||||
function main(config, profileName) {
|
||||
return config;
|
||||
}
|
||||
";
|
||||
|
||||
163
clash-verge-rev/src/components/profile/group-item.tsx
Normal file
163
clash-verge-rev/src/components/profile/group-item.tsx
Normal file
@@ -0,0 +1,163 @@
|
||||
import {
|
||||
Box,
|
||||
IconButton,
|
||||
ListItem,
|
||||
ListItemText,
|
||||
alpha,
|
||||
styled,
|
||||
} from "@mui/material";
|
||||
import { DeleteForeverRounded, UndoRounded } from "@mui/icons-material";
|
||||
import { useSortable } from "@dnd-kit/sortable";
|
||||
import { CSS } from "@dnd-kit/utilities";
|
||||
import { downloadIconCache } from "@/services/cmds";
|
||||
import { convertFileSrc } from "@tauri-apps/api/tauri";
|
||||
import { useEffect, useState } from "react";
|
||||
interface Props {
|
||||
type: "prepend" | "original" | "delete" | "append";
|
||||
group: IProxyGroupConfig;
|
||||
onDelete: () => void;
|
||||
}
|
||||
|
||||
export const GroupItem = (props: Props) => {
|
||||
let { type, group, onDelete } = props;
|
||||
const sortable = type === "prepend" || type === "append";
|
||||
|
||||
const { attributes, listeners, setNodeRef, transform, transition } = sortable
|
||||
? useSortable({ id: group.name })
|
||||
: {
|
||||
attributes: {},
|
||||
listeners: {},
|
||||
setNodeRef: null,
|
||||
transform: null,
|
||||
transition: null,
|
||||
};
|
||||
|
||||
const [iconCachePath, setIconCachePath] = useState("");
|
||||
|
||||
useEffect(() => {
|
||||
initIconCachePath();
|
||||
}, [group]);
|
||||
|
||||
async function initIconCachePath() {
|
||||
if (group.icon && group.icon.trim().startsWith("http")) {
|
||||
const fileName =
|
||||
group.name.replaceAll(" ", "") + "-" + getFileName(group.icon);
|
||||
const iconPath = await downloadIconCache(group.icon, fileName);
|
||||
setIconCachePath(convertFileSrc(iconPath));
|
||||
}
|
||||
}
|
||||
|
||||
function getFileName(url: string) {
|
||||
return url.substring(url.lastIndexOf("/") + 1);
|
||||
}
|
||||
|
||||
return (
|
||||
<ListItem
|
||||
dense
|
||||
sx={({ palette }) => ({
|
||||
background:
|
||||
type === "original"
|
||||
? palette.mode === "dark"
|
||||
? alpha(palette.background.paper, 0.3)
|
||||
: alpha(palette.grey[400], 0.3)
|
||||
: type === "delete"
|
||||
? alpha(palette.error.main, 0.3)
|
||||
: alpha(palette.success.main, 0.3),
|
||||
height: "100%",
|
||||
margin: "8px 0",
|
||||
borderRadius: "8px",
|
||||
transform: CSS.Transform.toString(transform),
|
||||
transition,
|
||||
})}
|
||||
>
|
||||
{group.icon && group.icon?.trim().startsWith("http") && (
|
||||
<img
|
||||
src={iconCachePath === "" ? group.icon : iconCachePath}
|
||||
width="32px"
|
||||
style={{
|
||||
marginRight: "12px",
|
||||
borderRadius: "6px",
|
||||
}}
|
||||
/>
|
||||
)}
|
||||
{group.icon && group.icon?.trim().startsWith("data") && (
|
||||
<img
|
||||
src={group.icon}
|
||||
width="32px"
|
||||
style={{
|
||||
marginRight: "12px",
|
||||
borderRadius: "6px",
|
||||
}}
|
||||
/>
|
||||
)}
|
||||
{group.icon && group.icon?.trim().startsWith("<svg") && (
|
||||
<img
|
||||
src={`data:image/svg+xml;base64,${btoa(group.icon ?? "")}`}
|
||||
width="32px"
|
||||
/>
|
||||
)}
|
||||
<ListItemText
|
||||
{...attributes}
|
||||
{...listeners}
|
||||
ref={setNodeRef}
|
||||
sx={{ cursor: sortable ? "move" : "" }}
|
||||
primary={
|
||||
<StyledPrimary
|
||||
sx={{ textDecoration: type === "delete" ? "line-through" : "" }}
|
||||
>
|
||||
{group.name}
|
||||
</StyledPrimary>
|
||||
}
|
||||
secondary={
|
||||
<ListItemTextChild
|
||||
sx={{
|
||||
overflow: "hidden",
|
||||
display: "flex",
|
||||
alignItems: "center",
|
||||
pt: "2px",
|
||||
}}
|
||||
>
|
||||
<Box sx={{ marginTop: "2px" }}>
|
||||
<StyledTypeBox>{group.type}</StyledTypeBox>
|
||||
</Box>
|
||||
</ListItemTextChild>
|
||||
}
|
||||
secondaryTypographyProps={{
|
||||
sx: {
|
||||
display: "flex",
|
||||
alignItems: "center",
|
||||
color: "#ccc",
|
||||
},
|
||||
}}
|
||||
/>
|
||||
<IconButton onClick={onDelete}>
|
||||
{type === "delete" ? <UndoRounded /> : <DeleteForeverRounded />}
|
||||
</IconButton>
|
||||
</ListItem>
|
||||
);
|
||||
};
|
||||
|
||||
const StyledPrimary = styled("span")`
|
||||
font-size: 15px;
|
||||
font-weight: 700;
|
||||
line-height: 1.5;
|
||||
overflow: hidden;
|
||||
text-overflow: ellipsis;
|
||||
white-space: nowrap;
|
||||
`;
|
||||
|
||||
const ListItemTextChild = styled("span")`
|
||||
display: block;
|
||||
`;
|
||||
|
||||
const StyledTypeBox = styled(ListItemTextChild)(({ theme }) => ({
|
||||
display: "inline-block",
|
||||
border: "1px solid #ccc",
|
||||
borderColor: alpha(theme.palette.primary.main, 0.5),
|
||||
color: alpha(theme.palette.primary.main, 0.8),
|
||||
borderRadius: 4,
|
||||
fontSize: 10,
|
||||
padding: "0 4px",
|
||||
lineHeight: 1.5,
|
||||
marginRight: "8px",
|
||||
}));
|
||||
829
clash-verge-rev/src/components/profile/groups-editor-viewer.tsx
Normal file
829
clash-verge-rev/src/components/profile/groups-editor-viewer.tsx
Normal file
@@ -0,0 +1,829 @@
|
||||
import { ReactNode, useEffect, useMemo, useState } from "react";
|
||||
import { useLockFn } from "ahooks";
|
||||
import yaml from "js-yaml";
|
||||
import { useTranslation } from "react-i18next";
|
||||
import {
|
||||
DndContext,
|
||||
closestCenter,
|
||||
KeyboardSensor,
|
||||
PointerSensor,
|
||||
useSensor,
|
||||
useSensors,
|
||||
DragEndEvent,
|
||||
} from "@dnd-kit/core";
|
||||
import {
|
||||
SortableContext,
|
||||
sortableKeyboardCoordinates,
|
||||
} from "@dnd-kit/sortable";
|
||||
import {
|
||||
Autocomplete,
|
||||
Box,
|
||||
Button,
|
||||
Dialog,
|
||||
DialogActions,
|
||||
DialogContent,
|
||||
DialogTitle,
|
||||
List,
|
||||
ListItem,
|
||||
ListItemText,
|
||||
TextField,
|
||||
styled,
|
||||
} from "@mui/material";
|
||||
import { GroupItem } from "@/components/profile/group-item";
|
||||
import { readProfileFile, saveProfileFile } from "@/services/cmds";
|
||||
import { Notice, Switch } from "@/components/base";
|
||||
import getSystem from "@/utils/get-system";
|
||||
import { BaseSearchBox } from "../base/base-search-box";
|
||||
import { Virtuoso } from "react-virtuoso";
|
||||
import MonacoEditor from "react-monaco-editor";
|
||||
import { useThemeMode } from "@/services/states";
|
||||
import { Controller, useForm } from "react-hook-form";
|
||||
|
||||
interface Props {
|
||||
proxiesUid: string;
|
||||
mergeUid: string;
|
||||
profileUid: string;
|
||||
property: string;
|
||||
open: boolean;
|
||||
onClose: () => void;
|
||||
onSave?: (prev?: string, curr?: string) => void;
|
||||
}
|
||||
|
||||
const builtinProxyPolicies = ["DIRECT", "REJECT", "REJECT-DROP", "PASS"];
|
||||
|
||||
export const GroupsEditorViewer = (props: Props) => {
|
||||
const { mergeUid, proxiesUid, profileUid, property, open, onClose, onSave } =
|
||||
props;
|
||||
const { t } = useTranslation();
|
||||
const themeMode = useThemeMode();
|
||||
const [prevData, setPrevData] = useState("");
|
||||
const [currData, setCurrData] = useState("");
|
||||
const [visualization, setVisualization] = useState(true);
|
||||
const [match, setMatch] = useState(() => (_: string) => true);
|
||||
|
||||
const { control, watch, register, ...formIns } = useForm<IProxyGroupConfig>({
|
||||
defaultValues: {
|
||||
type: "select",
|
||||
name: "",
|
||||
lazy: true,
|
||||
},
|
||||
});
|
||||
const [groupList, setGroupList] = useState<IProxyGroupConfig[]>([]);
|
||||
const [proxyPolicyList, setProxyPolicyList] = useState<string[]>([]);
|
||||
const [proxyProviderList, setProxyProviderList] = useState<string[]>([]);
|
||||
const [prependSeq, setPrependSeq] = useState<IProxyGroupConfig[]>([]);
|
||||
const [appendSeq, setAppendSeq] = useState<IProxyGroupConfig[]>([]);
|
||||
const [deleteSeq, setDeleteSeq] = useState<string[]>([]);
|
||||
|
||||
const filteredGroupList = useMemo(
|
||||
() => groupList.filter((group) => match(group.name)),
|
||||
[groupList, match]
|
||||
);
|
||||
|
||||
const sensors = useSensors(
|
||||
useSensor(PointerSensor),
|
||||
useSensor(KeyboardSensor, {
|
||||
coordinateGetter: sortableKeyboardCoordinates,
|
||||
})
|
||||
);
|
||||
const reorder = (
|
||||
list: IProxyGroupConfig[],
|
||||
startIndex: number,
|
||||
endIndex: number
|
||||
) => {
|
||||
const result = Array.from(list);
|
||||
const [removed] = result.splice(startIndex, 1);
|
||||
result.splice(endIndex, 0, removed);
|
||||
return result;
|
||||
};
|
||||
const onPrependDragEnd = async (event: DragEndEvent) => {
|
||||
const { active, over } = event;
|
||||
if (over) {
|
||||
if (active.id !== over.id) {
|
||||
let activeIndex = 0;
|
||||
let overIndex = 0;
|
||||
prependSeq.forEach((item, index) => {
|
||||
if (item.name === active.id) {
|
||||
activeIndex = index;
|
||||
}
|
||||
if (item.name === over.id) {
|
||||
overIndex = index;
|
||||
}
|
||||
});
|
||||
|
||||
setPrependSeq(reorder(prependSeq, activeIndex, overIndex));
|
||||
}
|
||||
}
|
||||
};
|
||||
const onAppendDragEnd = async (event: DragEndEvent) => {
|
||||
const { active, over } = event;
|
||||
if (over) {
|
||||
if (active.id !== over.id) {
|
||||
let activeIndex = 0;
|
||||
let overIndex = 0;
|
||||
appendSeq.forEach((item, index) => {
|
||||
if (item.name === active.id) {
|
||||
activeIndex = index;
|
||||
}
|
||||
if (item.name === over.id) {
|
||||
overIndex = index;
|
||||
}
|
||||
});
|
||||
setAppendSeq(reorder(appendSeq, activeIndex, overIndex));
|
||||
}
|
||||
}
|
||||
};
|
||||
const fetchContent = async () => {
|
||||
let data = await readProfileFile(property);
|
||||
let obj = yaml.load(data) as ISeqProfileConfig | null;
|
||||
|
||||
setPrependSeq(obj?.prepend || []);
|
||||
setAppendSeq(obj?.append || []);
|
||||
setDeleteSeq(obj?.delete || []);
|
||||
|
||||
setPrevData(data);
|
||||
setCurrData(data);
|
||||
};
|
||||
|
||||
useEffect(() => {
|
||||
if (currData === "") return;
|
||||
if (visualization !== true) return;
|
||||
|
||||
let obj = yaml.load(currData) as {
|
||||
prepend: [];
|
||||
append: [];
|
||||
delete: [];
|
||||
} | null;
|
||||
setPrependSeq(obj?.prepend || []);
|
||||
setAppendSeq(obj?.append || []);
|
||||
setDeleteSeq(obj?.delete || []);
|
||||
}, [visualization]);
|
||||
|
||||
useEffect(() => {
|
||||
if (prependSeq && appendSeq && deleteSeq)
|
||||
setCurrData(
|
||||
yaml.dump(
|
||||
{ prepend: prependSeq, append: appendSeq, delete: deleteSeq },
|
||||
{
|
||||
forceQuotes: true,
|
||||
}
|
||||
)
|
||||
);
|
||||
}, [prependSeq, appendSeq, deleteSeq]);
|
||||
|
||||
const fetchProxyPolicy = async () => {
|
||||
let data = await readProfileFile(profileUid);
|
||||
let proxiesData = await readProfileFile(proxiesUid);
|
||||
let originGroupsObj = yaml.load(data) as {
|
||||
"proxy-groups": IProxyGroupConfig[];
|
||||
} | null;
|
||||
|
||||
let originProxiesObj = yaml.load(data) as { proxies: [] } | null;
|
||||
let originProxies = originProxiesObj?.proxies || [];
|
||||
let moreProxiesObj = yaml.load(proxiesData) as ISeqProfileConfig | null;
|
||||
let morePrependProxies = moreProxiesObj?.prepend || [];
|
||||
let moreAppendProxies = moreProxiesObj?.append || [];
|
||||
let moreDeleteProxies =
|
||||
moreProxiesObj?.delete || ([] as string[] | { name: string }[]);
|
||||
|
||||
let proxies = morePrependProxies.concat(
|
||||
originProxies.filter((proxy: any) => {
|
||||
if (proxy.name) {
|
||||
return !moreDeleteProxies.includes(proxy.name);
|
||||
} else {
|
||||
return !moreDeleteProxies.includes(proxy);
|
||||
}
|
||||
}),
|
||||
moreAppendProxies
|
||||
);
|
||||
|
||||
setProxyPolicyList(
|
||||
builtinProxyPolicies.concat(
|
||||
prependSeq.map((group: IProxyGroupConfig) => group.name),
|
||||
originGroupsObj?.["proxy-groups"]
|
||||
.map((group: IProxyGroupConfig) => group.name)
|
||||
.filter((name) => !deleteSeq.includes(name)) || [],
|
||||
appendSeq.map((group: IProxyGroupConfig) => group.name),
|
||||
proxies.map((proxy: any) => proxy.name)
|
||||
)
|
||||
);
|
||||
};
|
||||
const fetchProfile = async () => {
|
||||
let data = await readProfileFile(profileUid);
|
||||
let mergeData = await readProfileFile(mergeUid);
|
||||
let globalMergeData = await readProfileFile("Merge");
|
||||
|
||||
let originGroupsObj = yaml.load(data) as {
|
||||
"proxy-groups": IProxyGroupConfig[];
|
||||
} | null;
|
||||
|
||||
let originProviderObj = yaml.load(data) as { "proxy-providers": {} } | null;
|
||||
let originProvider = originProviderObj?.["proxy-providers"] || {};
|
||||
|
||||
let moreProviderObj = yaml.load(mergeData) as {
|
||||
"proxy-providers": {};
|
||||
} | null;
|
||||
let moreProvider = moreProviderObj?.["proxy-providers"] || {};
|
||||
|
||||
let globalProviderObj = yaml.load(globalMergeData) as {
|
||||
"proxy-providers": {};
|
||||
} | null;
|
||||
let globalProvider = globalProviderObj?.["proxy-providers"] || {};
|
||||
|
||||
let provider = Object.assign(
|
||||
{},
|
||||
originProvider,
|
||||
moreProvider,
|
||||
globalProvider
|
||||
);
|
||||
|
||||
setProxyProviderList(Object.keys(provider));
|
||||
setGroupList(originGroupsObj?.["proxy-groups"] || []);
|
||||
};
|
||||
useEffect(() => {
|
||||
fetchProxyPolicy();
|
||||
}, [prependSeq, appendSeq, deleteSeq]);
|
||||
useEffect(() => {
|
||||
if (!open) return;
|
||||
fetchContent();
|
||||
fetchProxyPolicy();
|
||||
fetchProfile();
|
||||
}, [open]);
|
||||
|
||||
const validateGroup = () => {
|
||||
let group = formIns.getValues();
|
||||
if (group.name === "") {
|
||||
throw new Error(t("Group Name Cannot Be Empty"));
|
||||
}
|
||||
};
|
||||
|
||||
const handleSave = useLockFn(async () => {
|
||||
try {
|
||||
await saveProfileFile(property, currData);
|
||||
onSave?.(prevData, currData);
|
||||
onClose();
|
||||
} catch (err: any) {
|
||||
Notice.error(err.message || err.toString());
|
||||
}
|
||||
});
|
||||
|
||||
return (
|
||||
<Dialog open={open} onClose={onClose} maxWidth="xl" fullWidth>
|
||||
<DialogTitle>
|
||||
{
|
||||
<Box display="flex" justifyContent="space-between">
|
||||
{t("Edit Groups")}
|
||||
<Box>
|
||||
<Button
|
||||
variant="contained"
|
||||
size="small"
|
||||
onClick={() => {
|
||||
setVisualization((prev) => !prev);
|
||||
}}
|
||||
>
|
||||
{visualization ? t("Advanced") : t("Visualization")}
|
||||
</Button>
|
||||
</Box>
|
||||
</Box>
|
||||
}
|
||||
</DialogTitle>
|
||||
|
||||
<DialogContent
|
||||
sx={{ display: "flex", width: "auto", height: "calc(100vh - 185px)" }}
|
||||
>
|
||||
{visualization ? (
|
||||
<>
|
||||
<List
|
||||
sx={{
|
||||
width: "50%",
|
||||
padding: "0 10px",
|
||||
}}
|
||||
>
|
||||
<Box
|
||||
sx={{
|
||||
height: "calc(100% - 80px)",
|
||||
overflowY: "auto",
|
||||
}}
|
||||
>
|
||||
<Controller
|
||||
name="type"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Group Type")} />
|
||||
<Autocomplete
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
options={[
|
||||
"select",
|
||||
"url-test",
|
||||
"fallback",
|
||||
"load-balance",
|
||||
"relay",
|
||||
]}
|
||||
value={field.value}
|
||||
onChange={(_, value) => value && field.onChange(value)}
|
||||
renderInput={(params) => <TextField {...params} />}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="name"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Group Name")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
{...field}
|
||||
required={true}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="icon"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Icon")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
{...field}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="proxies"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Use Proxies")} />
|
||||
<Autocomplete
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
multiple
|
||||
options={proxyPolicyList}
|
||||
onChange={(_, value) => value && field.onChange(value)}
|
||||
renderInput={(params) => <TextField {...params} />}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="use"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Use Provider")} />
|
||||
<Autocomplete
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
multiple
|
||||
options={proxyProviderList}
|
||||
onChange={(_, value) => value && field.onChange(value)}
|
||||
renderInput={(params) => <TextField {...params} />}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
|
||||
<Controller
|
||||
name="url"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Health Check Url")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
{...field}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="interval"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Interval")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
type="number"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
onChange={(e) => {
|
||||
field.onChange(parseInt(e.target.value));
|
||||
}}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="timeout"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Timeout")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
type="number"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
onChange={(e) => {
|
||||
field.onChange(parseInt(e.target.value));
|
||||
}}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="max-failed-times"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Max Failed Times")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
type="number"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
onChange={(e) => {
|
||||
field.onChange(parseInt(e.target.value));
|
||||
}}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="interface-name"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Interface Name")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
{...field}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="routing-mark"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Routing Mark")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
type="number"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
onChange={(e) => {
|
||||
field.onChange(parseInt(e.target.value));
|
||||
}}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="filter"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Filter")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
{...field}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="exclude-filter"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Exclude Filter")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
{...field}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="exclude-type"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Exclude Type")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
{...field}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="expected-status"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Expected Status")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
type="number"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
onChange={(e) => {
|
||||
field.onChange(parseInt(e.target.value));
|
||||
}}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="include-all"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Include All")} />
|
||||
<Switch checked={field.value} {...field} />
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="include-all-proxies"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Include All Proxies")} />
|
||||
<Switch checked={field.value} {...field} />
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="include-all-providers"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Include All Providers")} />
|
||||
<Switch checked={field.value} {...field} />
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="lazy"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Lazy")} />
|
||||
<Switch checked={field.value} {...field} />
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="disable-udp"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Disable UDP")} />
|
||||
<Switch checked={field.value} {...field} />
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="hidden"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Hidden")} />
|
||||
<Switch checked={field.value} {...field} />
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
</Box>
|
||||
<Item>
|
||||
<Button
|
||||
fullWidth
|
||||
variant="contained"
|
||||
onClick={() => {
|
||||
try {
|
||||
validateGroup();
|
||||
for (const item of prependSeq) {
|
||||
if (item.name === formIns.getValues().name) {
|
||||
throw new Error(t("Group Name Already Exists"));
|
||||
}
|
||||
}
|
||||
setPrependSeq([...prependSeq, formIns.getValues()]);
|
||||
} catch (err: any) {
|
||||
Notice.error(err.message || err.toString());
|
||||
}
|
||||
}}
|
||||
>
|
||||
{t("Prepend Group")}
|
||||
</Button>
|
||||
</Item>
|
||||
<Item>
|
||||
<Button
|
||||
fullWidth
|
||||
variant="contained"
|
||||
onClick={() => {
|
||||
try {
|
||||
validateGroup();
|
||||
for (const item of appendSeq) {
|
||||
if (item.name === formIns.getValues().name) {
|
||||
throw new Error(t("Group Name Already Exists"));
|
||||
}
|
||||
}
|
||||
setAppendSeq([...appendSeq, formIns.getValues()]);
|
||||
} catch (err: any) {
|
||||
Notice.error(err.message || err.toString());
|
||||
}
|
||||
}}
|
||||
>
|
||||
{t("Append Group")}
|
||||
</Button>
|
||||
</Item>
|
||||
</List>
|
||||
|
||||
<List
|
||||
sx={{
|
||||
width: "50%",
|
||||
padding: "0 10px",
|
||||
}}
|
||||
>
|
||||
<BaseSearchBox
|
||||
matchCase={false}
|
||||
onSearch={(match) => setMatch(() => match)}
|
||||
/>
|
||||
<Virtuoso
|
||||
style={{ height: "calc(100% - 24px)", marginTop: "8px" }}
|
||||
totalCount={
|
||||
filteredGroupList.length +
|
||||
(prependSeq.length > 0 ? 1 : 0) +
|
||||
(appendSeq.length > 0 ? 1 : 0)
|
||||
}
|
||||
increaseViewportBy={256}
|
||||
itemContent={(index) => {
|
||||
let shift = prependSeq.length > 0 ? 1 : 0;
|
||||
if (prependSeq.length > 0 && index === 0) {
|
||||
return (
|
||||
<DndContext
|
||||
sensors={sensors}
|
||||
collisionDetection={closestCenter}
|
||||
onDragEnd={onPrependDragEnd}
|
||||
>
|
||||
<SortableContext
|
||||
items={prependSeq.map((x) => {
|
||||
return x.name;
|
||||
})}
|
||||
>
|
||||
{prependSeq.map((item, index) => {
|
||||
return (
|
||||
<GroupItem
|
||||
key={`${item.name}-${index}`}
|
||||
type="prepend"
|
||||
group={item}
|
||||
onDelete={() => {
|
||||
setPrependSeq(
|
||||
prependSeq.filter(
|
||||
(v) => v.name !== item.name
|
||||
)
|
||||
);
|
||||
}}
|
||||
/>
|
||||
);
|
||||
})}
|
||||
</SortableContext>
|
||||
</DndContext>
|
||||
);
|
||||
} else if (index < filteredGroupList.length + shift) {
|
||||
let newIndex = index - shift;
|
||||
return (
|
||||
<GroupItem
|
||||
key={`${filteredGroupList[newIndex].name}-${index}`}
|
||||
type={
|
||||
deleteSeq.includes(filteredGroupList[newIndex].name)
|
||||
? "delete"
|
||||
: "original"
|
||||
}
|
||||
group={filteredGroupList[newIndex]}
|
||||
onDelete={() => {
|
||||
if (
|
||||
deleteSeq.includes(filteredGroupList[newIndex].name)
|
||||
) {
|
||||
setDeleteSeq(
|
||||
deleteSeq.filter(
|
||||
(v) => v !== filteredGroupList[newIndex].name
|
||||
)
|
||||
);
|
||||
} else {
|
||||
setDeleteSeq((prev) => [
|
||||
...prev,
|
||||
filteredGroupList[newIndex].name,
|
||||
]);
|
||||
}
|
||||
}}
|
||||
/>
|
||||
);
|
||||
} else {
|
||||
return (
|
||||
<DndContext
|
||||
sensors={sensors}
|
||||
collisionDetection={closestCenter}
|
||||
onDragEnd={onAppendDragEnd}
|
||||
>
|
||||
<SortableContext
|
||||
items={appendSeq.map((x) => {
|
||||
return x.name;
|
||||
})}
|
||||
>
|
||||
{appendSeq.map((item, index) => {
|
||||
return (
|
||||
<GroupItem
|
||||
key={`${item.name}-${index}`}
|
||||
type="append"
|
||||
group={item}
|
||||
onDelete={() => {
|
||||
setAppendSeq(
|
||||
appendSeq.filter(
|
||||
(v) => v.name !== item.name
|
||||
)
|
||||
);
|
||||
}}
|
||||
/>
|
||||
);
|
||||
})}
|
||||
</SortableContext>
|
||||
</DndContext>
|
||||
);
|
||||
}
|
||||
}}
|
||||
/>
|
||||
</List>
|
||||
</>
|
||||
) : (
|
||||
<MonacoEditor
|
||||
height="100%"
|
||||
language="yaml"
|
||||
value={currData}
|
||||
theme={themeMode === "light" ? "vs" : "vs-dark"}
|
||||
options={{
|
||||
tabSize: 2, // 根据语言类型设置缩进大小
|
||||
minimap: {
|
||||
enabled: document.documentElement.clientWidth >= 1500, // 超过一定宽度显示minimap滚动条
|
||||
},
|
||||
mouseWheelZoom: true, // 按住Ctrl滚轮调节缩放比例
|
||||
quickSuggestions: {
|
||||
strings: true, // 字符串类型的建议
|
||||
comments: true, // 注释类型的建议
|
||||
other: true, // 其他类型的建议
|
||||
},
|
||||
padding: {
|
||||
top: 33, // 顶部padding防止遮挡snippets
|
||||
},
|
||||
fontFamily: `Fira Code, JetBrains Mono, Roboto Mono, "Source Code Pro", Consolas, Menlo, Monaco, monospace, "Courier New", "Apple Color Emoji"${
|
||||
getSystem() === "windows" ? ", twemoji mozilla" : ""
|
||||
}`,
|
||||
fontLigatures: true, // 连字符
|
||||
smoothScrolling: true, // 平滑滚动
|
||||
}}
|
||||
onChange={(value) => setCurrData(value)}
|
||||
/>
|
||||
)}
|
||||
</DialogContent>
|
||||
|
||||
<DialogActions>
|
||||
<Button onClick={onClose} variant="outlined">
|
||||
{t("Cancel")}
|
||||
</Button>
|
||||
|
||||
<Button onClick={handleSave} variant="contained">
|
||||
{t("Save")}
|
||||
</Button>
|
||||
</DialogActions>
|
||||
</Dialog>
|
||||
);
|
||||
};
|
||||
|
||||
const Item = styled(ListItem)(() => ({
|
||||
padding: "5px 2px",
|
||||
}));
|
||||
@@ -24,12 +24,14 @@ import {
|
||||
saveProfileFile,
|
||||
} from "@/services/cmds";
|
||||
import { Notice } from "@/components/base";
|
||||
import { GroupsEditorViewer } from "@/components/profile/groups-editor-viewer";
|
||||
import { RulesEditorViewer } from "@/components/profile/rules-editor-viewer";
|
||||
import { EditorViewer } from "@/components/profile/editor-viewer";
|
||||
import { ProfileBox } from "./profile-box";
|
||||
import parseTraffic from "@/utils/parse-traffic";
|
||||
import { ConfirmViewer } from "@/components/profile/confirm-viewer";
|
||||
import { open } from "@tauri-apps/api/shell";
|
||||
import { ProxiesEditorViewer } from "./proxies-editor-viewer";
|
||||
const round = keyframes`
|
||||
from { transform: rotate(0deg); }
|
||||
to { transform: rotate(360deg); }
|
||||
@@ -491,24 +493,20 @@ export const ProfileItem = (props: Props) => {
|
||||
onSave={onSave}
|
||||
onClose={() => setRulesOpen(false)}
|
||||
/>
|
||||
<EditorViewer
|
||||
<ProxiesEditorViewer
|
||||
profileUid={uid}
|
||||
property={option?.proxies ?? ""}
|
||||
open={proxiesOpen}
|
||||
initialData={readProfileFile(option?.proxies ?? "")}
|
||||
language="yaml"
|
||||
onSave={async (prev, curr) => {
|
||||
await saveProfileFile(option?.proxies ?? "", curr ?? "");
|
||||
onSave && onSave(prev, curr);
|
||||
}}
|
||||
onSave={onSave}
|
||||
onClose={() => setProxiesOpen(false)}
|
||||
/>
|
||||
<EditorViewer
|
||||
<GroupsEditorViewer
|
||||
mergeUid={option?.merge ?? ""}
|
||||
proxiesUid={option?.proxies ?? ""}
|
||||
profileUid={uid}
|
||||
property={option?.groups ?? ""}
|
||||
open={groupsOpen}
|
||||
initialData={readProfileFile(option?.groups ?? "")}
|
||||
language="yaml"
|
||||
onSave={async (prev, curr) => {
|
||||
await saveProfileFile(option?.groups ?? "", curr ?? "");
|
||||
onSave && onSave(prev, curr);
|
||||
}}
|
||||
onSave={onSave}
|
||||
onClose={() => setGroupsOpen(false)}
|
||||
/>
|
||||
<EditorViewer
|
||||
|
||||
521
clash-verge-rev/src/components/profile/proxies-editor-viewer.tsx
Normal file
521
clash-verge-rev/src/components/profile/proxies-editor-viewer.tsx
Normal file
@@ -0,0 +1,521 @@
|
||||
import { ReactNode, useEffect, useMemo, useState } from "react";
|
||||
import { useLockFn } from "ahooks";
|
||||
import yaml from "js-yaml";
|
||||
import { useTranslation } from "react-i18next";
|
||||
import {
|
||||
DndContext,
|
||||
closestCenter,
|
||||
KeyboardSensor,
|
||||
PointerSensor,
|
||||
useSensor,
|
||||
useSensors,
|
||||
DragEndEvent,
|
||||
} from "@dnd-kit/core";
|
||||
import {
|
||||
SortableContext,
|
||||
sortableKeyboardCoordinates,
|
||||
} from "@dnd-kit/sortable";
|
||||
import {
|
||||
Autocomplete,
|
||||
Box,
|
||||
Button,
|
||||
Dialog,
|
||||
DialogActions,
|
||||
DialogContent,
|
||||
DialogTitle,
|
||||
List,
|
||||
ListItem,
|
||||
ListItemText,
|
||||
TextField,
|
||||
styled,
|
||||
} from "@mui/material";
|
||||
import { ProxyItem } from "@/components/profile/proxy-item";
|
||||
import { readProfileFile, saveProfileFile } from "@/services/cmds";
|
||||
import { Notice, Switch } from "@/components/base";
|
||||
import getSystem from "@/utils/get-system";
|
||||
import { BaseSearchBox } from "../base/base-search-box";
|
||||
import { Virtuoso } from "react-virtuoso";
|
||||
import MonacoEditor from "react-monaco-editor";
|
||||
import { useThemeMode } from "@/services/states";
|
||||
import { Controller, useForm } from "react-hook-form";
|
||||
|
||||
interface Props {
|
||||
profileUid: string;
|
||||
property: string;
|
||||
open: boolean;
|
||||
onClose: () => void;
|
||||
onSave?: (prev?: string, curr?: string) => void;
|
||||
}
|
||||
|
||||
const builtinProxyPolicies = ["DIRECT", "REJECT", "REJECT-DROP", "PASS"];
|
||||
|
||||
export const ProxiesEditorViewer = (props: Props) => {
|
||||
const { profileUid, property, open, onClose, onSave } = props;
|
||||
const { t } = useTranslation();
|
||||
const themeMode = useThemeMode();
|
||||
const [prevData, setPrevData] = useState("");
|
||||
const [currData, setCurrData] = useState("");
|
||||
const [visualization, setVisualization] = useState(true);
|
||||
const [match, setMatch] = useState(() => (_: string) => true);
|
||||
|
||||
const { control, watch, register, ...formIns } = useForm<IProxyConfig>({
|
||||
defaultValues: {
|
||||
type: "ss",
|
||||
name: "",
|
||||
},
|
||||
});
|
||||
|
||||
const [proxyList, setProxyList] = useState<IProxyConfig[]>([]);
|
||||
const [prependSeq, setPrependSeq] = useState<IProxyConfig[]>([]);
|
||||
const [appendSeq, setAppendSeq] = useState<IProxyConfig[]>([]);
|
||||
const [deleteSeq, setDeleteSeq] = useState<string[]>([]);
|
||||
|
||||
const filteredProxyList = useMemo(
|
||||
() => proxyList.filter((proxy) => match(proxy.name)),
|
||||
[proxyList, match]
|
||||
);
|
||||
|
||||
const sensors = useSensors(
|
||||
useSensor(PointerSensor),
|
||||
useSensor(KeyboardSensor, {
|
||||
coordinateGetter: sortableKeyboardCoordinates,
|
||||
})
|
||||
);
|
||||
const reorder = (
|
||||
list: IProxyConfig[],
|
||||
startIndex: number,
|
||||
endIndex: number
|
||||
) => {
|
||||
const result = Array.from(list);
|
||||
const [removed] = result.splice(startIndex, 1);
|
||||
result.splice(endIndex, 0, removed);
|
||||
return result;
|
||||
};
|
||||
const onPrependDragEnd = async (event: DragEndEvent) => {
|
||||
const { active, over } = event;
|
||||
if (over) {
|
||||
if (active.id !== over.id) {
|
||||
let activeIndex = 0;
|
||||
let overIndex = 0;
|
||||
prependSeq.forEach((item, index) => {
|
||||
if (item.name === active.id) {
|
||||
activeIndex = index;
|
||||
}
|
||||
if (item.name === over.id) {
|
||||
overIndex = index;
|
||||
}
|
||||
});
|
||||
|
||||
setPrependSeq(reorder(prependSeq, activeIndex, overIndex));
|
||||
}
|
||||
}
|
||||
};
|
||||
const onAppendDragEnd = async (event: DragEndEvent) => {
|
||||
const { active, over } = event;
|
||||
if (over) {
|
||||
if (active.id !== over.id) {
|
||||
let activeIndex = 0;
|
||||
let overIndex = 0;
|
||||
appendSeq.forEach((item, index) => {
|
||||
if (item.name === active.id) {
|
||||
activeIndex = index;
|
||||
}
|
||||
if (item.name === over.id) {
|
||||
overIndex = index;
|
||||
}
|
||||
});
|
||||
setAppendSeq(reorder(appendSeq, activeIndex, overIndex));
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
const fetchProfile = async () => {
|
||||
let data = await readProfileFile(profileUid);
|
||||
|
||||
let originProxiesObj = yaml.load(data) as {
|
||||
proxies: IProxyConfig[];
|
||||
} | null;
|
||||
|
||||
setProxyList(originProxiesObj?.proxies || []);
|
||||
};
|
||||
|
||||
const fetchContent = async () => {
|
||||
let data = await readProfileFile(property);
|
||||
let obj = yaml.load(data) as ISeqProfileConfig | null;
|
||||
|
||||
setPrependSeq(obj?.prepend || []);
|
||||
setAppendSeq(obj?.append || []);
|
||||
setDeleteSeq(obj?.delete || []);
|
||||
|
||||
setPrevData(data);
|
||||
setCurrData(data);
|
||||
};
|
||||
|
||||
useEffect(() => {
|
||||
if (currData === "") return;
|
||||
if (visualization !== true) return;
|
||||
|
||||
let obj = yaml.load(currData) as {
|
||||
prepend: [];
|
||||
append: [];
|
||||
delete: [];
|
||||
} | null;
|
||||
setPrependSeq(obj?.prepend || []);
|
||||
setAppendSeq(obj?.append || []);
|
||||
setDeleteSeq(obj?.delete || []);
|
||||
}, [visualization]);
|
||||
|
||||
useEffect(() => {
|
||||
if (prependSeq && appendSeq && deleteSeq)
|
||||
setCurrData(
|
||||
yaml.dump(
|
||||
{ prepend: prependSeq, append: appendSeq, delete: deleteSeq },
|
||||
{
|
||||
forceQuotes: true,
|
||||
}
|
||||
)
|
||||
);
|
||||
}, [prependSeq, appendSeq, deleteSeq]);
|
||||
|
||||
useEffect(() => {
|
||||
if (!open) return;
|
||||
fetchContent();
|
||||
fetchProfile();
|
||||
}, [open]);
|
||||
|
||||
const handleSave = useLockFn(async () => {
|
||||
try {
|
||||
await saveProfileFile(property, currData);
|
||||
onSave?.(prevData, currData);
|
||||
onClose();
|
||||
} catch (err: any) {
|
||||
Notice.error(err.message || err.toString());
|
||||
}
|
||||
});
|
||||
|
||||
return (
|
||||
<Dialog open={open} onClose={onClose} maxWidth="xl" fullWidth>
|
||||
<DialogTitle>
|
||||
{
|
||||
<Box display="flex" justifyContent="space-between">
|
||||
{t("Edit Proxies")}
|
||||
<Box>
|
||||
<Button
|
||||
variant="contained"
|
||||
size="small"
|
||||
onClick={() => {
|
||||
setVisualization((prev) => !prev);
|
||||
}}
|
||||
>
|
||||
{visualization ? t("Advanced") : t("Visualization")}
|
||||
</Button>
|
||||
</Box>
|
||||
</Box>
|
||||
}
|
||||
</DialogTitle>
|
||||
|
||||
<DialogContent
|
||||
sx={{ display: "flex", width: "auto", height: "calc(100vh - 185px)" }}
|
||||
>
|
||||
{visualization ? (
|
||||
<>
|
||||
<List
|
||||
sx={{
|
||||
width: "50%",
|
||||
padding: "0 10px",
|
||||
}}
|
||||
>
|
||||
<Box
|
||||
sx={{
|
||||
height: "calc(100% - 80px)",
|
||||
overflowY: "auto",
|
||||
}}
|
||||
>
|
||||
<Controller
|
||||
name="type"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Proxy Type")} />
|
||||
<Autocomplete
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
options={[
|
||||
"ss",
|
||||
"ssr",
|
||||
"direct",
|
||||
"dns",
|
||||
"snell",
|
||||
"http",
|
||||
"trojan",
|
||||
"hysteria",
|
||||
"hysteria2",
|
||||
"tuic",
|
||||
"wireguard",
|
||||
"ssh",
|
||||
"socks5",
|
||||
"vmess",
|
||||
"vless",
|
||||
]}
|
||||
value={field.value}
|
||||
onChange={(_, value) => value && field.onChange(value)}
|
||||
renderInput={(params) => <TextField {...params} />}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="name"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Proxy Name")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
{...field}
|
||||
required={true}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="server"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Proxy Server")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
{...field}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
<Controller
|
||||
name="port"
|
||||
control={control}
|
||||
render={({ field }) => (
|
||||
<Item>
|
||||
<ListItemText primary={t("Proxy Port")} />
|
||||
<TextField
|
||||
autoComplete="off"
|
||||
type="number"
|
||||
size="small"
|
||||
sx={{ minWidth: "240px" }}
|
||||
onChange={(e) => {
|
||||
field.onChange(parseInt(e.target.value));
|
||||
}}
|
||||
/>
|
||||
</Item>
|
||||
)}
|
||||
/>
|
||||
</Box>
|
||||
<Item>
|
||||
<Button
|
||||
fullWidth
|
||||
variant="contained"
|
||||
onClick={() => {
|
||||
try {
|
||||
for (const item of prependSeq) {
|
||||
if (item.name === formIns.getValues().name) {
|
||||
throw new Error(t("Proxy Name Already Exists"));
|
||||
}
|
||||
}
|
||||
setPrependSeq([...prependSeq, formIns.getValues()]);
|
||||
} catch (err: any) {
|
||||
Notice.error(err.message || err.toString());
|
||||
}
|
||||
}}
|
||||
>
|
||||
{t("Prepend Proxy")}
|
||||
</Button>
|
||||
</Item>
|
||||
<Item>
|
||||
<Button
|
||||
fullWidth
|
||||
variant="contained"
|
||||
onClick={() => {
|
||||
try {
|
||||
for (const item of appendSeq) {
|
||||
if (item.name === formIns.getValues().name) {
|
||||
throw new Error(t("Proxy Name Already Exists"));
|
||||
}
|
||||
}
|
||||
setAppendSeq([...appendSeq, formIns.getValues()]);
|
||||
} catch (err: any) {
|
||||
Notice.error(err.message || err.toString());
|
||||
}
|
||||
}}
|
||||
>
|
||||
{t("Append Proxy")}
|
||||
</Button>
|
||||
</Item>
|
||||
</List>
|
||||
|
||||
<List
|
||||
sx={{
|
||||
width: "50%",
|
||||
padding: "0 10px",
|
||||
}}
|
||||
>
|
||||
<BaseSearchBox
|
||||
matchCase={false}
|
||||
onSearch={(match) => setMatch(() => match)}
|
||||
/>
|
||||
<Virtuoso
|
||||
style={{ height: "calc(100% - 24px)", marginTop: "8px" }}
|
||||
totalCount={
|
||||
filteredProxyList.length +
|
||||
(prependSeq.length > 0 ? 1 : 0) +
|
||||
(appendSeq.length > 0 ? 1 : 0)
|
||||
}
|
||||
increaseViewportBy={256}
|
||||
itemContent={(index) => {
|
||||
let shift = prependSeq.length > 0 ? 1 : 0;
|
||||
if (prependSeq.length > 0 && index === 0) {
|
||||
return (
|
||||
<DndContext
|
||||
sensors={sensors}
|
||||
collisionDetection={closestCenter}
|
||||
onDragEnd={onPrependDragEnd}
|
||||
>
|
||||
<SortableContext
|
||||
items={prependSeq.map((x) => {
|
||||
return x.name;
|
||||
})}
|
||||
>
|
||||
{prependSeq.map((item, index) => {
|
||||
return (
|
||||
<ProxyItem
|
||||
key={`${item.name}-${index}`}
|
||||
type="prepend"
|
||||
proxy={item}
|
||||
onDelete={() => {
|
||||
setPrependSeq(
|
||||
prependSeq.filter(
|
||||
(v) => v.name !== item.name
|
||||
)
|
||||
);
|
||||
}}
|
||||
/>
|
||||
);
|
||||
})}
|
||||
</SortableContext>
|
||||
</DndContext>
|
||||
);
|
||||
} else if (index < filteredProxyList.length + shift) {
|
||||
let newIndex = index - shift;
|
||||
return (
|
||||
<ProxyItem
|
||||
key={`${filteredProxyList[newIndex].name}-${index}`}
|
||||
type={
|
||||
deleteSeq.includes(filteredProxyList[newIndex].name)
|
||||
? "delete"
|
||||
: "original"
|
||||
}
|
||||
proxy={filteredProxyList[newIndex]}
|
||||
onDelete={() => {
|
||||
if (
|
||||
deleteSeq.includes(filteredProxyList[newIndex].name)
|
||||
) {
|
||||
setDeleteSeq(
|
||||
deleteSeq.filter(
|
||||
(v) => v !== filteredProxyList[newIndex].name
|
||||
)
|
||||
);
|
||||
} else {
|
||||
setDeleteSeq((prev) => [
|
||||
...prev,
|
||||
filteredProxyList[newIndex].name,
|
||||
]);
|
||||
}
|
||||
}}
|
||||
/>
|
||||
);
|
||||
} else {
|
||||
return (
|
||||
<DndContext
|
||||
sensors={sensors}
|
||||
collisionDetection={closestCenter}
|
||||
onDragEnd={onAppendDragEnd}
|
||||
>
|
||||
<SortableContext
|
||||
items={appendSeq.map((x) => {
|
||||
return x.name;
|
||||
})}
|
||||
>
|
||||
{appendSeq.map((item, index) => {
|
||||
return (
|
||||
<ProxyItem
|
||||
key={`${item.name}-${index}`}
|
||||
type="append"
|
||||
proxy={item}
|
||||
onDelete={() => {
|
||||
setAppendSeq(
|
||||
appendSeq.filter(
|
||||
(v) => v.name !== item.name
|
||||
)
|
||||
);
|
||||
}}
|
||||
/>
|
||||
);
|
||||
})}
|
||||
</SortableContext>
|
||||
</DndContext>
|
||||
);
|
||||
}
|
||||
}}
|
||||
/>
|
||||
</List>
|
||||
</>
|
||||
) : (
|
||||
<MonacoEditor
|
||||
height="100%"
|
||||
language="yaml"
|
||||
value={currData}
|
||||
theme={themeMode === "light" ? "vs" : "vs-dark"}
|
||||
options={{
|
||||
tabSize: 2, // 根据语言类型设置缩进大小
|
||||
minimap: {
|
||||
enabled: document.documentElement.clientWidth >= 1500, // 超过一定宽度显示minimap滚动条
|
||||
},
|
||||
mouseWheelZoom: true, // 按住Ctrl滚轮调节缩放比例
|
||||
quickSuggestions: {
|
||||
strings: true, // 字符串类型的建议
|
||||
comments: true, // 注释类型的建议
|
||||
other: true, // 其他类型的建议
|
||||
},
|
||||
padding: {
|
||||
top: 33, // 顶部padding防止遮挡snippets
|
||||
},
|
||||
fontFamily: `Fira Code, JetBrains Mono, Roboto Mono, "Source Code Pro", Consolas, Menlo, Monaco, monospace, "Courier New", "Apple Color Emoji"${
|
||||
getSystem() === "windows" ? ", twemoji mozilla" : ""
|
||||
}`,
|
||||
fontLigatures: true, // 连字符
|
||||
smoothScrolling: true, // 平滑滚动
|
||||
}}
|
||||
onChange={(value) => setCurrData(value)}
|
||||
/>
|
||||
)}
|
||||
</DialogContent>
|
||||
|
||||
<DialogActions>
|
||||
<Button onClick={onClose} variant="outlined">
|
||||
{t("Cancel")}
|
||||
</Button>
|
||||
|
||||
<Button onClick={handleSave} variant="contained">
|
||||
{t("Save")}
|
||||
</Button>
|
||||
</DialogActions>
|
||||
</Dialog>
|
||||
);
|
||||
};
|
||||
|
||||
const Item = styled(ListItem)(() => ({
|
||||
padding: "5px 2px",
|
||||
}));
|
||||
116
clash-verge-rev/src/components/profile/proxy-item.tsx
Normal file
116
clash-verge-rev/src/components/profile/proxy-item.tsx
Normal file
@@ -0,0 +1,116 @@
|
||||
import {
|
||||
Box,
|
||||
IconButton,
|
||||
ListItem,
|
||||
ListItemText,
|
||||
alpha,
|
||||
styled,
|
||||
} from "@mui/material";
|
||||
import { DeleteForeverRounded, UndoRounded } from "@mui/icons-material";
|
||||
import { useSortable } from "@dnd-kit/sortable";
|
||||
import { CSS } from "@dnd-kit/utilities";
|
||||
|
||||
interface Props {
|
||||
type: "prepend" | "original" | "delete" | "append";
|
||||
proxy: IProxyConfig;
|
||||
onDelete: () => void;
|
||||
}
|
||||
|
||||
export const ProxyItem = (props: Props) => {
|
||||
let { type, proxy, onDelete } = props;
|
||||
const sortable = type === "prepend" || type === "append";
|
||||
|
||||
const { attributes, listeners, setNodeRef, transform, transition } = sortable
|
||||
? useSortable({ id: proxy.name })
|
||||
: {
|
||||
attributes: {},
|
||||
listeners: {},
|
||||
setNodeRef: null,
|
||||
transform: null,
|
||||
transition: null,
|
||||
};
|
||||
|
||||
return (
|
||||
<ListItem
|
||||
dense
|
||||
sx={({ palette }) => ({
|
||||
background:
|
||||
type === "original"
|
||||
? palette.mode === "dark"
|
||||
? alpha(palette.background.paper, 0.3)
|
||||
: alpha(palette.grey[400], 0.3)
|
||||
: type === "delete"
|
||||
? alpha(palette.error.main, 0.3)
|
||||
: alpha(palette.success.main, 0.3),
|
||||
height: "100%",
|
||||
margin: "8px 0",
|
||||
borderRadius: "8px",
|
||||
transform: CSS.Transform.toString(transform),
|
||||
transition,
|
||||
})}
|
||||
>
|
||||
<ListItemText
|
||||
{...attributes}
|
||||
{...listeners}
|
||||
ref={setNodeRef}
|
||||
sx={{ cursor: sortable ? "move" : "" }}
|
||||
primary={
|
||||
<StyledPrimary
|
||||
sx={{ textDecoration: type === "delete" ? "line-through" : "" }}
|
||||
>
|
||||
{proxy.name}
|
||||
</StyledPrimary>
|
||||
}
|
||||
secondary={
|
||||
<ListItemTextChild
|
||||
sx={{
|
||||
overflow: "hidden",
|
||||
display: "flex",
|
||||
alignItems: "center",
|
||||
pt: "2px",
|
||||
}}
|
||||
>
|
||||
<Box sx={{ marginTop: "2px" }}>
|
||||
<StyledTypeBox>{proxy.type}</StyledTypeBox>
|
||||
</Box>
|
||||
</ListItemTextChild>
|
||||
}
|
||||
secondaryTypographyProps={{
|
||||
sx: {
|
||||
display: "flex",
|
||||
alignItems: "center",
|
||||
color: "#ccc",
|
||||
},
|
||||
}}
|
||||
/>
|
||||
<IconButton onClick={onDelete}>
|
||||
{type === "delete" ? <UndoRounded /> : <DeleteForeverRounded />}
|
||||
</IconButton>
|
||||
</ListItem>
|
||||
);
|
||||
};
|
||||
|
||||
const StyledPrimary = styled("span")`
|
||||
font-size: 15px;
|
||||
font-weight: 700;
|
||||
line-height: 1.5;
|
||||
overflow: hidden;
|
||||
text-overflow: ellipsis;
|
||||
white-space: nowrap;
|
||||
`;
|
||||
|
||||
const ListItemTextChild = styled("span")`
|
||||
display: block;
|
||||
`;
|
||||
|
||||
const StyledTypeBox = styled(ListItemTextChild)(({ theme }) => ({
|
||||
display: "inline-block",
|
||||
border: "1px solid #ccc",
|
||||
borderColor: alpha(theme.palette.primary.main, 0.5),
|
||||
color: alpha(theme.palette.primary.main, 0.8),
|
||||
borderRadius: 4,
|
||||
fontSize: 10,
|
||||
padding: "0 4px",
|
||||
lineHeight: 1.5,
|
||||
marginRight: "8px",
|
||||
}));
|
||||
@@ -1,11 +1,10 @@
|
||||
import {
|
||||
Box,
|
||||
Divider,
|
||||
IconButton,
|
||||
ListItem,
|
||||
ListItemText,
|
||||
Typography,
|
||||
alpha,
|
||||
styled,
|
||||
} from "@mui/material";
|
||||
import { DeleteForeverRounded, UndoRounded } from "@mui/icons-material";
|
||||
import { useSortable } from "@dnd-kit/sortable";
|
||||
@@ -31,17 +30,19 @@ export const RuleItem = (props: Props) => {
|
||||
};
|
||||
return (
|
||||
<ListItem
|
||||
dense
|
||||
sx={({ palette }) => ({
|
||||
p: 0,
|
||||
borderRadius: "10px",
|
||||
border: "solid 2px",
|
||||
borderColor:
|
||||
background:
|
||||
type === "original"
|
||||
? "var(--divider-color)"
|
||||
? palette.mode === "dark"
|
||||
? alpha(palette.background.paper, 0.3)
|
||||
: alpha(palette.grey[400], 0.3)
|
||||
: type === "delete"
|
||||
? alpha(palette.error.main, 0.5)
|
||||
: alpha(palette.success.main, 0.5),
|
||||
mb: 1,
|
||||
? alpha(palette.error.main, 0.3)
|
||||
: alpha(palette.success.main, 0.3),
|
||||
height: "100%",
|
||||
margin: "8px 0",
|
||||
borderRadius: "8px",
|
||||
transform: CSS.Transform.toString(transform),
|
||||
transition,
|
||||
})}
|
||||
@@ -50,34 +51,76 @@ export const RuleItem = (props: Props) => {
|
||||
{...attributes}
|
||||
{...listeners}
|
||||
ref={setNodeRef}
|
||||
sx={{ px: 1 }}
|
||||
sx={{ cursor: sortable ? "move" : "" }}
|
||||
primary={
|
||||
<>
|
||||
<Typography
|
||||
sx={{
|
||||
textDecoration: type === "delete" ? "line-through" : "",
|
||||
overflow: "hidden",
|
||||
whiteSpace: "nowrap",
|
||||
textOverflow: "ellipsis",
|
||||
}}
|
||||
variant="h6"
|
||||
title={rule.length === 3 ? rule[1] : "-"}
|
||||
<StyledPrimary
|
||||
sx={{ textDecoration: type === "delete" ? "line-through" : "" }}
|
||||
>
|
||||
{rule.length === 3 ? rule[1] : "-"}
|
||||
</Typography>
|
||||
</>
|
||||
</StyledPrimary>
|
||||
}
|
||||
secondary={
|
||||
<Box sx={{ display: "flex", justifyContent: "space-between" }}>
|
||||
<Box>{rule[0]}</Box>
|
||||
<Box>{rule.length === 3 ? rule[2] : rule[1]}</Box>
|
||||
<ListItemTextChild
|
||||
sx={{
|
||||
width: "62%",
|
||||
overflow: "hidden",
|
||||
display: "flex",
|
||||
justifyContent: "space-between",
|
||||
pt: "2px",
|
||||
}}
|
||||
>
|
||||
<Box sx={{ marginTop: "2px" }}>
|
||||
<StyledTypeBox>{rule[0]}</StyledTypeBox>
|
||||
</Box>
|
||||
<StyledSubtitle sx={{ color: "text.secondary" }}>
|
||||
{rule.length === 3 ? rule[2] : rule[1]}
|
||||
</StyledSubtitle>
|
||||
</ListItemTextChild>
|
||||
}
|
||||
secondaryTypographyProps={{
|
||||
sx: {
|
||||
display: "flex",
|
||||
alignItems: "center",
|
||||
color: "#ccc",
|
||||
},
|
||||
}}
|
||||
/>
|
||||
<Divider orientation="vertical" flexItem />
|
||||
<IconButton size="small" color="inherit" onClick={onDelete}>
|
||||
<IconButton onClick={onDelete}>
|
||||
{type === "delete" ? <UndoRounded /> : <DeleteForeverRounded />}
|
||||
</IconButton>
|
||||
</ListItem>
|
||||
);
|
||||
};
|
||||
|
||||
const StyledPrimary = styled("span")`
|
||||
font-size: 15px;
|
||||
font-weight: 700;
|
||||
line-height: 1.5;
|
||||
overflow: hidden;
|
||||
text-overflow: ellipsis;
|
||||
white-space: nowrap;
|
||||
`;
|
||||
|
||||
const StyledSubtitle = styled("span")`
|
||||
font-size: 13px;
|
||||
overflow: hidden;
|
||||
color: text.secondary;
|
||||
text-overflow: ellipsis;
|
||||
white-space: nowrap;
|
||||
`;
|
||||
|
||||
const ListItemTextChild = styled("span")`
|
||||
display: block;
|
||||
`;
|
||||
|
||||
const StyledTypeBox = styled(ListItemTextChild)(({ theme }) => ({
|
||||
display: "inline-block",
|
||||
border: "1px solid #ccc",
|
||||
borderColor: alpha(theme.palette.primary.main, 0.5),
|
||||
color: alpha(theme.palette.primary.main, 0.8),
|
||||
borderRadius: 4,
|
||||
fontSize: 10,
|
||||
padding: "0 4px",
|
||||
lineHeight: 1.5,
|
||||
marginRight: "8px",
|
||||
}));
|
||||
|
||||
@@ -43,7 +43,6 @@ interface Props {
|
||||
groupsUid: string;
|
||||
mergeUid: string;
|
||||
profileUid: string;
|
||||
title?: string | ReactNode;
|
||||
property: string;
|
||||
open: boolean;
|
||||
onClose: () => void;
|
||||
@@ -232,22 +231,14 @@ const rules: {
|
||||
const builtinProxyPolicies = ["DIRECT", "REJECT", "REJECT-DROP", "PASS"];
|
||||
|
||||
export const RulesEditorViewer = (props: Props) => {
|
||||
const {
|
||||
title,
|
||||
groupsUid,
|
||||
mergeUid,
|
||||
profileUid,
|
||||
property,
|
||||
open,
|
||||
onClose,
|
||||
onSave,
|
||||
} = props;
|
||||
const { groupsUid, mergeUid, profileUid, property, open, onClose, onSave } =
|
||||
props;
|
||||
const { t } = useTranslation();
|
||||
const themeMode = useThemeMode();
|
||||
|
||||
const [prevData, setPrevData] = useState("");
|
||||
const [currData, setCurrData] = useState("");
|
||||
const [visible, setVisible] = useState(true);
|
||||
const [visualization, setVisualization] = useState(true);
|
||||
const [match, setMatch] = useState(() => (_: string) => true);
|
||||
|
||||
const [ruleType, setRuleType] = useState<(typeof rules)[number]>(rules[0]);
|
||||
@@ -302,7 +293,7 @@ export const RulesEditorViewer = (props: Props) => {
|
||||
};
|
||||
const fetchContent = async () => {
|
||||
let data = await readProfileFile(property);
|
||||
let obj = yaml.load(data) as { prepend: []; append: []; delete: [] } | null;
|
||||
let obj = yaml.load(data) as ISeqProfileConfig | null;
|
||||
|
||||
setPrependSeq(obj?.prepend || []);
|
||||
setAppendSeq(obj?.append || []);
|
||||
@@ -314,38 +305,51 @@ export const RulesEditorViewer = (props: Props) => {
|
||||
|
||||
useEffect(() => {
|
||||
if (currData === "") return;
|
||||
if (visible !== true) return;
|
||||
if (visualization !== true) return;
|
||||
|
||||
let obj = yaml.load(currData) as {
|
||||
prepend: [];
|
||||
append: [];
|
||||
delete: [];
|
||||
} | null;
|
||||
let obj = yaml.load(currData) as ISeqProfileConfig | null;
|
||||
setPrependSeq(obj?.prepend || []);
|
||||
setAppendSeq(obj?.append || []);
|
||||
setDeleteSeq(obj?.delete || []);
|
||||
}, [visible]);
|
||||
}, [visualization]);
|
||||
|
||||
useEffect(() => {
|
||||
if (prependSeq && appendSeq && deleteSeq)
|
||||
setCurrData(
|
||||
yaml.dump({ prepend: prependSeq, append: appendSeq, delete: deleteSeq })
|
||||
yaml.dump(
|
||||
{ prepend: prependSeq, append: appendSeq, delete: deleteSeq },
|
||||
{
|
||||
forceQuotes: true,
|
||||
}
|
||||
)
|
||||
);
|
||||
}, [prependSeq, appendSeq, deleteSeq]);
|
||||
|
||||
const fetchProfile = async () => {
|
||||
let data = await readProfileFile(profileUid);
|
||||
let groupsData = await readProfileFile(groupsUid);
|
||||
let mergeData = await readProfileFile(mergeUid);
|
||||
let globalMergeData = await readProfileFile("Merge");
|
||||
let data = await readProfileFile(profileUid); // 原配置文件
|
||||
let groupsData = await readProfileFile(groupsUid); // groups配置文件
|
||||
let mergeData = await readProfileFile(mergeUid); // merge配置文件
|
||||
let globalMergeData = await readProfileFile("Merge"); // global merge配置文件
|
||||
|
||||
let rulesObj = yaml.load(data) as { rules: [] } | null;
|
||||
|
||||
let originGroupsObj = yaml.load(data) as { "proxy-groups": [] } | null;
|
||||
let originGroups = originGroupsObj?.["proxy-groups"] || [];
|
||||
let moreGroupsObj = yaml.load(groupsData) as { "proxy-groups": [] } | null;
|
||||
let moreGroups = moreGroupsObj?.["proxy-groups"] || [];
|
||||
let groups = originGroups.concat(moreGroups);
|
||||
let moreGroupsObj = yaml.load(groupsData) as ISeqProfileConfig | null;
|
||||
let morePrependGroups = moreGroupsObj?.["prepend"] || [];
|
||||
let moreAppendGroups = moreGroupsObj?.["append"] || [];
|
||||
let moreDeleteGroups =
|
||||
moreGroupsObj?.["delete"] || ([] as string[] | { name: string }[]);
|
||||
let groups = morePrependGroups.concat(
|
||||
originGroups.filter((group: any) => {
|
||||
if (group.name) {
|
||||
return !moreDeleteGroups.includes(group.name);
|
||||
} else {
|
||||
return !moreDeleteGroups.includes(group);
|
||||
}
|
||||
}),
|
||||
moreAppendGroups
|
||||
);
|
||||
|
||||
let originRuleSetObj = yaml.load(data) as { "rule-providers": {} } | null;
|
||||
let originRuleSet = originRuleSetObj?.["rule-providers"] || {};
|
||||
@@ -377,6 +381,7 @@ export const RulesEditorViewer = (props: Props) => {
|
||||
};
|
||||
|
||||
useEffect(() => {
|
||||
if (!open) return;
|
||||
fetchContent();
|
||||
fetchProfile();
|
||||
}, [open]);
|
||||
@@ -416,10 +421,10 @@ export const RulesEditorViewer = (props: Props) => {
|
||||
variant="contained"
|
||||
size="small"
|
||||
onClick={() => {
|
||||
setVisible((prev) => !prev);
|
||||
setVisualization((prev) => !prev);
|
||||
}}
|
||||
>
|
||||
{visible ? t("Advanced") : t("Visible")}
|
||||
{visualization ? t("Advanced") : t("Visualization")}
|
||||
</Button>
|
||||
</Box>
|
||||
</Box>
|
||||
@@ -429,7 +434,7 @@ export const RulesEditorViewer = (props: Props) => {
|
||||
<DialogContent
|
||||
sx={{ display: "flex", width: "auto", height: "calc(100vh - 185px)" }}
|
||||
>
|
||||
{visible ? (
|
||||
{visualization ? (
|
||||
<>
|
||||
<List
|
||||
sx={{
|
||||
|
||||
@@ -19,13 +19,13 @@ export const ClashPortViewer = forwardRef<DialogRef>((props, ref) => {
|
||||
verge?.verge_redir_port ?? clashInfo?.redir_port ?? 7895
|
||||
);
|
||||
const [redirEnabled, setRedirEnabled] = useState(
|
||||
verge?.verge_redir_enabled ?? true
|
||||
verge?.verge_redir_enabled ?? false
|
||||
);
|
||||
const [tproxyPort, setTproxyPort] = useState(
|
||||
verge?.verge_tproxy_port ?? clashInfo?.tproxy_port ?? 7896
|
||||
);
|
||||
const [tproxyEnabled, setTproxyEnabled] = useState(
|
||||
verge?.verge_tproxy_enabled ?? true
|
||||
verge?.verge_tproxy_enabled ?? false
|
||||
);
|
||||
const [mixedPort, setMixedPort] = useState(
|
||||
verge?.verge_mixed_port ?? clashInfo?.mixed_port ?? 7897
|
||||
@@ -34,26 +34,26 @@ export const ClashPortViewer = forwardRef<DialogRef>((props, ref) => {
|
||||
verge?.verge_socks_port ?? clashInfo?.socks_port ?? 7898
|
||||
);
|
||||
const [socksEnabled, setSocksEnabled] = useState(
|
||||
verge?.verge_socks_enabled ?? true
|
||||
verge?.verge_socks_enabled ?? false
|
||||
);
|
||||
const [port, setPort] = useState(
|
||||
verge?.verge_port ?? clashInfo?.port ?? 7899
|
||||
);
|
||||
const [httpEnabled, setHttpEnabled] = useState(
|
||||
verge?.verge_http_enabled ?? true
|
||||
verge?.verge_http_enabled ?? false
|
||||
);
|
||||
|
||||
useImperativeHandle(ref, () => ({
|
||||
open: () => {
|
||||
if (verge?.verge_redir_port) setRedirPort(verge?.verge_redir_port);
|
||||
setRedirEnabled(verge?.verge_redir_enabled ?? true);
|
||||
setRedirEnabled(verge?.verge_redir_enabled ?? false);
|
||||
if (verge?.verge_tproxy_port) setTproxyPort(verge?.verge_tproxy_port);
|
||||
setTproxyEnabled(verge?.verge_tproxy_enabled ?? true);
|
||||
setTproxyEnabled(verge?.verge_tproxy_enabled ?? false);
|
||||
if (verge?.verge_mixed_port) setMixedPort(verge?.verge_mixed_port);
|
||||
if (verge?.verge_socks_port) setSocksPort(verge?.verge_socks_port);
|
||||
setSocksEnabled(verge?.verge_socks_enabled ?? true);
|
||||
setSocksEnabled(verge?.verge_socks_enabled ?? false);
|
||||
if (verge?.verge_port) setPort(verge?.verge_port);
|
||||
setHttpEnabled(verge?.verge_http_enabled ?? true);
|
||||
setHttpEnabled(verge?.verge_http_enabled ?? false);
|
||||
setOpen(true);
|
||||
},
|
||||
close: () => setOpen(false),
|
||||
|
||||
@@ -61,11 +61,12 @@
|
||||
"No Resolve": "No Resolve",
|
||||
"Prepend Rule": "Prepend Rule",
|
||||
"Append Rule": "Append Rule",
|
||||
"Delete Rule": "Delete Rule",
|
||||
"Prepend Group": "Prepend Group",
|
||||
"Append Group": "Append Group",
|
||||
"Rule Condition Required": "Rule Condition Required",
|
||||
"Invalid Rule": "Invalid Rule",
|
||||
"Advanced": "Advanced",
|
||||
"Visible": "Visible",
|
||||
"Visualization": "Visualization",
|
||||
"DOMAIN": "Matches the full domain name",
|
||||
"DOMAIN-SUFFIX": "Matches the domain suffix",
|
||||
"DOMAIN-KEYWORD": "Matches the domain keyword",
|
||||
@@ -104,6 +105,25 @@
|
||||
"REJECT-DROP": "Discards requests",
|
||||
"PASS": "Skips this rule when matched",
|
||||
"Edit Groups": "Edit Proxy Groups",
|
||||
"Group Type": "Group Type",
|
||||
"Group Name": "Group Name",
|
||||
"Use Proxies": "Use Proxies",
|
||||
"Use Provider": "Use Provider",
|
||||
"Health Check Url": "Health Check Url",
|
||||
"Interval": "Interval",
|
||||
"Lazy": "Lazy",
|
||||
"Timeout": "Timeout",
|
||||
"Max Failed Times": "Max Failed Times",
|
||||
"Interface Name": "Interface Name",
|
||||
"Routing Mark": "Routing Mark",
|
||||
"Include All": "Include All Proxies and Providers",
|
||||
"Include All Providers": "Include All Providers",
|
||||
"Include All Proxies": "Include All Proxies",
|
||||
"Exclude Filter": "Exclude Filter",
|
||||
"Exclude Type": "Exclude Type",
|
||||
"Expected Status": "Expected Status",
|
||||
"Disable UDP": "Disable UDP",
|
||||
"Hidden": "Hidden",
|
||||
"Extend Config": "Extend Config",
|
||||
"Extend Script": "Extend Script",
|
||||
"Global Merge": "Global Extend Config",
|
||||
|
||||
@@ -61,9 +61,12 @@
|
||||
"No Resolve": "بدون حل",
|
||||
"Prepend Rule": "اضافه کردن قانون به ابتدا",
|
||||
"Append Rule": "اضافه کردن قانون به انتها",
|
||||
"Delete Rule": "حذف قانون",
|
||||
"Prepend Group": "اضافه کردن گروه به ابتدا",
|
||||
"Append Group": "اضافه کردن گروه به انتها",
|
||||
"Rule Condition Required": "شرط قانون الزامی است",
|
||||
"Invalid Rule": "قانون نامعتبر",
|
||||
"Advanced": "پیشرفته",
|
||||
"Visualization": "تجسم",
|
||||
"DOMAIN": "مطابقت با نام کامل دامنه",
|
||||
"DOMAIN-SUFFIX": "مطابقت با پسوند دامنه",
|
||||
"DOMAIN-KEYWORD": "مطابقت با کلمه کلیدی دامنه",
|
||||
@@ -102,6 +105,25 @@
|
||||
"REJECT-DROP": "درخواستها را نادیده میگیرد",
|
||||
"PASS": "این قانون را در صورت تطابق نادیده میگیرد",
|
||||
"Edit Groups": "ویرایش گروههای پروکسی",
|
||||
"Group Type": "نوع گروه",
|
||||
"Group Name": "نام گروه",
|
||||
"Use Proxies": "استفاده از پروکسیها",
|
||||
"Use Provider": "استفاده از ارائهدهنده",
|
||||
"Health Check Url": "آدرس بررسی سلامت",
|
||||
"Interval": "فاصله زمانی",
|
||||
"Lazy": "تنبل",
|
||||
"Timeout": "زمان قطع",
|
||||
"Max Failed Times": "حداکثر تعداد شکستها",
|
||||
"Interface Name": "نام رابط",
|
||||
"Routing Mark": "علامت مسیریابی",
|
||||
"Include All": "شامل همه پروکسیها و ارائهدهندهها",
|
||||
"Include All Providers": "شامل همه ارائهدهندهها",
|
||||
"Include All Proxies": "شامل همه پروکسیها",
|
||||
"Exclude Filter": "فیلتر استثناء",
|
||||
"Exclude Type": "نوع استثناء",
|
||||
"Expected Status": "وضعیت مورد انتظار",
|
||||
"Disable UDP": "غیرفعال کردن UDP",
|
||||
"Hidden": "مخفی",
|
||||
"Extend Config": "توسعه پیکربندی",
|
||||
"Extend Script": "ادغام اسکریپت",
|
||||
"Global Merge": "تنظیمات گستردهی سراسری",
|
||||
|
||||
@@ -61,9 +61,12 @@
|
||||
"No Resolve": "Без разрешения",
|
||||
"Prepend Rule": "Добавить правило в начало",
|
||||
"Append Rule": "Добавить правило в конец",
|
||||
"Delete Rule": "Удалить правило",
|
||||
"Prepend Group": "Добавить группу в начало",
|
||||
"Append Group": "Добавить группу в конец",
|
||||
"Rule Condition Required": "Требуется условие правила",
|
||||
"Invalid Rule": "Недействительное правило",
|
||||
"Advanced": "Дополнительно",
|
||||
"Visualization": "Визуализация",
|
||||
"DOMAIN": "Соответствует полному доменному имени",
|
||||
"DOMAIN-SUFFIX": "Соответствует суффиксу домена",
|
||||
"DOMAIN-KEYWORD": "Соответствует ключевому слову домена",
|
||||
@@ -102,6 +105,25 @@
|
||||
"REJECT-DROP": "Отклоняет запросы",
|
||||
"PASS": "Пропускает это правило при совпадении",
|
||||
"Edit Groups": "Редактировать группы прокси",
|
||||
"Group Type": "Тип группы",
|
||||
"Group Name": "Имя группы",
|
||||
"Use Proxies": "Использовать прокси",
|
||||
"Use Provider": "Использовать провайдера",
|
||||
"Health Check Url": "URL проверки здоровья",
|
||||
"Interval": "Интервал",
|
||||
"Lazy": "Ленивый",
|
||||
"Timeout": "Таймаут",
|
||||
"Max Failed Times": "Максимальное количество неудач",
|
||||
"Interface Name": "Имя интерфейса",
|
||||
"Routing Mark": "Марка маршрутизации",
|
||||
"Include All": "Включить все прокси и провайдеры",
|
||||
"Include All Providers": "Включить всех провайдеров",
|
||||
"Include All Proxies": "Включить все прокси",
|
||||
"Exclude Filter": "Исключить фильтр",
|
||||
"Exclude Type": "Тип исключения",
|
||||
"Expected Status": "Ожидаемый статус",
|
||||
"Disable UDP": "Отключить UDP",
|
||||
"Hidden": "Скрытый",
|
||||
"Extend Config": "Изменить Merge.",
|
||||
"Extend Script": "Изменить Script",
|
||||
"Global Merge": "Глобальный расширенный Настройки",
|
||||
|
||||
@@ -61,11 +61,12 @@
|
||||
"No Resolve": "跳过DNS解析",
|
||||
"Prepend Rule": "添加前置规则",
|
||||
"Append Rule": "添加后置规则",
|
||||
"Delete Rule": "删除规则",
|
||||
"Prepend Group": "添加前置代理组",
|
||||
"Append Group": "添加后置代理组",
|
||||
"Rule Condition Required": "规则条件缺失",
|
||||
"Invalid Rule": "无效规则",
|
||||
"Advanced": "高级",
|
||||
"Visible": "可视化",
|
||||
"Visualization": "可视化",
|
||||
"DOMAIN": "匹配完整域名",
|
||||
"DOMAIN-SUFFIX": "匹配域名后缀",
|
||||
"DOMAIN-KEYWORD": "匹配域名关键字",
|
||||
@@ -104,6 +105,25 @@
|
||||
"REJECT-DROP": "抛弃请求",
|
||||
"PASS": "跳过此规则",
|
||||
"Edit Groups": "编辑代理组",
|
||||
"Group Type": "代理组类型",
|
||||
"Group Name": "代理组组名",
|
||||
"Use Proxies": "引入代理",
|
||||
"Use Provider": "引入代理集合",
|
||||
"Health Check Url": "健康检查测试地址",
|
||||
"Interval": "检查间隔",
|
||||
"Lazy": "懒惰状态",
|
||||
"Timeout": "超时时间",
|
||||
"Max Failed Times": "最大失败次数",
|
||||
"Interface Name": "出站接口",
|
||||
"Routing Mark": "路由标记",
|
||||
"Include All": "引入所有出站代理以及代理集合",
|
||||
"Include All Providers": "引入所有代理集合",
|
||||
"Include All Proxies": "引入所有出站代理",
|
||||
"Exclude Filter": "排除节点",
|
||||
"Exclude Type": "排除节点类型",
|
||||
"Expected Status": "期望状态码",
|
||||
"Disable UDP": "禁用UDP",
|
||||
"Hidden": "隐藏该组",
|
||||
"Extend Config": "扩展配置",
|
||||
"Extend Script": "扩展脚本",
|
||||
"Global Merge": "全局扩展配置",
|
||||
|
||||
59
clash-verge-rev/src/services/types.d.ts
vendored
59
clash-verge-rev/src/services/types.d.ts
vendored
@@ -199,9 +199,62 @@ interface IVergeTestItem {
|
||||
}
|
||||
|
||||
interface ISeqProfileConfig {
|
||||
prepend: string[];
|
||||
append: string[];
|
||||
delete: string[];
|
||||
prepend: [];
|
||||
append: [];
|
||||
delete: [];
|
||||
}
|
||||
|
||||
interface IProxyGroupConfig {
|
||||
name: string;
|
||||
type: "select" | "url-test" | "fallback" | "load-balance" | "relay";
|
||||
proxies?: string[];
|
||||
use?: string[];
|
||||
url?: string;
|
||||
interval?: number;
|
||||
lazy?: boolean;
|
||||
timeout?: number;
|
||||
"max-failed-times"?: number;
|
||||
"disable-udp"?: boolean;
|
||||
"interface-name": string;
|
||||
"routing-mark"?: number;
|
||||
"include-all"?: boolean;
|
||||
"include-all-proxies"?: boolean;
|
||||
"include-all-providers"?: boolean;
|
||||
filter?: string;
|
||||
"exclude-filter"?: string;
|
||||
"exclude-type"?: string;
|
||||
"expected-status"?: number;
|
||||
hidden?: boolean;
|
||||
icon?: string;
|
||||
}
|
||||
|
||||
interface IProxyConfig {
|
||||
name: string;
|
||||
type:
|
||||
| "ss"
|
||||
| "ssr"
|
||||
| "direct"
|
||||
| "dns"
|
||||
| "snell"
|
||||
| "http"
|
||||
| "trojan"
|
||||
| "hysteria"
|
||||
| "hysteria2"
|
||||
| "tuic"
|
||||
| "wireguard"
|
||||
| "ssh"
|
||||
| "socks5"
|
||||
| "vmess"
|
||||
| "vless";
|
||||
server: string;
|
||||
port: number;
|
||||
"ip-version"?: string;
|
||||
udp?: boolean;
|
||||
"interface-name"?: string;
|
||||
"routing-mark"?: number;
|
||||
tfo?: boolean;
|
||||
mptcp?: boolean;
|
||||
"dialer-proxy"?: string;
|
||||
}
|
||||
|
||||
interface IVergeConfig {
|
||||
|
||||
@@ -10,10 +10,11 @@ require (
|
||||
github.com/go-ping/ping v1.1.0
|
||||
github.com/gobwas/ws v1.4.0
|
||||
github.com/hashicorp/go-retryablehttp v0.7.7
|
||||
github.com/juju/ratelimit v1.0.2
|
||||
github.com/labstack/echo/v4 v4.12.0
|
||||
github.com/prometheus/client_golang v1.19.1
|
||||
github.com/prometheus/client_model v0.6.1
|
||||
github.com/prometheus/common v0.54.0
|
||||
github.com/prometheus/common v0.55.0
|
||||
github.com/prometheus/node_exporter v1.8.1
|
||||
github.com/sagernet/sing v0.4.1
|
||||
github.com/sagernet/sing-box v1.9.3
|
||||
@@ -24,7 +25,7 @@ require (
|
||||
go.uber.org/atomic v1.11.0
|
||||
go.uber.org/zap v1.27.0
|
||||
golang.org/x/time v0.5.0
|
||||
google.golang.org/grpc v1.64.0
|
||||
google.golang.org/grpc v1.65.0
|
||||
gopkg.in/yaml.v3 v3.0.1
|
||||
)
|
||||
|
||||
@@ -65,7 +66,6 @@ require (
|
||||
github.com/illumos/go-kstat v0.0.0-20210513183136-173c9b0a9973 // indirect
|
||||
github.com/josharian/native v1.1.0 // indirect
|
||||
github.com/jsimonetti/rtnetlink v1.4.2 // indirect
|
||||
github.com/juju/ratelimit v1.0.2 // indirect
|
||||
github.com/klauspost/compress v1.17.8 // indirect
|
||||
github.com/klauspost/cpuid/v2 v2.2.7 // indirect
|
||||
github.com/labstack/gommon v0.4.2 // indirect
|
||||
@@ -80,6 +80,7 @@ require (
|
||||
github.com/mdlayher/socket v0.5.1 // indirect
|
||||
github.com/mdlayher/wifi v0.2.0 // indirect
|
||||
github.com/miekg/dns v1.1.61 // indirect
|
||||
github.com/munnerz/goautoneg v0.0.0-20191010083416-a7dc8b61c822 // indirect
|
||||
github.com/onsi/ginkgo/v2 v2.19.0 // indirect
|
||||
github.com/opencontainers/selinux v1.11.0 // indirect
|
||||
github.com/oschwald/maxminddb-golang v1.12.0 // indirect
|
||||
@@ -87,7 +88,7 @@ require (
|
||||
github.com/pires/go-proxyproto v0.7.0 // indirect
|
||||
github.com/pmezard/go-difflib v1.0.0 // indirect
|
||||
github.com/prometheus-community/go-runit v0.1.0 // indirect
|
||||
github.com/prometheus/procfs v0.15.0 // indirect
|
||||
github.com/prometheus/procfs v0.15.1 // indirect
|
||||
github.com/quic-go/quic-go v0.45.0 // indirect
|
||||
github.com/refraction-networking/utls v1.6.6 // indirect
|
||||
github.com/riobard/go-bloom v0.0.0-20200614022211-cdc8013cb5b3 // indirect
|
||||
|
||||
14
echo/go.sum
14
echo/go.sum
@@ -188,6 +188,8 @@ github.com/miekg/dns v1.1.61 h1:nLxbwF3XxhwVSm8g9Dghm9MHPaUZuqhPiGL+675ZmEs=
|
||||
github.com/miekg/dns v1.1.61/go.mod h1:mnAarhS3nWaW+NVP2wTkYVIZyHNJ098SJZUki3eykwQ=
|
||||
github.com/modern-go/concurrent v0.0.0-20180306012644-bacd9c7ef1dd/go.mod h1:6dJC0mAP4ikYIbvyc7fijjWJddQyLn8Ig3JB5CqoB9Q=
|
||||
github.com/modern-go/reflect2 v1.0.1/go.mod h1:bx2lNnkwVCuqBIxFjflWJWanXIb3RllmbCylyMrvgv0=
|
||||
github.com/munnerz/goautoneg v0.0.0-20191010083416-a7dc8b61c822 h1:C3w9PqII01/Oq1c1nUAm88MOHcQC9l5mIlSMApZMrHA=
|
||||
github.com/munnerz/goautoneg v0.0.0-20191010083416-a7dc8b61c822/go.mod h1:+n7T8mK8HuQTcFwEeznm/DIxMOiR9yIdICNftLE1DvQ=
|
||||
github.com/neelance/astrewrite v0.0.0-20160511093645-99348263ae86/go.mod h1:kHJEU3ofeGjhHklVoIGuVj85JJwZ6kWPaJwCIxgnFmo=
|
||||
github.com/neelance/sourcemap v0.0.0-20151028013722-8c68805598ab/go.mod h1:Qr6/a/Q4r9LP1IltGz7tA7iOK1WonHEYhu1HRBA7ZiM=
|
||||
github.com/onsi/ginkgo/v2 v2.19.0 h1:9Cnnf7UHo57Hy3k6/m5k3dRfGTMXGvxhHFvkDTCTpvA=
|
||||
@@ -219,13 +221,13 @@ github.com/prometheus/client_model v0.0.0-20180712105110-5c3871d89910/go.mod h1:
|
||||
github.com/prometheus/client_model v0.6.1 h1:ZKSh/rekM+n3CeS952MLRAdFwIKqeY8b62p8ais2e9E=
|
||||
github.com/prometheus/client_model v0.6.1/go.mod h1:OrxVMOVHjw3lKMa8+x6HeMGkHMQyHDk9E3jmP2AmGiY=
|
||||
github.com/prometheus/common v0.0.0-20180801064454-c7de2306084e/go.mod h1:daVV7qP5qjZbuso7PdcryaAu0sAZbrN9i7WWcTMWvro=
|
||||
github.com/prometheus/common v0.54.0 h1:ZlZy0BgJhTwVZUn7dLOkwCZHUkrAqd3WYtcFCWnM1D8=
|
||||
github.com/prometheus/common v0.54.0/go.mod h1:/TQgMJP5CuVYveyT7n/0Ix8yLNNXy9yRSkhnLTHPDIQ=
|
||||
github.com/prometheus/common v0.55.0 h1:KEi6DK7lXW/m7Ig5i47x0vRzuBsHuvJdi5ee6Y3G1dc=
|
||||
github.com/prometheus/common v0.55.0/go.mod h1:2SECS4xJG1kd8XF9IcM1gMX6510RAEL65zxzNImwdc8=
|
||||
github.com/prometheus/node_exporter v1.8.1 h1:qYIN+ghn7kEggHe4pcIRp9oXkljU8ARWyEHBr286RPY=
|
||||
github.com/prometheus/node_exporter v1.8.1/go.mod h1:rJMoAQMglUjAZ7nggHnRuwfJ0hKUVW6+Gv+IaMxh6js=
|
||||
github.com/prometheus/procfs v0.0.0-20180725123919-05ee40e3a273/go.mod h1:c3At6R/oaqEKCNdg8wHV1ftS6bRYblBhIjjI8uT2IGk=
|
||||
github.com/prometheus/procfs v0.15.0 h1:A82kmvXJq2jTu5YUhSGNlYoxh85zLnKgPz4bMZgI5Ek=
|
||||
github.com/prometheus/procfs v0.15.0/go.mod h1:Y0RJ/Y5g5wJpkTisOtqwDSo4HwhGmLB4VQSw2sQJLHk=
|
||||
github.com/prometheus/procfs v0.15.1 h1:YagwOFzUgYfKKHX6Dr+sHT7km/hxC76UB0learggepc=
|
||||
github.com/prometheus/procfs v0.15.1/go.mod h1:fB45yRUv8NstnjriLhBQLuOUt+WW4BsoGhij/e3PBqk=
|
||||
github.com/quic-go/qpack v0.4.0 h1:Cr9BXA1sQS2SmDUWjSofMPNKmvF6IiIfDRmgU0w1ZCo=
|
||||
github.com/quic-go/qpack v0.4.0/go.mod h1:UZVnYIfi5GRk+zI9UMaCPsmZ2xKJP7XBUvVyT1Knj9A=
|
||||
github.com/quic-go/qtls-go1-20 v0.4.1 h1:D33340mCNDAIKBqXuAvexTNMUByrYmFYVfKfDN5nfFs=
|
||||
@@ -429,8 +431,8 @@ google.golang.org/grpc v1.14.0/go.mod h1:yo6s7OP7yaDglbqo1J04qKzAhqBH6lvTonzMVmE
|
||||
google.golang.org/grpc v1.16.0/go.mod h1:0JHn/cJsOMiMfNA9+DeHDlAU7KAAB5GDlYFpa9MZMio=
|
||||
google.golang.org/grpc v1.17.0/go.mod h1:6QZJwpn2B+Zp71q/5VxRsJ6NXXVCE5NRUHRo+f3cWCs=
|
||||
google.golang.org/grpc v1.19.0/go.mod h1:mqu4LbDTu4XGKhr4mRzUsmM4RtVoemTSY81AxZiDr8c=
|
||||
google.golang.org/grpc v1.64.0 h1:KH3VH9y/MgNQg1dE7b3XfVK0GsPSIzJwdF617gUSbvY=
|
||||
google.golang.org/grpc v1.64.0/go.mod h1:oxjF8E3FBnjp+/gVFYdWacaLDx9na1aqy9oovLpxQYg=
|
||||
google.golang.org/grpc v1.65.0 h1:bs/cUb4lp1G5iImFFd3u5ixQzweKizoZJAwBNLR42lc=
|
||||
google.golang.org/grpc v1.65.0/go.mod h1:WgYC2ypjlB0EiQi6wdKixMqukr6lBc0Vo+oOgjrM5ZQ=
|
||||
google.golang.org/protobuf v1.34.2 h1:6xV6lTsCfpGD21XK49h7MhtcApnLqkfYgPcdHftf6hg=
|
||||
google.golang.org/protobuf v1.34.2/go.mod h1:qYOHts0dSfpeUzUFpOMr/WGzszTmLH+DiWniOlNbLDw=
|
||||
gopkg.in/check.v1 v0.0.0-20161208181325-20d25e280405/go.mod h1:Co6ibVJAznAaIkqp8huTwlJQCZ016jof/cbN4VW5Yz0=
|
||||
|
||||
@@ -194,6 +194,7 @@ These two concepts are notable: `input` and `output`. The `input` is the data so
|
||||
支持的 `input` 输入格式：
|
||||
|
||||
- **text**：纯文本 IP 和 CIDR（例如：`1.1.1.1` 或 `1.0.0.0/24`）
|
||||
- **stdin**：从 standard input 获取纯文本 IP 和 CIDR（例如：`1.1.1.1` 或 `1.0.0.0/24`）
|
||||
- **private**：局域网和私有网络 CIDR（例如：`192.168.0.0/16` 和 `127.0.0.0/8`）
|
||||
- **cutter**：用于裁剪前置步骤中的数据
|
||||
- **v2rayGeoIPDat**：V2Ray GeoIP dat 格式（`geoip.dat`）
|
||||
@@ -207,6 +208,7 @@ These two concepts are notable: `input` and `output`. The `input` is the data so
|
||||
支持的 `output` 输出格式：
|
||||
|
||||
- **text**：纯文本 CIDR（例如：`1.0.0.0/24`）
|
||||
- **stdout**：将纯文本 CIDR 输出到 standard output（例如：`1.0.0.0/24`）
|
||||
- **v2rayGeoIPDat**：V2Ray GeoIP dat 格式（`geoip.dat`，适用于 [V2Ray](https://github.com/v2fly/v2ray-core)、[Xray-core](https://github.com/XTLS/Xray-core) 和 [Trojan-Go](https://github.com/p4gefau1t/trojan-go)）
|
||||
- **maxmindMMDB**：MaxMind mmdb 数据格式（`GeoLite2-Country.mmdb`，适用于 [Clash](https://github.com/Dreamacro/clash) 和 [Leaf](https://github.com/eycorsican/leaf)）
|
||||
- **singboxSRS**：sing-box SRS 格式（`geoip-cn.srs`，适用于 [sing-box](https://github.com/SagerNet/sing-box)）
|
||||
@@ -261,6 +263,7 @@ All available input formats:
|
||||
- maxmindGeoLite2CountryCSV (Convert MaxMind GeoLite2 country CSV data to other formats)
|
||||
- singboxSRS (Convert sing-box SRS data to other formats)
|
||||
- private (Convert LAN and private network CIDR to other formats)
|
||||
- stdin (Accept plaintext IP & CIDR from standard input, separated by newline)
|
||||
- text (Convert plaintext IP & CIDR to other formats)
|
||||
- clashRuleSetClassical (Convert classical type of Clash RuleSet to other formats (just processing IP & CIDR lines))
|
||||
- clashRuleSet (Convert ipcidr type of Clash RuleSet to other formats)
|
||||
@@ -275,6 +278,7 @@ All available output formats:
|
||||
- clashRuleSet (Convert data to ipcidr type of Clash RuleSet)
|
||||
- surgeRuleSet (Convert data to Surge RuleSet)
|
||||
- text (Convert data to plaintext CIDR format)
|
||||
- stdout (Convert data to plaintext CIDR format and output to standard output)
|
||||
```
|
||||
|
||||
## License
|
||||
|
||||
@@ -122,6 +122,29 @@
|
||||
"onlyIPType": "ipv4"
|
||||
}
|
||||
},
|
||||
{
|
||||
"type": "stdin",
|
||||
"action": "add",
|
||||
"args": {
|
||||
"name": "cn"
|
||||
}
|
||||
},
|
||||
{
|
||||
"type": "stdin",
|
||||
"action": "add",
|
||||
"args": {
|
||||
"name": "cn",
|
||||
"onlyIPType": "ipv4"
|
||||
}
|
||||
},
|
||||
{
|
||||
"type": "stdin",
|
||||
"action": "remove",
|
||||
"args": {
|
||||
"name": "cn",
|
||||
"onlyIPType": "ipv6"
|
||||
}
|
||||
},
|
||||
{
|
||||
"type": "private",
|
||||
"action": "add"
|
||||
@@ -220,6 +243,32 @@
|
||||
"onlyIPType": "ipv6"
|
||||
}
|
||||
},
|
||||
{
|
||||
"type": "stdout",
|
||||
"action": "output"
|
||||
},
|
||||
{
|
||||
"type": "stdout",
|
||||
"action": "output",
|
||||
"args": {
|
||||
"wantedList": ["cn", "us", "private"]
|
||||
}
|
||||
},
|
||||
{
|
||||
"type": "stdout",
|
||||
"action": "output",
|
||||
"args": {
|
||||
"onlyIPType": "ipv6"
|
||||
}
|
||||
},
|
||||
{
|
||||
"type": "stdout",
|
||||
"action": "output",
|
||||
"args": {
|
||||
"wantedList": ["cn", "us", "private"],
|
||||
"onlyIPType": "ipv6"
|
||||
}
|
||||
},
|
||||
{
|
||||
"type": "clashRuleSetClassical",
|
||||
"action": "output",
|
||||
|
||||
@@ -4,6 +4,7 @@ import (
|
||||
"fmt"
|
||||
"io"
|
||||
"net/http"
|
||||
"sort"
|
||||
"strings"
|
||||
)
|
||||
|
||||
@@ -14,8 +15,13 @@ var (
|
||||
|
||||
func ListInputConverter() {
|
||||
fmt.Println("All available input formats:")
|
||||
for name, ic := range inputConverterMap {
|
||||
fmt.Printf(" - %s (%s)\n", name, ic.GetDescription())
|
||||
keys := make([]string, 0, len(inputConverterMap))
|
||||
for name := range inputConverterMap {
|
||||
keys = append(keys, name)
|
||||
}
|
||||
sort.Strings(keys)
|
||||
for _, name := range keys {
|
||||
fmt.Printf(" - %s (%s)\n", name, inputConverterMap[name].GetDescription())
|
||||
}
|
||||
}
|
||||
|
||||
@@ -30,8 +36,13 @@ func RegisterInputConverter(name string, c InputConverter) error {
|
||||
|
||||
func ListOutputConverter() {
|
||||
fmt.Println("All available output formats:")
|
||||
for name, oc := range outputConverterMap {
|
||||
fmt.Printf(" - %s (%s)\n", name, oc.GetDescription())
|
||||
keys := make([]string, 0, len(outputConverterMap))
|
||||
for name := range outputConverterMap {
|
||||
keys = append(keys, name)
|
||||
}
|
||||
sort.Strings(keys)
|
||||
for _, name := range keys {
|
||||
fmt.Printf(" - %s (%s)\n", name, outputConverterMap[name].GetDescription())
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -85,7 +85,7 @@ func (g *maxmindMMDBIn) Input(container lib.Container) (lib.Container, error) {
|
||||
var fd io.ReadCloser
|
||||
var err error
|
||||
switch {
|
||||
case strings.HasPrefix(g.URI, "http://"), strings.HasPrefix(g.URI, "https://"):
|
||||
case strings.HasPrefix(strings.ToLower(g.URI), "http://"), strings.HasPrefix(strings.ToLower(g.URI), "https://"):
|
||||
fd, err = g.downloadFile(g.URI)
|
||||
default:
|
||||
fd, err = os.Open(g.URI)
|
||||
|
||||
@@ -84,7 +84,7 @@ func (t *textIn) Input(container lib.Container) (lib.Container, error) {
|
||||
err = t.walkDir(t.InputDir, entries)
|
||||
case t.Name != "" && t.URI != "":
|
||||
switch {
|
||||
case strings.HasPrefix(t.URI, "http://"), strings.HasPrefix(t.URI, "https://"):
|
||||
case strings.HasPrefix(strings.ToLower(t.URI), "http://"), strings.HasPrefix(strings.ToLower(t.URI), "https://"):
|
||||
err = t.walkRemoteFile(t.URI, t.Name, entries)
|
||||
default:
|
||||
err = t.walkLocalFile(t.URI, t.Name, entries)
|
||||
|
||||
@@ -92,7 +92,7 @@ func (s *srsIn) Input(container lib.Container) (lib.Container, error) {
|
||||
err = s.walkDir(s.InputDir, entries)
|
||||
case s.Name != "" && s.URI != "":
|
||||
switch {
|
||||
case strings.HasPrefix(s.URI, "http://"), strings.HasPrefix(s.URI, "https://"):
|
||||
case strings.HasPrefix(strings.ToLower(s.URI), "http://"), strings.HasPrefix(strings.ToLower(s.URI), "https://"):
|
||||
err = s.walkRemoteFile(s.URI, s.Name, entries)
|
||||
default:
|
||||
err = s.walkLocalFile(s.URI, s.Name, entries)
|
||||
|
||||
113
geoip/plugin/special/stdin.go
Normal file
113
geoip/plugin/special/stdin.go
Normal file
@@ -0,0 +1,113 @@
|
||||
package special
|
||||
|
||||
import (
|
||||
"bufio"
|
||||
"encoding/json"
|
||||
"os"
|
||||
"strings"
|
||||
|
||||
"github.com/Loyalsoldier/geoip/lib"
|
||||
)
|
||||
|
||||
const (
|
||||
typeStdin = "stdin"
|
||||
descStdin = "Accept plaintext IP & CIDR from standard input, separated by newline"
|
||||
)
|
||||
|
||||
func init() {
|
||||
lib.RegisterInputConfigCreator(typeStdin, func(action lib.Action, data json.RawMessage) (lib.InputConverter, error) {
|
||||
return newStdin(action, data)
|
||||
})
|
||||
lib.RegisterInputConverter(typeStdin, &stdin{
|
||||
Description: descStdin,
|
||||
})
|
||||
}
|
||||
|
||||
func newStdin(action lib.Action, data json.RawMessage) (lib.InputConverter, error) {
|
||||
var tmp struct {
|
||||
Name string `json:"name"`
|
||||
OnlyIPType lib.IPType `json:"onlyIPType"`
|
||||
}
|
||||
|
||||
if len(data) > 0 {
|
||||
if err := json.Unmarshal(data, &tmp); err != nil {
|
||||
return nil, err
|
||||
}
|
||||
}
|
||||
|
||||
return &stdin{
|
||||
Type: typeStdin,
|
||||
Action: action,
|
||||
Description: descStdin,
|
||||
Name: tmp.Name,
|
||||
OnlyIPType: tmp.OnlyIPType,
|
||||
}, nil
|
||||
}
|
||||
|
||||
type stdin struct {
|
||||
Type string
|
||||
Action lib.Action
|
||||
Description string
|
||||
Name string
|
||||
OnlyIPType lib.IPType
|
||||
}
|
||||
|
||||
func (s *stdin) GetType() string {
|
||||
return s.Type
|
||||
}
|
||||
|
||||
func (s *stdin) GetAction() lib.Action {
|
||||
return s.Action
|
||||
}
|
||||
|
||||
func (s *stdin) GetDescription() string {
|
||||
return s.Description
|
||||
}
|
||||
|
||||
func (s *stdin) Input(container lib.Container) (lib.Container, error) {
|
||||
entry := lib.NewEntry(s.Name)
|
||||
|
||||
scanner := bufio.NewScanner(os.Stdin)
|
||||
for scanner.Scan() {
|
||||
line := strings.TrimSpace(scanner.Text())
|
||||
if line == "" {
|
||||
continue
|
||||
}
|
||||
line, _, _ = strings.Cut(line, "#")
|
||||
line, _, _ = strings.Cut(line, "//")
|
||||
line, _, _ = strings.Cut(line, "/*")
|
||||
line = strings.TrimSpace(line)
|
||||
if line == "" {
|
||||
continue
|
||||
}
|
||||
|
||||
switch s.Action {
|
||||
case lib.ActionAdd:
|
||||
if err := entry.AddPrefix(line); err != nil {
|
||||
continue
|
||||
}
|
||||
case lib.ActionRemove:
|
||||
if err := entry.RemovePrefix(line); err != nil {
|
||||
continue
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if err := scanner.Err(); err != nil {
|
||||
return nil, err
|
||||
}
|
||||
|
||||
var ignoreIPType lib.IgnoreIPOption
|
||||
switch s.OnlyIPType {
|
||||
case lib.IPv4:
|
||||
ignoreIPType = lib.IgnoreIPv6
|
||||
case lib.IPv6:
|
||||
ignoreIPType = lib.IgnoreIPv4
|
||||
}
|
||||
|
||||
if err := container.Add(entry, ignoreIPType); err != nil {
|
||||
return nil, err
|
||||
}
|
||||
|
||||
return container, nil
|
||||
}
|
||||
128
geoip/plugin/special/stdout.go
Normal file
128
geoip/plugin/special/stdout.go
Normal file
@@ -0,0 +1,128 @@
|
||||
package special
|
||||
|
||||
import (
|
||||
"encoding/json"
|
||||
"errors"
|
||||
"io"
|
||||
"os"
|
||||
"strings"
|
||||
|
||||
"github.com/Loyalsoldier/geoip/lib"
|
||||
)
|
||||
|
||||
const (
|
||||
typeStdout = "stdout"
|
||||
descStdout = "Convert data to plaintext CIDR format and output to standard output"
|
||||
)
|
||||
|
||||
func init() {
|
||||
lib.RegisterOutputConfigCreator(typeStdout, func(action lib.Action, data json.RawMessage) (lib.OutputConverter, error) {
|
||||
return newStdout(action, data)
|
||||
})
|
||||
lib.RegisterOutputConverter(typeStdout, &stdout{
|
||||
Description: descStdout,
|
||||
})
|
||||
}
|
||||
|
||||
func newStdout(action lib.Action, data json.RawMessage) (lib.OutputConverter, error) {
|
||||
var tmp struct {
|
||||
Want []string `json:"wantedList"`
|
||||
OnlyIPType lib.IPType `json:"onlyIPType"`
|
||||
}
|
||||
|
||||
if len(data) > 0 {
|
||||
if err := json.Unmarshal(data, &tmp); err != nil {
|
||||
return nil, err
|
||||
}
|
||||
}
|
||||
|
||||
return &stdout{
|
||||
Type: typeStdout,
|
||||
Action: action,
|
||||
Description: descStdout,
|
||||
Want: tmp.Want,
|
||||
OnlyIPType: tmp.OnlyIPType,
|
||||
}, nil
|
||||
}
|
||||
|
||||
type stdout struct {
|
||||
Type string
|
||||
Action lib.Action
|
||||
Description string
|
||||
Want []string
|
||||
OnlyIPType lib.IPType
|
||||
}
|
||||
|
||||
func (s *stdout) GetType() string {
|
||||
return s.Type
|
||||
}
|
||||
|
||||
func (s *stdout) GetAction() lib.Action {
|
||||
return s.Action
|
||||
}
|
||||
|
||||
func (s *stdout) GetDescription() string {
|
||||
return s.Description
|
||||
}
|
||||
|
||||
func (s *stdout) Output(container lib.Container) error {
|
||||
// Filter want list
|
||||
wantList := make(map[string]bool)
|
||||
for _, want := range s.Want {
|
||||
if want = strings.ToUpper(strings.TrimSpace(want)); want != "" {
|
||||
wantList[want] = true
|
||||
}
|
||||
}
|
||||
|
||||
switch len(wantList) {
|
||||
case 0:
|
||||
for entry := range container.Loop() {
|
||||
cidrList, err := s.generateCIDRList(entry)
|
||||
if err != nil {
|
||||
continue
|
||||
}
|
||||
for _, cidr := range cidrList {
|
||||
io.WriteString(os.Stdout, cidr+"\n")
|
||||
}
|
||||
}
|
||||
default:
|
||||
for name := range wantList {
|
||||
entry, found := container.GetEntry(name)
|
||||
if !found {
|
||||
continue
|
||||
}
|
||||
|
||||
cidrList, err := s.generateCIDRList(entry)
|
||||
if err != nil {
|
||||
continue
|
||||
}
|
||||
for _, cidr := range cidrList {
|
||||
io.WriteString(os.Stdout, cidr+"\n")
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return nil
|
||||
}
|
||||
|
||||
func (s *stdout) generateCIDRList(entry *lib.Entry) ([]string, error) {
|
||||
var entryList []string
|
||||
var err error
|
||||
switch s.OnlyIPType {
|
||||
case lib.IPv4:
|
||||
entryList, err = entry.MarshalText(lib.IgnoreIPv6)
|
||||
case lib.IPv6:
|
||||
entryList, err = entry.MarshalText(lib.IgnoreIPv4)
|
||||
default:
|
||||
entryList, err = entry.MarshalText()
|
||||
}
|
||||
if err != nil {
|
||||
return nil, err
|
||||
}
|
||||
|
||||
if len(entryList) == 0 {
|
||||
return nil, errors.New("empty CIDR list")
|
||||
}
|
||||
|
||||
return entryList, nil
|
||||
}
|
||||
@@ -81,7 +81,7 @@ func (g *geoIPDatIn) Input(container lib.Container) (lib.Container, error) {
|
||||
var err error
|
||||
|
||||
switch {
|
||||
case strings.HasPrefix(g.URI, "http://"), strings.HasPrefix(g.URI, "https://"):
|
||||
case strings.HasPrefix(strings.ToLower(g.URI), "http://"), strings.HasPrefix(strings.ToLower(g.URI), "https://"):
|
||||
err = g.walkRemoteFile(g.URI, entries)
|
||||
default:
|
||||
err = g.walkLocalFile(g.URI, entries)
|
||||
|
||||
@@ -15,9 +15,9 @@ PKG_SOURCE_VERSION:=5b509e80384ab019ac11aa90c81ec0dbb5b0d7f2
|
||||
PKG_MIRROR_HASH:=6fc25df4d28becd010ff4971b23731c08b53e69381a9e4c868091899712f78a9
|
||||
PATCH_DIR:=./patches-5.4
|
||||
else ifndef ($(filter on,$(CONFIG_LINUX_6_1) $(CONFIG_LINUX_6_6)),)
|
||||
PKG_SOURCE_DATE:=2024-04-19
|
||||
PKG_SOURCE_VERSION:=1d0bd57e58899d9c526c7c25cbaa04dc4a0559bf
|
||||
PKG_MIRROR_HASH:=09e2256ca6efcc8375f96722f0aabe539b83e35fc93d4fec44b71a0efe3f7914
|
||||
PKG_SOURCE_DATE:=2024-05-17
|
||||
PKG_SOURCE_VERSION:=513c131c6309712a51502870b041f45b4bd6a6d4
|
||||
PKG_MIRROR_HASH:=9f5d7a846912e7deafa216c2aabb038ec58666ecbf8a394e947b144001994d78
|
||||
PATCH_DIR:=./patches-6.x
|
||||
else
|
||||
PKG_SOURCE_DATE:=2023-08-14
|
||||
|
||||
@@ -0,0 +1,195 @@
|
||||
From aa868357891cf4be8e7a1ca43edd1e335aa10710 Mon Sep 17 00:00:00 2001
|
||||
From: coolsnowwolf <coolsnowwolf@gmail.com>
|
||||
Date: Thu, 4 Jul 2024 13:24:22 +0800
|
||||
Subject: [PATCH] Revert "wifi: mt76: mt7925: add EHT radiotap support in
|
||||
monitor mode"
|
||||
|
||||
This reverts commit 1d6e4f7de8a6c93540bd8d616cb6b917d2ac400e.
|
||||
---
|
||||
mt76_connac.h | 2 --
|
||||
mt76_connac3_mac.c | 85 ----------------------------------------------
|
||||
mt76_connac3_mac.h | 22 ------------
|
||||
mt7925/mac.c | 15 ++------
|
||||
4 files changed, 2 insertions(+), 122 deletions(-)
|
||||
|
||||
diff --git a/mt76_connac.h b/mt76_connac.h
|
||||
index 445d0f0a..91987bdf 100644
|
||||
--- a/mt76_connac.h
|
||||
+++ b/mt76_connac.h
|
||||
@@ -451,6 +451,4 @@ void mt76_connac2_tx_token_put(struct mt76_dev *dev);
|
||||
/* connac3 */
|
||||
void mt76_connac3_mac_decode_he_radiotap(struct sk_buff *skb, __le32 *rxv,
|
||||
u8 mode);
|
||||
-void mt76_connac3_mac_decode_eht_radiotap(struct sk_buff *skb, __le32 *rxv,
|
||||
- u8 mode);
|
||||
#endif /* __MT76_CONNAC_H */
|
||||
diff --git a/mt76_connac3_mac.c b/mt76_connac3_mac.c
|
||||
index 92ad1ecf..73e9f283 100644
|
||||
--- a/mt76_connac3_mac.c
|
||||
+++ b/mt76_connac3_mac.c
|
||||
@@ -6,11 +6,8 @@
|
||||
#include "dma.h"
|
||||
|
||||
#define HE_BITS(f) cpu_to_le16(IEEE80211_RADIOTAP_HE_##f)
|
||||
-#define EHT_BITS(f) cpu_to_le32(IEEE80211_RADIOTAP_EHT_##f)
|
||||
#define HE_PREP(f, m, v) le16_encode_bits(le32_get_bits(v, MT_CRXV_HE_##m),\
|
||||
IEEE80211_RADIOTAP_HE_##f)
|
||||
-#define EHT_PREP(f, m, v) le32_encode_bits(le32_get_bits(v, MT_CRXV_EHT_##m),\
|
||||
- IEEE80211_RADIOTAP_EHT_##f)
|
||||
|
||||
static void
|
||||
mt76_connac3_mac_decode_he_radiotap_ru(struct mt76_rx_status *status,
|
||||
@@ -183,85 +180,3 @@ void mt76_connac3_mac_decode_he_radiotap(struct sk_buff *skb, __le32 *rxv,
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mt76_connac3_mac_decode_he_radiotap);
|
||||
-
|
||||
-static void *
|
||||
-mt76_connac3_mac_radiotap_push_tlv(struct sk_buff *skb, u16 type, u16 len)
|
||||
-{
|
||||
- struct ieee80211_radiotap_tlv *tlv;
|
||||
-
|
||||
- tlv = skb_push(skb, sizeof(*tlv) + len);
|
||||
- tlv->type = cpu_to_le16(type);
|
||||
- tlv->len = cpu_to_le16(len);
|
||||
- memset(tlv->data, 0, len);
|
||||
-
|
||||
- return tlv->data;
|
||||
-}
|
||||
-
|
||||
-void mt76_connac3_mac_decode_eht_radiotap(struct sk_buff *skb, __le32 *rxv,
|
||||
- u8 mode)
|
||||
-{
|
||||
- struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
|
||||
- struct ieee80211_radiotap_eht_usig *usig;
|
||||
- struct ieee80211_radiotap_eht *eht;
|
||||
- u32 ltf_size = le32_get_bits(rxv[4], MT_CRXV_HE_LTF_SIZE) + 1;
|
||||
- u8 bw = FIELD_GET(MT_PRXV_FRAME_MODE, le32_to_cpu(rxv[2]));
|
||||
-
|
||||
- if (WARN_ONCE(skb_mac_header(skb) != skb->data,
|
||||
- "Should push tlv at the top of mac hdr"))
|
||||
- return;
|
||||
-
|
||||
- eht = mt76_connac3_mac_radiotap_push_tlv(skb, IEEE80211_RADIOTAP_EHT,
|
||||
- sizeof(*eht) + sizeof(u32));
|
||||
- usig = mt76_connac3_mac_radiotap_push_tlv(skb, IEEE80211_RADIOTAP_EHT_USIG,
|
||||
- sizeof(*usig));
|
||||
-
|
||||
- status->flag |= RX_FLAG_RADIOTAP_TLV_AT_END;
|
||||
-
|
||||
- eht->known |= EHT_BITS(KNOWN_SPATIAL_REUSE) |
|
||||
- EHT_BITS(KNOWN_GI) |
|
||||
- EHT_BITS(KNOWN_EHT_LTF) |
|
||||
- EHT_BITS(KNOWN_LDPC_EXTRA_SYM_OM) |
|
||||
- EHT_BITS(KNOWN_PE_DISAMBIGUITY_OM) |
|
||||
- EHT_BITS(KNOWN_NSS_S);
|
||||
-
|
||||
- eht->data[0] |=
|
||||
- EHT_PREP(DATA0_SPATIAL_REUSE, SR_MASK, rxv[13]) |
|
||||
- cpu_to_le32(FIELD_PREP(IEEE80211_RADIOTAP_EHT_DATA0_GI, status->eht.gi) |
|
||||
- FIELD_PREP(IEEE80211_RADIOTAP_EHT_DATA0_LTF, ltf_size)) |
|
||||
- EHT_PREP(DATA0_PE_DISAMBIGUITY_OM, PE_DISAMBIG, rxv[5]) |
|
||||
- EHT_PREP(DATA0_LDPC_EXTRA_SYM_OM, LDPC_EXT_SYM, rxv[4]);
|
||||
-
|
||||
- eht->data[7] |= le32_encode_bits(status->nss, IEEE80211_RADIOTAP_EHT_DATA7_NSS_S);
|
||||
-
|
||||
- eht->user_info[0] |=
|
||||
- EHT_BITS(USER_INFO_MCS_KNOWN) |
|
||||
- EHT_BITS(USER_INFO_CODING_KNOWN) |
|
||||
- EHT_BITS(USER_INFO_NSS_KNOWN_O) |
|
||||
- EHT_BITS(USER_INFO_BEAMFORMING_KNOWN_O) |
|
||||
- EHT_BITS(USER_INFO_DATA_FOR_USER) |
|
||||
- le32_encode_bits(status->rate_idx, IEEE80211_RADIOTAP_EHT_USER_INFO_MCS) |
|
||||
- le32_encode_bits(status->nss, IEEE80211_RADIOTAP_EHT_USER_INFO_NSS_O);
|
||||
-
|
||||
- if (le32_to_cpu(rxv[0]) & MT_PRXV_TXBF)
|
||||
- eht->user_info[0] |= EHT_BITS(USER_INFO_BEAMFORMING_O);
|
||||
-
|
||||
- if (le32_to_cpu(rxv[0]) & MT_PRXV_HT_AD_CODE)
|
||||
- eht->user_info[0] |= EHT_BITS(USER_INFO_CODING);
|
||||
-
|
||||
- if (mode == MT_PHY_TYPE_EHT_MU)
|
||||
- eht->user_info[0] |= EHT_BITS(USER_INFO_STA_ID_KNOWN) |
|
||||
- EHT_PREP(USER_INFO_STA_ID, MU_AID, rxv[8]);
|
||||
-
|
||||
- usig->common |=
|
||||
- EHT_BITS(USIG_COMMON_PHY_VER_KNOWN) |
|
||||
- EHT_BITS(USIG_COMMON_BW_KNOWN) |
|
||||
- EHT_BITS(USIG_COMMON_UL_DL_KNOWN) |
|
||||
- EHT_BITS(USIG_COMMON_BSS_COLOR_KNOWN) |
|
||||
- EHT_BITS(USIG_COMMON_TXOP_KNOWN) |
|
||||
- le32_encode_bits(0, IEEE80211_RADIOTAP_EHT_USIG_COMMON_PHY_VER) |
|
||||
- le32_encode_bits(bw, IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW) |
|
||||
- EHT_PREP(USIG_COMMON_UL_DL, UPLINK, rxv[5]) |
|
||||
- EHT_PREP(USIG_COMMON_BSS_COLOR, BSS_COLOR, rxv[9]) |
|
||||
- EHT_PREP(USIG_COMMON_TXOP, TXOP_DUR, rxv[9]);
|
||||
-}
|
||||
-EXPORT_SYMBOL_GPL(mt76_connac3_mac_decode_eht_radiotap);
|
||||
diff --git a/mt76_connac3_mac.h b/mt76_connac3_mac.h
|
||||
index 353e6606..83dcd964 100644
|
||||
--- a/mt76_connac3_mac.h
|
||||
+++ b/mt76_connac3_mac.h
|
||||
@@ -142,28 +142,6 @@ enum {
|
||||
#define MT_CRXV_HE_RU3_L GENMASK(31, 27)
|
||||
#define MT_CRXV_HE_RU3_H GENMASK(3, 0)
|
||||
|
||||
-#define MT_CRXV_EHT_NUM_USER GENMASK(26, 20)
|
||||
-#define MT_CRXV_EHT_LTF_SIZE GENMASK(28, 27)
|
||||
-#define MT_CRXV_EHT_LDPC_EXT_SYM BIT(30)
|
||||
-#define MT_CRXV_EHT_PE_DISAMBIG BIT(1)
|
||||
-#define MT_CRXV_EHT_UPLINK BIT(2)
|
||||
-#define MT_CRXV_EHT_MU_AID GENMASK(27, 17)
|
||||
-#define MT_CRXV_EHT_BEAM_CHNG BIT(29)
|
||||
-#define MT_CRXV_EHT_DOPPLER BIT(0)
|
||||
-#define MT_CRXV_EHT_BSS_COLOR GENMASK(15, 10)
|
||||
-#define MT_CRXV_EHT_TXOP_DUR GENMASK(23, 17)
|
||||
-#define MT_CRXV_EHT_SR_MASK GENMASK(11, 8)
|
||||
-#define MT_CRXV_EHT_SR1_MASK GENMASK(15, 12)
|
||||
-#define MT_CRXV_EHT_SR2_MASK GENMASK(19, 16)
|
||||
-#define MT_CRXV_EHT_SR3_MASK GENMASK(23, 20)
|
||||
-#define MT_CRXV_EHT_RU0 GENMASK(8, 0)
|
||||
-#define MT_CRXV_EHT_RU1 GENMASK(17, 9)
|
||||
-#define MT_CRXV_EHT_RU2 GENMASK(26, 18)
|
||||
-#define MT_CRXV_EHT_RU3_L GENMASK(31, 27)
|
||||
-#define MT_CRXV_EHT_RU3_H GENMASK(3, 0)
|
||||
-#define MT_CRXV_EHT_SIG_MCS GENMASK(19, 18)
|
||||
-#define MT_CRXV_EHT_LTF_SYM GENMASK(22, 20)
|
||||
-
|
||||
enum tx_header_format {
|
||||
MT_HDR_FORMAT_802_3,
|
||||
MT_HDR_FORMAT_CMD,
|
||||
diff --git a/mt7925/mac.c b/mt7925/mac.c
|
||||
index c2460ef4..1b9fbd9a 100644
|
||||
--- a/mt7925/mac.c
|
||||
+++ b/mt7925/mac.c
|
||||
@@ -590,25 +590,14 @@ mt7925_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb)
|
||||
seq_ctrl = le16_to_cpu(hdr->seq_ctrl);
|
||||
qos_ctl = *ieee80211_get_qos_ctl(hdr);
|
||||
}
|
||||
- skb_set_mac_header(skb, (unsigned char *)hdr - skb->data);
|
||||
} else {
|
||||
status->flag |= RX_FLAG_8023;
|
||||
}
|
||||
|
||||
mt792x_mac_assoc_rssi(dev, skb);
|
||||
|
||||
- if (rxv && !(status->flag & RX_FLAG_8023)) {
|
||||
- switch (status->encoding) {
|
||||
- case RX_ENC_EHT:
|
||||
- mt76_connac3_mac_decode_eht_radiotap(skb, rxv, mode);
|
||||
- break;
|
||||
- case RX_ENC_HE:
|
||||
- mt76_connac3_mac_decode_he_radiotap(skb, rxv, mode);
|
||||
- break;
|
||||
- default:
|
||||
- break;
|
||||
- }
|
||||
- }
|
||||
+ if (rxv && mode >= MT_PHY_TYPE_HE_SU && !(status->flag & RX_FLAG_8023))
|
||||
+ mt76_connac3_mac_decode_he_radiotap(skb, rxv, mode);
|
||||
|
||||
if (!status->wcid || !ieee80211_is_data_qos(fc))
|
||||
return 0;
|
||||
--
|
||||
2.43.2
|
||||
|
||||
Binary file not shown.
@@ -10,12 +10,13 @@ elif grep -q "bcm53xx" "/etc/openwrt_release"; then
|
||||
cpu_freq="$(nvram get clkfreq | awk -F ',' '{print $1}')MHz"
|
||||
elif grep -q "mvebu" "/etc/openwrt_release"; then
|
||||
cpu_freq="$(cat "/proc/cpuinfo" | grep "BogoMIPS" | sed -n "1p" | awk -F ': ' '{print $2}')MHz"
|
||||
elif ! grep -q "filogic" "/etc/openwrt_release"; then
|
||||
cpu_freq="$(expr $(cat /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_cur_freq) / 1000)MHz"
|
||||
if grep -q "rockchip" "/etc/openwrt_release"; then
|
||||
elif grep -q "filogic" "/etc/openwrt_release"; then
|
||||
[ -f "/sys/devices/system/cpu/cpufreq/policy0/cpuinfo_cur_freq" ] && big_cpu_freq="$(expr $(cat /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_cur_freq) / 1000)MHz"
|
||||
elif grep -q "rockchip" "/etc/openwrt_release"; then
|
||||
big_cpu_freq="$(expr $(cat /sys/devices/system/cpu/cpufreq/policy4/cpuinfo_cur_freq 2>"/dev/null") / 1000 2>"/dev/null")"
|
||||
[ -n "${big_cpu_freq}" ] && big_cpu_freq="${big_cpu_freq}MHz "
|
||||
fi
|
||||
else
|
||||
cpu_freq="$(expr $(cat /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_cur_freq) / 1000)MHz"
|
||||
fi
|
||||
|
||||
if grep -q "ipq" "/etc/openwrt_release"; then
|
||||
@@ -32,7 +33,11 @@ else
|
||||
cpu_temp="$(awk "BEGIN{printf (\"%.1f\n\",$(cat /sys/class/thermal/thermal_zone0/temp)/1000) }")°C"
|
||||
fi
|
||||
if grep -q "filogic" "/etc/openwrt_release"; then
|
||||
if [ -n "${big_cpu_freq}" ] ; then
|
||||
echo -n "${cpu_arch} x ${cpu_cores} (${big_cpu_freq}, ${cpu_temp})"
|
||||
else
|
||||
echo -n "${cpu_arch} x ${cpu_cores} (${cpu_temp})"
|
||||
fi
|
||||
else
|
||||
echo -n "${cpu_arch} x ${cpu_cores} (${big_cpu_freq}${cpu_freq}, ${cpu_temp})"
|
||||
fi
|
||||
|
||||
@@ -51,13 +51,19 @@ sed -i '/option disabled/d' /etc/config/wireless
|
||||
sed -i '/set wireless.radio${devidx}.disabled/d' /lib/wifi/mac80211.sh
|
||||
|
||||
sed -i '/DISTRIB_REVISION/d' /etc/openwrt_release
|
||||
echo "DISTRIB_REVISION='R24.6.6'" >> /etc/openwrt_release
|
||||
echo "DISTRIB_REVISION='R24.7.7'" >> /etc/openwrt_release
|
||||
sed -i '/DISTRIB_DESCRIPTION/d' /etc/openwrt_release
|
||||
echo "DISTRIB_DESCRIPTION='OpenWrt '" >> /etc/openwrt_release
|
||||
|
||||
sed -i '/log-facility/d' /etc/dnsmasq.conf
|
||||
echo "log-facility=/dev/null" >> /etc/dnsmasq.conf
|
||||
|
||||
if [ -f /www/luci-static/resources/luci.js ]; then
|
||||
sed -i 's/ifname/device/g' /etc/config/network
|
||||
else
|
||||
sed -i 's/device/ifname/g' /etc/config/network
|
||||
fi
|
||||
|
||||
rm -rf /tmp/luci-modulecache/
|
||||
rm -f /tmp/luci-indexcache
|
||||
|
||||
|
||||
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
|
||||
|
||||
PKG_NAME:=qmi_wwan_q
|
||||
PKG_VERSION:=3.0
|
||||
PKG_RELEASE:=3
|
||||
PKG_RELEASE:=2
|
||||
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
@@ -1,3 +1,4 @@
|
||||
|
||||
/*
|
||||
* Copyright (c) 2012 Bjørn Mork <bjorn@mork.no>
|
||||
*
|
||||
@@ -828,26 +829,26 @@ static struct rtnl_link_stats64 *_rmnet_vnd_get_stats64(struct net_device *net,
|
||||
stats64 = per_cpu_ptr(dev->stats64, cpu);
|
||||
|
||||
do {
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION( 6,6,0 ))
|
||||
start = u64_stats_fetch_begin_irq(&stats64->syncp);
|
||||
#else
|
||||
start = u64_stats_fetch_begin(&stats64->syncp);
|
||||
#endif
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0)
|
||||
rx_packets = stats64->rx_packets;
|
||||
rx_bytes = stats64->rx_bytes;
|
||||
tx_packets = stats64->tx_packets;
|
||||
tx_bytes = stats64->tx_bytes;
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION( 6,6,0 ))
|
||||
} while (u64_stats_fetch_retry_irq(&stats64->syncp, start));
|
||||
#else
|
||||
} while (u64_stats_fetch_retry(&stats64->syncp, start));
|
||||
rx_packets = u64_stats_read(&stats64->rx_packets);
|
||||
rx_bytes = u64_stats_read(&stats64->rx_bytes);
|
||||
tx_packets = u64_stats_read(&stats64->tx_packets);
|
||||
tx_bytes = u64_stats_read(&stats64->tx_bytes);
|
||||
#endif
|
||||
} while (u64_stats_fetch_retry_irq(&stats64->syncp, start));
|
||||
|
||||
|
||||
stats->rx_packets += rx_packets;
|
||||
stats->rx_bytes += rx_bytes;
|
||||
stats->tx_packets += tx_packets;
|
||||
stats->tx_bytes += tx_bytes;
|
||||
|
||||
stats->rx_packets += u64_stats_read(&rx_packets);
|
||||
stats->rx_bytes += u64_stats_read(&rx_bytes);
|
||||
stats->tx_packets += u64_stats_read(&tx_packets);
|
||||
stats->tx_bytes += u64_stats_read(&tx_bytes);
|
||||
#endif
|
||||
}
|
||||
|
||||
return stats;
|
||||
|
||||
@@ -1,3 +1,4 @@
|
||||
|
||||
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
|
||||
@@ -0,0 +1,32 @@
|
||||
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
|
||||
|
||||
fragment@0 {
|
||||
target = <&gmac1>;
|
||||
__overlay__ {
|
||||
phy-mode = "2500base-x";
|
||||
phy-handle = <&phy5>;
|
||||
};
|
||||
};
|
||||
|
||||
fragment@1 {
|
||||
target = <&mdio_bus>;
|
||||
__overlay__ {
|
||||
reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <600>;
|
||||
reset-post-delay-us = <20000>;
|
||||
|
||||
phy5: ethernet-phy@5 {
|
||||
reg = <5>;
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
phy-mode = "2500base-x";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,33 @@
|
||||
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
|
||||
|
||||
fragment@0 {
|
||||
target = <&sw_p5>;
|
||||
__overlay__ {
|
||||
phy-mode = "2500base-x";
|
||||
phy-handle = <&phy5>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
fragment@1 {
|
||||
target = <&mdio_bus>;
|
||||
__overlay__ {
|
||||
reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <600>;
|
||||
reset-post-delay-us = <20000>;
|
||||
|
||||
phy5: ethernet-phy@5 {
|
||||
reg = <5>;
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
phy-mode = "2500base-x";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,66 @@
|
||||
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
/ {
|
||||
compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
|
||||
|
||||
fragment@0 {
|
||||
target = <&spi0>;
|
||||
__overlay__ {
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
spi_nand: spi_nand@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-nand";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <10000000>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "BL2";
|
||||
reg = <0x00000 0x0100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x0100000 0x0080000>;
|
||||
};
|
||||
|
||||
factory: partition@180000 {
|
||||
label = "Factory";
|
||||
reg = <0x180000 0x0200000>;
|
||||
};
|
||||
|
||||
partition@380000 {
|
||||
label = "FIP";
|
||||
reg = <0x380000 0x0200000>;
|
||||
};
|
||||
|
||||
partition@580000 {
|
||||
label = "ubi";
|
||||
reg = <0x580000 0x4000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@1 {
|
||||
target = <&wifi>;
|
||||
__overlay__ {
|
||||
mediatek,mtd-eeprom = <&factory 0x0>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,188 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2022 MediaTek Inc.
|
||||
* Author: Sam.Shih <sam.shih@mediatek.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "mt7981.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MediaTek MT7981 RFB";
|
||||
compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0 0x40000000 0 0x20000000>;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-3.3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5v: regulator-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-5V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
reset {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
wps {
|
||||
label = "wps";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
gmac1: mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
phy-mode = "gmii";
|
||||
phy-handle = <&int_gbe_phy>;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio_bus {
|
||||
switch: switch@1f {
|
||||
compatible = "mediatek,mt7531";
|
||||
reg = <31>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
spi0_flash_pins: spi0-pins {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spi0", "spi0_wp_hold";
|
||||
};
|
||||
conf-pu {
|
||||
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
|
||||
};
|
||||
conf-pd {
|
||||
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_flash_pins>;
|
||||
cs-gpios = <0>, <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&switch {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
sw_p5: port@5 {
|
||||
reg = <5>;
|
||||
label = "lan5";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&xhci {
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <®_5v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
status = "okay";
|
||||
};
|
||||
File diff suppressed because it is too large
Load Diff
@@ -15,8 +15,8 @@
|
||||
compatible = "spi-nand";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <10000000>;
|
||||
spi-tx-buswidth = <4>;
|
||||
spi-rx-buswidth = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
|
||||
@@ -15,8 +15,8 @@
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <52000000>;
|
||||
spi-tx-buswidth = <4>;
|
||||
spi-rx-buswidth = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
|
||||
@@ -99,7 +99,7 @@
|
||||
reg = <6>;
|
||||
};
|
||||
|
||||
switch: switch@0 {
|
||||
switch: switch@1f {
|
||||
compatible = "mediatek,mt7531";
|
||||
reg = <31>;
|
||||
reset-gpios = <&pio 5 0>;
|
||||
|
||||
@@ -14,9 +14,11 @@
|
||||
/ {
|
||||
model = "Bananapi BPI-R4";
|
||||
compatible = "bananapi,bpi-r4",
|
||||
"mediatek,mt7988";
|
||||
"mediatek,mt7988a";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &gmac0;
|
||||
ethernet1 = &gmac1;
|
||||
serial0 = &uart0;
|
||||
led-boot = &led_green;
|
||||
led-failsafe = &led_green;
|
||||
@@ -26,7 +28,7 @@
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart0;
|
||||
bootargs = "console=ttyS0,115200n1 loglevel=8 pci=pcie_bus_perf ubi.block=0,fit root=/dev/fit0";
|
||||
bootargs = "console=ttyS0,115200n1 loglevel=8 pci=pcie_bus_perf ubi.block=0,fit root=/dev/fit0 rootwait";
|
||||
rootdisk-spim-nand = <&ubi_rootfs>;
|
||||
};
|
||||
|
||||
@@ -320,6 +322,15 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fan {
|
||||
pwms = <&pwm 0 50000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssusb1 {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -386,6 +397,18 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_2_lite_pins>;
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_3_pins>;
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -19,8 +19,8 @@
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <52000000>;
|
||||
spi-tx-buswidth = <4>;
|
||||
spi-rx-buswidth = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
mediatek,nmbm;
|
||||
mediatek,bmt-max-ratio = <1>;
|
||||
mediatek,bmt-max-reserved-blocks = <64>;
|
||||
|
||||
@@ -21,8 +21,8 @@
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <52000000>;
|
||||
spi-tx-buswidth = <4>;
|
||||
spi-rx-buswidth = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
mediatek,nmbm;
|
||||
mediatek,bmt-max-ratio = <1>;
|
||||
mediatek,bmt-max-reserved-blocks = <64>;
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
/ {
|
||||
model = "MediaTek MT7988A Reference Board";
|
||||
compatible = "mediatek,mt7988a-rfb",
|
||||
"mediatek,mt7988";
|
||||
"mediatek,mt7988a";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200n1 loglevel=8 \
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,113 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2023 MediaTek Inc.
|
||||
* Author: Sam Shih <sam.shih@mediatek.com>
|
||||
* Author: Xiufeng Li <Xiufeng.Li@mediatek.com>
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include "clk-mtk.h"
|
||||
#include "clk-gate.h"
|
||||
#include "clk-mux.h"
|
||||
#include "clk-pll.h"
|
||||
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
|
||||
|
||||
#define MT7988_PLL_FMAX (2500UL * MHZ)
|
||||
#define MT7988_PCW_CHG_SHIFT 2
|
||||
|
||||
#define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, \
|
||||
_pcwbits, _pd_reg, _pd_shift, _tuner_reg, _tuner_en_reg, \
|
||||
_tuner_en_bit, _pcw_reg, _pcw_shift, _pcw_chg_reg, \
|
||||
_div_table) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .reg = _reg, .pwr_reg = _pwr_reg, \
|
||||
.en_mask = _en_mask, .flags = _flags, \
|
||||
.rst_bar_mask = BIT(_rst_bar_mask), .fmax = MT7988_PLL_FMAX, \
|
||||
.pcwbits = _pcwbits, .pd_reg = _pd_reg, \
|
||||
.pd_shift = _pd_shift, .tuner_reg = _tuner_reg, \
|
||||
.tuner_en_reg = _tuner_en_reg, .tuner_en_bit = _tuner_en_bit, \
|
||||
.pcw_reg = _pcw_reg, .pcw_shift = _pcw_shift, \
|
||||
.pcw_chg_reg = _pcw_chg_reg, \
|
||||
.pcw_chg_shift = MT7988_PCW_CHG_SHIFT, \
|
||||
.div_table = _div_table, .parent_name = "clkxtal", \
|
||||
}
|
||||
|
||||
#define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, \
|
||||
_pcwbits, _pd_reg, _pd_shift, _tuner_reg, _tuner_en_reg, \
|
||||
_tuner_en_bit, _pcw_reg, _pcw_shift, _pcw_chg_reg) \
|
||||
PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, \
|
||||
_pcwbits, _pd_reg, _pd_shift, _tuner_reg, _tuner_en_reg, \
|
||||
_tuner_en_bit, _pcw_reg, _pcw_shift, _pcw_chg_reg, NULL)
|
||||
|
||||
static const struct mtk_pll_data plls[] = {
|
||||
PLL(CLK_APMIXED_NETSYSPLL, "netsyspll", 0x0104, 0x0110, 0x00000001, 0,
|
||||
0, 32, 0x0104, 4, 0, 0, 0, 0x0108, 0, 0x0104),
|
||||
PLL(CLK_APMIXED_MPLL, "mpll", 0x0114, 0x0120, 0xff000001, HAVE_RST_BAR,
|
||||
23, 32, 0x0114, 4, 0, 0, 0, 0x0118, 0, 0x0114),
|
||||
PLL(CLK_APMIXED_MMPLL, "mmpll", 0x0124, 0x0130, 0xff000001,
|
||||
HAVE_RST_BAR, 23, 32, 0x0124, 4, 0, 0, 0, 0x0128, 0, 0x0124),
|
||||
PLL(CLK_APMIXED_APLL2, "apll2", 0x0134, 0x0140, 0x00000001, 0, 0, 32,
|
||||
0x0134, 4, 0x0704, 0x0700, 1, 0x0138, 0, 0x0134),
|
||||
PLL(CLK_APMIXED_NET1PLL, "net1pll", 0x0144, 0x0150, 0xff000001,
|
||||
HAVE_RST_BAR, 23, 32, 0x0144, 4, 0, 0, 0, 0x0148, 0, 0x0144),
|
||||
PLL(CLK_APMIXED_NET2PLL, "net2pll", 0x0154, 0x0160, 0xff000001,
|
||||
(HAVE_RST_BAR | PLL_AO), 23, 32, 0x0154, 4, 0, 0, 0, 0x0158, 0,
|
||||
0x0154),
|
||||
PLL(CLK_APMIXED_WEDMCUPLL, "wedmcupll", 0x0164, 0x0170, 0x00000001, 0,
|
||||
0, 32, 0x0164, 4, 0, 0, 0, 0x0168, 0, 0x0164),
|
||||
PLL(CLK_APMIXED_SGMPLL, "sgmpll", 0x0174, 0x0180, 0x00000001, 0, 0, 32,
|
||||
0x0174, 4, 0, 0, 0, 0x0178, 0, 0x0174),
|
||||
PLL(CLK_APMIXED_ARM_B, "arm_b", 0x0204, 0x0210, 0xff000001,
|
||||
(HAVE_RST_BAR | PLL_AO), 23, 32, 0x0204, 4, 0, 0, 0, 0x0208, 0,
|
||||
0x0204),
|
||||
PLL(CLK_APMIXED_CCIPLL2_B, "ccipll2_b", 0x0214, 0x0220, 0xff000001,
|
||||
HAVE_RST_BAR, 23, 32, 0x0214, 4, 0, 0, 0, 0x0218, 0, 0x0214),
|
||||
PLL(CLK_APMIXED_USXGMIIPLL, "usxgmiipll", 0x0304, 0x0310, 0xff000001,
|
||||
HAVE_RST_BAR, 23, 32, 0x0304, 4, 0, 0, 0, 0x0308, 0, 0x0304),
|
||||
PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0314, 0x0320, 0x00000001, 0, 0,
|
||||
32, 0x0314, 4, 0, 0, 0, 0x0318, 0, 0x0314),
|
||||
};
|
||||
|
||||
static const struct of_device_id of_match_clk_mt7988_apmixed[] = {
|
||||
{ .compatible = "mediatek,mt7988-apmixedsys", },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static int clk_mt7988_apmixed_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct clk_hw_onecell_data *clk_data;
|
||||
struct device_node *node = pdev->dev.of_node;
|
||||
int r;
|
||||
|
||||
clk_data = mtk_alloc_clk_data(ARRAY_SIZE(plls));
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
|
||||
|
||||
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
||||
if (r) {
|
||||
pr_err("%s(): could not register clock provider: %d\n",
|
||||
__func__, r);
|
||||
goto free_apmixed_data;
|
||||
}
|
||||
return r;
|
||||
|
||||
free_apmixed_data:
|
||||
mtk_free_clk_data(clk_data);
|
||||
return r;
|
||||
}
|
||||
|
||||
static struct platform_driver clk_mt7988_apmixed_drv = {
|
||||
.probe = clk_mt7988_apmixed_probe,
|
||||
.driver = {
|
||||
.name = "clk-mt7988-apmixed",
|
||||
.of_match_table = of_match_clk_mt7988_apmixed,
|
||||
},
|
||||
};
|
||||
builtin_platform_driver(clk_mt7988_apmixed_drv);
|
||||
MODULE_LICENSE("GPL");
|
||||
@@ -1,141 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2023 MediaTek Inc.
|
||||
* Author: Sam Shih <sam.shih@mediatek.com>
|
||||
* Author: Xiufeng Li <Xiufeng.Li@mediatek.com>
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include "clk-mtk.h"
|
||||
#include "clk-gate.h"
|
||||
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
|
||||
|
||||
static const struct mtk_gate_regs ethdma_cg_regs = {
|
||||
.set_ofs = 0x30,
|
||||
.clr_ofs = 0x30,
|
||||
.sta_ofs = 0x30,
|
||||
};
|
||||
|
||||
#define GATE_ETHDMA(_id, _name, _parent, _shift) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = ðdma_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_no_setclr_inv, \
|
||||
}
|
||||
|
||||
static const struct mtk_gate ethdma_clks[] = {
|
||||
GATE_ETHDMA(CLK_ETHDMA_XGP1_EN, "ethdma_xgp1_en", "top_xtal", 0),
|
||||
GATE_ETHDMA(CLK_ETHDMA_XGP2_EN, "ethdma_xgp2_en", "top_xtal", 1),
|
||||
GATE_ETHDMA(CLK_ETHDMA_XGP3_EN, "ethdma_xgp3_en", "top_xtal", 2),
|
||||
GATE_ETHDMA(CLK_ETHDMA_FE_EN, "ethdma_fe_en", "netsys_2x_sel", 6),
|
||||
GATE_ETHDMA(CLK_ETHDMA_GP2_EN, "ethdma_gp2_en", "top_xtal", 7),
|
||||
GATE_ETHDMA(CLK_ETHDMA_GP1_EN, "ethdma_gp1_en", "top_xtal", 8),
|
||||
GATE_ETHDMA(CLK_ETHDMA_GP3_EN, "ethdma_gp3_en", "top_xtal", 10),
|
||||
GATE_ETHDMA(CLK_ETHDMA_ESW_EN, "ethdma_esw_en", "netsys_gsw_sel", 16),
|
||||
GATE_ETHDMA(CLK_ETHDMA_CRYPT0_EN, "ethdma_crypt0_en", "eip197_sel",
|
||||
29),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc ethdma_desc = {
|
||||
.clks = ethdma_clks,
|
||||
.num_clks = ARRAY_SIZE(ethdma_clks),
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs sgmii0_cg_regs = {
|
||||
.set_ofs = 0xe4,
|
||||
.clr_ofs = 0xe4,
|
||||
.sta_ofs = 0xe4,
|
||||
};
|
||||
|
||||
#define GATE_SGMII0(_id, _name, _parent, _shift) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &sgmii0_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_no_setclr_inv, \
|
||||
}
|
||||
|
||||
static const struct mtk_gate sgmii0_clks[] = {
|
||||
GATE_SGMII0(CLK_SGM0_TX_EN, "sgm0_tx_en", "top_xtal", 2),
|
||||
GATE_SGMII0(CLK_SGM0_RX_EN, "sgm0_rx_en", "top_xtal", 3),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc sgmii0_desc = {
|
||||
.clks = sgmii0_clks,
|
||||
.num_clks = ARRAY_SIZE(sgmii0_clks),
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs sgmii1_cg_regs = {
|
||||
.set_ofs = 0xe4,
|
||||
.clr_ofs = 0xe4,
|
||||
.sta_ofs = 0xe4,
|
||||
};
|
||||
|
||||
#define GATE_SGMII1(_id, _name, _parent, _shift) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &sgmii1_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_no_setclr_inv, \
|
||||
}
|
||||
|
||||
static const struct mtk_gate sgmii1_clks[] = {
|
||||
GATE_SGMII1(CLK_SGM1_TX_EN, "sgm1_tx_en", "top_xtal", 2),
|
||||
GATE_SGMII1(CLK_SGM1_RX_EN, "sgm1_rx_en", "top_xtal", 3),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc sgmii1_desc = {
|
||||
.clks = sgmii1_clks,
|
||||
.num_clks = ARRAY_SIZE(sgmii1_clks),
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs ethwarp_cg_regs = {
|
||||
.set_ofs = 0x14,
|
||||
.clr_ofs = 0x14,
|
||||
.sta_ofs = 0x14,
|
||||
};
|
||||
|
||||
#define GATE_ETHWARP(_id, _name, _parent, _shift) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = ðwarp_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_no_setclr_inv, \
|
||||
}
|
||||
|
||||
static const struct mtk_gate ethwarp_clks[] = {
|
||||
GATE_ETHWARP(CLK_ETHWARP_WOCPU2_EN, "ethwarp_wocpu2_en",
|
||||
"netsys_mcu_sel", 13),
|
||||
GATE_ETHWARP(CLK_ETHWARP_WOCPU1_EN, "ethwarp_wocpu1_en",
|
||||
"netsys_mcu_sel", 14),
|
||||
GATE_ETHWARP(CLK_ETHWARP_WOCPU0_EN, "ethwarp_wocpu0_en",
|
||||
"netsys_mcu_sel", 15),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc ethwarp_desc = {
|
||||
.clks = ethwarp_clks,
|
||||
.num_clks = ARRAY_SIZE(ethwarp_clks),
|
||||
};
|
||||
|
||||
static const struct of_device_id of_match_clk_mt7986_eth[] = {
|
||||
{ .compatible = "mediatek,mt7988-ethsys", .data = ðdma_desc },
|
||||
{ .compatible = "mediatek,mt7988-sgmiisys_0", .data = &sgmii0_desc },
|
||||
{ .compatible = "mediatek,mt7988-sgmiisys_1", .data = &sgmii1_desc },
|
||||
{ .compatible = "mediatek,mt7988-ethwarp", .data = ðwarp_desc },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, of_match_clk_mt7988_eth);
|
||||
|
||||
static struct platform_driver clk_mt7988_eth_drv = {
|
||||
.driver = {
|
||||
.name = "clk-mt7988-eth",
|
||||
.of_match_table = of_match_clk_mt7986_eth,
|
||||
},
|
||||
.probe = mtk_clk_simple_probe,
|
||||
.remove = mtk_clk_simple_remove,
|
||||
};
|
||||
module_platform_driver(clk_mt7988_eth_drv);
|
||||
|
||||
MODULE_DESCRIPTION("MediaTek MT7988 Ethernet clocks driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
@@ -1,376 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2023 MediaTek Inc.
|
||||
* Author: Sam Shih <sam.shih@mediatek.com>
|
||||
* Author: Xiufeng Li <Xiufeng.Li@mediatek.com>
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include "clk-mtk.h"
|
||||
#include "clk-gate.h"
|
||||
#include "clk-mux.h"
|
||||
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
|
||||
|
||||
static DEFINE_SPINLOCK(mt7988_clk_lock);
|
||||
|
||||
static const char *const infra_mux_uart0_parents[] __initconst = {
|
||||
"csw_infra_f26m_sel", "uart_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_mux_uart1_parents[] __initconst = {
|
||||
"csw_infra_f26m_sel", "uart_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_mux_uart2_parents[] __initconst = {
|
||||
"csw_infra_f26m_sel", "uart_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_mux_spi0_parents[] __initconst = { "i2c_sel",
|
||||
"spi_sel" };
|
||||
|
||||
static const char *const infra_mux_spi1_parents[] __initconst = {
|
||||
"i2c_sel", "spim_mst_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_pwm_bck_parents[] __initconst = {
|
||||
"top_rtc_32p7k", "csw_infra_f26m_sel", "sysaxi_sel", "pwm_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_pcie_gfmux_tl_ck_o_p0_parents[] __initconst = {
|
||||
"top_rtc_32p7k", "csw_infra_f26m_sel", "csw_infra_f26m_sel",
|
||||
"pextp_tl_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_pcie_gfmux_tl_ck_o_p1_parents[] __initconst = {
|
||||
"top_rtc_32p7k", "csw_infra_f26m_sel", "csw_infra_f26m_sel",
|
||||
"pextp_tl_p1_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_pcie_gfmux_tl_ck_o_p2_parents[] __initconst = {
|
||||
"top_rtc_32p7k", "csw_infra_f26m_sel", "csw_infra_f26m_sel",
|
||||
"pextp_tl_p2_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_pcie_gfmux_tl_ck_o_p3_parents[] __initconst = {
|
||||
"top_rtc_32p7k", "csw_infra_f26m_sel", "csw_infra_f26m_sel",
|
||||
"pextp_tl_p3_sel"
|
||||
};
|
||||
|
||||
static const struct mtk_mux infra_muxes[] = {
|
||||
/* MODULE_CLK_SEL_0 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_UART0_SEL, "infra_mux_uart0_sel",
|
||||
infra_mux_uart0_parents, 0x0018, 0x0010, 0x0014,
|
||||
0, 1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_UART1_SEL, "infra_mux_uart1_sel",
|
||||
infra_mux_uart1_parents, 0x0018, 0x0010, 0x0014,
|
||||
1, 1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_UART2_SEL, "infra_mux_uart2_sel",
|
||||
infra_mux_uart2_parents, 0x0018, 0x0010, 0x0014,
|
||||
2, 1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_SPI0_SEL, "infra_mux_spi0_sel",
|
||||
infra_mux_spi0_parents, 0x0018, 0x0010, 0x0014, 4,
|
||||
1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_SPI1_SEL, "infra_mux_spi1_sel",
|
||||
infra_mux_spi1_parents, 0x0018, 0x0010, 0x0014, 5,
|
||||
1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_SPI2_SEL, "infra_mux_spi2_sel",
|
||||
infra_mux_spi0_parents, 0x0018, 0x0010, 0x0014, 6,
|
||||
1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_SEL, "infra_pwm_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 14,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK1_SEL, "infra_pwm_ck1_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 16,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK2_SEL, "infra_pwm_ck2_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 18,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK3_SEL, "infra_pwm_ck3_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 20,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK4_SEL, "infra_pwm_ck4_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 22,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK5_SEL, "infra_pwm_ck5_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 24,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK6_SEL, "infra_pwm_ck6_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 26,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK7_SEL, "infra_pwm_ck7_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 28,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK8_SEL, "infra_pwm_ck8_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 30,
|
||||
2, -1, -1, -1),
|
||||
/* MODULE_CLK_SEL_1 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PCIE_GFMUX_TL_O_P0_SEL,
|
||||
"infra_pcie_gfmux_tl_o_p0_sel",
|
||||
infra_pcie_gfmux_tl_ck_o_p0_parents, 0x0028,
|
||||
0x0020, 0x0024, 0, 2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PCIE_GFMUX_TL_O_P1_SEL,
|
||||
"infra_pcie_gfmux_tl_o_p1_sel",
|
||||
infra_pcie_gfmux_tl_ck_o_p1_parents, 0x0028,
|
||||
0x0020, 0x0024, 2, 2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PCIE_GFMUX_TL_O_P2_SEL,
|
||||
"infra_pcie_gfmux_tl_o_p2_sel",
|
||||
infra_pcie_gfmux_tl_ck_o_p2_parents, 0x0028,
|
||||
0x0020, 0x0024, 4, 2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PCIE_GFMUX_TL_O_P3_SEL,
|
||||
"infra_pcie_gfmux_tl_o_p3_sel",
|
||||
infra_pcie_gfmux_tl_ck_o_p3_parents, 0x0028,
|
||||
0x0020, 0x0024, 6, 2, -1, -1, -1),
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs infra0_cg_regs = {
|
||||
.set_ofs = 0x10,
|
||||
.clr_ofs = 0x14,
|
||||
.sta_ofs = 0x18,
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs infra1_cg_regs = {
|
||||
.set_ofs = 0x40,
|
||||
.clr_ofs = 0x44,
|
||||
.sta_ofs = 0x48,
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs infra2_cg_regs = {
|
||||
.set_ofs = 0x50,
|
||||
.clr_ofs = 0x54,
|
||||
.sta_ofs = 0x58,
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs infra3_cg_regs = {
|
||||
.set_ofs = 0x60,
|
||||
.clr_ofs = 0x64,
|
||||
.sta_ofs = 0x68,
|
||||
};
|
||||
|
||||
#define GATE_INFRA0_FLAGS(_id, _name, _parent, _shift, _flags) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &infra0_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_setclr, .flags = _flags, \
|
||||
}
|
||||
|
||||
#define GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, _flags) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &infra1_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_setclr, .flags = _flags, \
|
||||
}
|
||||
|
||||
#define GATE_INFRA2_FLAGS(_id, _name, _parent, _shift, _flags) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &infra2_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_setclr, .flags = _flags, \
|
||||
}
|
||||
|
||||
#define GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, _flags) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &infra3_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_setclr, .flags = _flags, \
|
||||
}
|
||||
|
||||
#define GATE_INFRA0(_id, _name, _parent, _shift) \
|
||||
GATE_INFRA0_FLAGS(_id, _name, _parent, _shift, 0)
|
||||
|
||||
#define GATE_INFRA1(_id, _name, _parent, _shift) \
|
||||
GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, 0)
|
||||
|
||||
#define GATE_INFRA2(_id, _name, _parent, _shift) \
|
||||
GATE_INFRA2_FLAGS(_id, _name, _parent, _shift, 0)
|
||||
|
||||
#define GATE_INFRA3(_id, _name, _parent, _shift) \
|
||||
GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, 0)
|
||||
|
||||
#define GATE_CRITICAL(_id, _name, _parent, _regs, _shift) { \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = _regs, .shift = _shift, \
|
||||
.flags = CLK_IS_CRITICAL, \
|
||||
.ops = &mtk_clk_gate_ops_setclr, \
|
||||
}
|
||||
|
||||
static const struct mtk_gate infra_clks[] = {
|
||||
/* INFRA0 */
|
||||
GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P0,
|
||||
"infra_pcie_peri_ck_26m_ck_p0", "csw_infra_f26m_sel", 7),
|
||||
GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P1,
|
||||
"infra_pcie_peri_ck_26m_ck_p1", "csw_infra_f26m_sel", 8),
|
||||
GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P2,
|
||||
"infra_pcie_peri_ck_26m_ck_p2", "csw_infra_f26m_sel", 9),
|
||||
GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P3,
|
||||
"infra_pcie_peri_ck_26m_ck_p3", "csw_infra_f26m_sel", 10),
|
||||
/* INFRA1 */
|
||||
GATE_INFRA1(CLK_INFRA_66M_GPT_BCK, "infra_hf_66m_gpt_bck",
|
||||
"sysaxi_sel", 0),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_HCK, "infra_hf_66m_pwm_hck",
|
||||
"sysaxi_sel", 1),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_BCK, "infra_hf_66m_pwm_bck",
|
||||
"infra_pwm_sel", 2),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK1, "infra_hf_66m_pwm_ck1",
|
||||
"infra_pwm_ck1_sel", 3),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK2, "infra_hf_66m_pwm_ck2",
|
||||
"infra_pwm_ck2_sel", 4),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK3, "infra_hf_66m_pwm_ck3",
|
||||
"infra_pwm_ck3_sel", 5),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK4, "infra_hf_66m_pwm_ck4",
|
||||
"infra_pwm_ck4_sel", 6),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK5, "infra_hf_66m_pwm_ck5",
|
||||
"infra_pwm_ck5_sel", 7),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK6, "infra_hf_66m_pwm_ck6",
|
||||
"infra_pwm_ck6_sel", 8),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK7, "infra_hf_66m_pwm_ck7",
|
||||
"infra_pwm_ck7_sel", 9),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK8, "infra_hf_66m_pwm_ck8",
|
||||
"infra_pwm_ck8_sel", 10),
|
||||
GATE_INFRA1(CLK_INFRA_133M_CQDMA_BCK, "infra_hf_133m_cqdma_bck",
|
||||
"sysaxi_sel", 12),
|
||||
GATE_INFRA1(CLK_INFRA_66M_AUD_SLV_BCK, "infra_66m_aud_slv_bck",
|
||||
"sysaxi_sel", 13),
|
||||
GATE_INFRA1(CLK_INFRA_AUD_26M, "infra_f_faud_26m",
|
||||
"csw_infra_f26m_sel", 14),
|
||||
GATE_INFRA1(CLK_INFRA_AUD_L, "infra_f_faud_l", "aud_l_sel", 15),
|
||||
GATE_INFRA1(CLK_INFRA_AUD_AUD, "infra_f_aud_aud", "a1sys_sel", 16),
|
||||
GATE_INFRA1(CLK_INFRA_AUD_EG2, "infra_f_faud_eg2", "a_tuner_sel", 18),
|
||||
GATE_INFRA1_FLAGS(CLK_INFRA_DRAMC_F26M, "infra_dramc_f26m",
|
||||
"csw_infra_f26m_sel", 19, CLK_IS_CRITICAL),
|
||||
// JTAG
|
||||
GATE_INFRA1_FLAGS(CLK_INFRA_133M_DBG_ACKM, "infra_hf_133m_dbg_ackm",
|
||||
"sysaxi_sel", 20, CLK_IS_CRITICAL),
|
||||
GATE_INFRA1(CLK_INFRA_66M_AP_DMA_BCK, "infra_66m_ap_dma_bck",
|
||||
"sysaxi_sel", 21),
|
||||
GATE_INFRA1(CLK_INFRA_66M_SEJ_BCK, "infra_hf_66m_sej_bck",
|
||||
"sysaxi_sel", 29),
|
||||
GATE_INFRA1(CLK_INFRA_PRE_CK_SEJ_F13M, "infra_pre_ck_sej_f13m",
|
||||
"csw_infra_f26m_sel", 30),
|
||||
/* INFRA2 */
|
||||
GATE_INFRA2(CLK_INFRA_26M_THERM_SYSTEM, "infra_hf_26m_therm_system",
|
||||
"csw_infra_f26m_sel", 0),
|
||||
GATE_INFRA2(CLK_INFRA_I2C_BCK, "infra_i2c_bck", "i2c_sel", 1),
|
||||
GATE_INFRA2(CLK_INFRA_52M_UART0_CK, "infra_f_52m_uart0",
|
||||
"infra_mux_uart0_sel", 3),
|
||||
GATE_INFRA2(CLK_INFRA_52M_UART1_CK, "infra_f_52m_uart1",
|
||||
"infra_mux_uart1_sel", 4),
|
||||
GATE_INFRA2(CLK_INFRA_52M_UART2_CK, "infra_f_52m_uart2",
|
||||
"infra_mux_uart2_sel", 5),
|
||||
GATE_INFRA2(CLK_INFRA_NFI, "infra_f_fnfi", "nfi1x_sel", 9),
|
||||
GATE_INFRA2(CLK_INFRA_SPINFI, "infra_f_fspinfi", "spinfi_sel", 10),
|
||||
GATE_INFRA2_FLAGS(CLK_INFRA_66M_NFI_HCK, "infra_hf_66m_nfi_hck",
|
||||
"sysaxi_sel", 11, CLK_IS_CRITICAL),
|
||||
GATE_INFRA2_FLAGS(CLK_INFRA_104M_SPI0, "infra_hf_104m_spi0",
|
||||
"infra_mux_spi0_sel", 12, CLK_IS_CRITICAL),
|
||||
GATE_INFRA2(CLK_INFRA_104M_SPI1, "infra_hf_104m_spi1",
|
||||
"infra_mux_spi1_sel", 13),
|
||||
GATE_INFRA2(CLK_INFRA_104M_SPI2_BCK, "infra_hf_104m_spi2_bck",
|
||||
"infra_mux_spi2_sel", 14),
|
||||
GATE_INFRA2_FLAGS(CLK_INFRA_66M_SPI0_HCK, "infra_hf_66m_spi0_hck",
|
||||
"sysaxi_sel", 15, CLK_IS_CRITICAL),
|
||||
GATE_INFRA2(CLK_INFRA_66M_SPI1_HCK, "infra_hf_66m_spi1_hck",
|
||||
"sysaxi_sel", 16),
|
||||
GATE_INFRA2(CLK_INFRA_66M_SPI2_HCK, "infra_hf_66m_spi2_hck",
|
||||
"sysaxi_sel", 17),
|
||||
GATE_INFRA2(CLK_INFRA_66M_FLASHIF_AXI, "infra_hf_66m_flashif_axi",
|
||||
"sysaxi_sel", 18),
|
||||
GATE_CRITICAL(CLK_INFRA_RTC, "infra_f_frtc", "top_rtc_32k", &infra2_cg_regs, 19),
|
||||
GATE_INFRA2(CLK_INFRA_26M_ADC_BCK, "infra_f_26m_adc_bck",
|
||||
"csw_infra_f26m_sel", 20),
|
||||
GATE_INFRA2(CLK_INFRA_RC_ADC, "infra_f_frc_adc", "infra_f_26m_adc_bck",
|
||||
21),
|
||||
GATE_INFRA2(CLK_INFRA_MSDC400, "infra_f_fmsdc400", "emmc_400m_sel",
|
||||
22),
|
||||
GATE_INFRA2(CLK_INFRA_MSDC2_HCK, "infra_f_fmsdc2_hck", "emmc_250m_sel",
|
||||
23),
|
||||
GATE_INFRA2(CLK_INFRA_133M_MSDC_0_HCK, "infra_hf_133m_msdc_0_hck",
|
||||
"sysaxi_sel", 24),
|
||||
GATE_INFRA2(CLK_INFRA_66M_MSDC_0_HCK, "infra_66m_msdc_0_hck",
|
||||
"sysaxi_sel", 25),
|
||||
GATE_INFRA2(CLK_INFRA_133M_CPUM_BCK, "infra_hf_133m_cpum_bck",
|
||||
"sysaxi_sel", 26),
|
||||
GATE_INFRA2(CLK_INFRA_BIST2FPC, "infra_hf_fbist2fpc", "nfi1x_sel", 27),
|
||||
GATE_INFRA2(CLK_INFRA_I2C_X16W_MCK_CK_P1,
|
||||
"infra_hf_i2c_x16w_mck_ck_p1", "sysaxi_sel", 29),
|
||||
GATE_INFRA2(CLK_INFRA_I2C_X16W_PCK_CK_P1,
|
||||
"infra_hf_i2c_x16w_pck_ck_p1", "sysaxi_sel", 31),
|
||||
/* INFRA3 */
|
||||
GATE_INFRA3(CLK_INFRA_133M_USB_HCK, "infra_133m_usb_hck", "sysaxi_sel",
|
||||
0),
|
||||
GATE_INFRA3(CLK_INFRA_133M_USB_HCK_CK_P1, "infra_133m_usb_hck_ck_p1",
|
||||
"sysaxi_sel", 1),
|
||||
GATE_INFRA3(CLK_INFRA_66M_USB_HCK, "infra_66m_usb_hck", "sysaxi_sel",
|
||||
2),
|
||||
GATE_INFRA3(CLK_INFRA_66M_USB_HCK_CK_P1, "infra_66m_usb_hck_ck_p1",
|
||||
"sysaxi_sel", 3),
|
||||
GATE_INFRA3(CLK_INFRA_USB_SYS, "infra_usb_sys", "usb_sys_sel", 4),
|
||||
GATE_INFRA3(CLK_INFRA_USB_SYS_CK_P1, "infra_usb_sys_ck_p1",
|
||||
"usb_sys_p1_sel", 5),
|
||||
GATE_INFRA3(CLK_INFRA_USB_REF, "infra_usb_ref", "top_xtal", 6),
|
||||
GATE_INFRA3(CLK_INFRA_USB_CK_P1, "infra_usb_ck_p1", "top_xtal", 7),
|
||||
GATE_INFRA3_FLAGS(CLK_INFRA_USB_FRMCNT, "infra_usb_frmcnt",
|
||||
"usb_frmcnt_sel", 8, CLK_IS_CRITICAL),
|
||||
GATE_INFRA3_FLAGS(CLK_INFRA_USB_FRMCNT_CK_P1, "infra_usb_frmcnt_ck_p1",
|
||||
"usb_frmcnt_p1_sel", 9, CLK_IS_CRITICAL),
|
||||
GATE_INFRA3(CLK_INFRA_USB_PIPE, "infra_usb_pipe", "sspxtp_sel", 10),
|
||||
GATE_INFRA3(CLK_INFRA_USB_PIPE_CK_P1, "infra_usb_pipe_ck_p1",
|
||||
"usb_phy_sel", 11),
|
||||
GATE_INFRA3(CLK_INFRA_USB_UTMI, "infra_usb_utmi", "top_xtal", 12),
|
||||
GATE_INFRA3(CLK_INFRA_USB_UTMI_CK_P1, "infra_usb_utmi_ck_p1",
|
||||
"top_xtal", 13),
|
||||
GATE_INFRA3(CLK_INFRA_USB_XHCI, "infra_usb_xhci", "usb_xhci_sel", 14),
|
||||
GATE_INFRA3(CLK_INFRA_USB_XHCI_CK_P1, "infra_usb_xhci_ck_p1",
|
||||
"usb_xhci_p1_sel", 15),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_GFMUX_TL_P0, "infra_pcie_gfmux_tl_ck_p0",
|
||||
"infra_pcie_gfmux_tl_o_p0_sel", 20),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_GFMUX_TL_P1, "infra_pcie_gfmux_tl_ck_p1",
|
||||
"infra_pcie_gfmux_tl_o_p1_sel", 21),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_GFMUX_TL_P2, "infra_pcie_gfmux_tl_ck_p2",
|
||||
"infra_pcie_gfmux_tl_o_p2_sel", 22),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_GFMUX_TL_P3, "infra_pcie_gfmux_tl_ck_p3",
|
||||
"infra_pcie_gfmux_tl_o_p3_sel", 23),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_PIPE_P0, "infra_pcie_pipe_ck_p0",
|
||||
"top_xtal", 24),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_PIPE_P1, "infra_pcie_pipe_ck_p1",
|
||||
"top_xtal", 25),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_PIPE_P2, "infra_pcie_pipe_ck_p2",
|
||||
"top_xtal", 26),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_PIPE_P3, "infra_pcie_pipe_ck_p3",
|
||||
"top_xtal", 27),
|
||||
GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P0, "infra_133m_pcie_ck_p0",
|
||||
"sysaxi_sel", 28),
|
||||
GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P1, "infra_133m_pcie_ck_p1",
|
||||
"sysaxi_sel", 29),
|
||||
GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P2, "infra_133m_pcie_ck_p2",
|
||||
"sysaxi_sel", 30),
|
||||
GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P3, "infra_133m_pcie_ck_p3",
|
||||
"sysaxi_sel", 31),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc infra_desc = {
|
||||
.clks = infra_clks,
|
||||
.num_clks = ARRAY_SIZE(infra_clks),
|
||||
.mux_clks = infra_muxes,
|
||||
.num_mux_clks = ARRAY_SIZE(infra_muxes),
|
||||
.clk_lock = &mt7988_clk_lock,
|
||||
};
|
||||
|
||||
static const struct of_device_id of_match_clk_mt7988_infracfg[] = {
|
||||
{ .compatible = "mediatek,mt7988-infracfg", .data = &infra_desc },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, of_match_clk_mt7988_infracfg);
|
||||
|
||||
static struct platform_driver clk_mt7988_infracfg_drv = {
|
||||
.driver = {
|
||||
.name = "clk-mt7988-infracfg",
|
||||
.of_match_table = of_match_clk_mt7988_infracfg,
|
||||
},
|
||||
.probe = mtk_clk_simple_probe,
|
||||
.remove = mtk_clk_simple_remove,
|
||||
};
|
||||
module_platform_driver(clk_mt7988_infracfg_drv);
|
||||
@@ -1,446 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2023 MediaTek Inc.
|
||||
* Author: Sam Shih <sam.shih@mediatek.com>
|
||||
* Author: Xiufeng Li <Xiufeng.Li@mediatek.com>
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include "clk-mtk.h"
|
||||
#include "clk-gate.h"
|
||||
#include "clk-mux.h"
|
||||
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
|
||||
|
||||
static DEFINE_SPINLOCK(mt7988_clk_lock);
|
||||
|
||||
static const struct mtk_fixed_clk top_fixed_clks[] = {
|
||||
FIXED_CLK(CLK_TOP_XTAL, "top_xtal", "clkxtal", 40000000),
|
||||
};
|
||||
|
||||
static const struct mtk_fixed_factor top_divs[] = {
|
||||
FACTOR(CLK_TOP_XTAL_D2, "top_xtal_d2", "top_xtal", 1, 2),
|
||||
FACTOR(CLK_TOP_RTC_32K, "top_rtc_32k", "top_xtal", 1, 1250),
|
||||
FACTOR(CLK_TOP_RTC_32P7K, "top_rtc_32p7k", "top_xtal", 1, 1220),
|
||||
FACTOR(CLK_TOP_MPLL_D2, "mpll_d2", "mpll", 1, 2),
|
||||
FACTOR(CLK_TOP_MPLL_D3_D2, "mpll_d3_d2", "mpll", 1, 2),
|
||||
FACTOR(CLK_TOP_MPLL_D4, "mpll_d4", "mpll", 1, 4),
|
||||
FACTOR(CLK_TOP_MPLL_D8, "mpll_d8", "mpll", 1, 8),
|
||||
FACTOR(CLK_TOP_MPLL_D8_D2, "mpll_d8_d2", "mpll", 1, 16),
|
||||
FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
|
||||
FACTOR(CLK_TOP_MMPLL_D3_D5, "mmpll_d3_d5", "mmpll", 1, 15),
|
||||
FACTOR(CLK_TOP_MMPLL_D4, "mmpll_d4", "mmpll", 1, 4),
|
||||
FACTOR(CLK_TOP_MMPLL_D6_D2, "mmpll_d6_d2", "mmpll", 1, 12),
|
||||
FACTOR(CLK_TOP_MMPLL_D8, "mmpll_d8", "mmpll", 1, 8),
|
||||
FACTOR(CLK_TOP_APLL2_D4, "apll2_d4", "apll2", 1, 4),
|
||||
FACTOR(CLK_TOP_NET1PLL_D4, "net1pll_d4", "net1pll", 1, 4),
|
||||
FACTOR(CLK_TOP_NET1PLL_D5, "net1pll_d5", "net1pll", 1, 5),
|
||||
FACTOR(CLK_TOP_NET1PLL_D5_D2, "net1pll_d5_d2", "net1pll", 1, 10),
|
||||
FACTOR(CLK_TOP_NET1PLL_D5_D4, "net1pll_d5_d4", "net1pll", 1, 20),
|
||||
FACTOR(CLK_TOP_NET1PLL_D8, "net1pll_d8", "net1pll", 1, 8),
|
||||
FACTOR(CLK_TOP_NET1PLL_D8_D2, "net1pll_d8_d2", "net1pll", 1, 16),
|
||||
FACTOR(CLK_TOP_NET1PLL_D8_D4, "net1pll_d8_d4", "net1pll", 1, 32),
|
||||
FACTOR(CLK_TOP_NET1PLL_D8_D8, "net1pll_d8_d8", "net1pll", 1, 64),
|
||||
FACTOR(CLK_TOP_NET1PLL_D8_D16, "net1pll_d8_d16", "net1pll", 1, 128),
|
||||
FACTOR(CLK_TOP_NET2PLL_D2, "net2pll_d2", "net2pll", 1, 2),
|
||||
FACTOR(CLK_TOP_NET2PLL_D4, "net2pll_d4", "net2pll", 1, 4),
|
||||
FACTOR(CLK_TOP_NET2PLL_D4_D4, "net2pll_d4_d4", "net2pll", 1, 16),
|
||||
FACTOR(CLK_TOP_NET2PLL_D4_D8, "net2pll_d4_d8", "net2pll", 1, 32),
|
||||
FACTOR(CLK_TOP_NET2PLL_D6, "net2pll_d6", "net2pll", 1, 6),
|
||||
FACTOR(CLK_TOP_NET2PLL_D8, "net2pll_d8", "net2pll", 1, 8),
|
||||
};
|
||||
|
||||
static const char *const netsys_parents[] = { "top_xtal", "net2pll_d2",
|
||||
"mmpll_d2" };
|
||||
|
||||
static const char *const netsys_500m_parents[] = { "top_xtal", "net1pll_d5",
|
||||
"net1pll_d5_d2" };
|
||||
|
||||
static const char *const netsys_2x_parents[] = { "top_xtal", "net2pll",
|
||||
"mmpll" };
|
||||
|
||||
static const char *const netsys_gsw_parents[] = { "top_xtal", "net1pll_d4",
|
||||
"net1pll_d5" };
|
||||
|
||||
static const char *const eth_gmii_parents[] = { "top_xtal", "net1pll_d5_d4" };
|
||||
|
||||
static const char *const netsys_mcu_parents[] = { "top_xtal", "net2pll",
|
||||
"mmpll", "net1pll_d4",
|
||||
"net1pll_d5", "mpll" };
|
||||
|
||||
static const char *const eip197_parents[] = { "top_xtal", "netsyspll",
|
||||
"net2pll", "mmpll",
|
||||
"net1pll_d4", "net1pll_d5" };
|
||||
|
||||
static const char *const axi_infra_parents[] = { "top_xtal", "net1pll_d8_d2" };
|
||||
|
||||
static const char *const uart_parents[] = { "top_xtal", "mpll_d8",
|
||||
"mpll_d8_d2" };
|
||||
|
||||
static const char *const emmc_250m_parents[] = { "top_xtal", "net1pll_d5_d2",
|
||||
"mmpll_d4" };
|
||||
|
||||
static const char *const emmc_400m_parents[] = { "top_xtal", "msdcpll",
|
||||
"mmpll_d2", "mpll_d2",
|
||||
"mmpll_d4", "net1pll_d8_d2" };
|
||||
|
||||
static const char *const spi_parents[] = { "top_xtal", "mpll_d2",
|
||||
"mmpll_d4", "net1pll_d8_d2",
|
||||
"net2pll_d6", "net1pll_d5_d4",
|
||||
"mpll_d4", "net1pll_d8_d4" };
|
||||
|
||||
static const char *const nfi1x_parents[] = { "top_xtal", "mmpll_d4",
|
||||
"net1pll_d8_d2", "net2pll_d6",
|
||||
"mpll_d4", "mmpll_d8",
|
||||
"net1pll_d8_d4", "mpll_d8" };
|
||||
|
||||
static const char *const spinfi_parents[] = { "top_xtal_d2", "top_xtal",
|
||||
"net1pll_d5_d4", "mpll_d4",
|
||||
"mmpll_d8", "net1pll_d8_d4",
|
||||
"mmpll_d6_d2", "mpll_d8" };
|
||||
|
||||
static const char *const pwm_parents[] = { "top_xtal", "net1pll_d8_d2",
|
||||
"net1pll_d5_d4", "mpll_d4",
|
||||
"mpll_d8_d2", "top_rtc_32k" };
|
||||
|
||||
static const char *const i2c_parents[] = { "top_xtal", "net1pll_d5_d4",
|
||||
"mpll_d4", "net1pll_d8_d4" };
|
||||
|
||||
static const char *const pcie_mbist_250m_parents[] = { "top_xtal",
|
||||
"net1pll_d5_d2" };
|
||||
|
||||
static const char *const pextp_tl_ck_parents[] = { "top_xtal", "net2pll_d6",
|
||||
"mmpll_d8", "mpll_d8_d2",
|
||||
"top_rtc_32k" };
|
||||
|
||||
static const char *const usb_frmcnt_parents[] = { "top_xtal", "mmpll_d3_d5" };
|
||||
|
||||
static const char *const aud_parents[] = { "top_xtal", "apll2" };
|
||||
|
||||
static const char *const a1sys_parents[] = { "top_xtal", "apll2_d4" };
|
||||
|
||||
static const char *const aud_l_parents[] = { "top_xtal", "apll2",
|
||||
"mpll_d8_d2" };
|
||||
|
||||
static const char *const sspxtp_parents[] = { "top_xtal_d2", "mpll_d8_d2" };
|
||||
|
||||
static const char *const usxgmii_sbus_0_parents[] = { "top_xtal",
|
||||
"net1pll_d8_d4" };
|
||||
|
||||
static const char *const sgm_0_parents[] = { "top_xtal", "sgmpll" };
|
||||
|
||||
static const char *const sysapb_parents[] = { "top_xtal", "mpll_d3_d2" };
|
||||
|
||||
static const char *const eth_refck_50m_parents[] = { "top_xtal",
|
||||
"net2pll_d4_d4" };
|
||||
|
||||
static const char *const eth_sys_200m_parents[] = { "top_xtal", "net2pll_d4" };
|
||||
|
||||
static const char *const eth_xgmii_parents[] = { "top_xtal_d2",
|
||||
"net1pll_d8_d8",
|
||||
"net1pll_d8_d16" };
|
||||
|
||||
static const char *const bus_tops_parents[] = { "top_xtal", "net1pll_d5",
|
||||
"net2pll_d2" };
|
||||
|
||||
static const char *const npu_tops_parents[] = { "top_xtal", "net2pll" };
|
||||
|
||||
static const char *const dramc_md32_parents[] = { "top_xtal", "mpll_d2",
|
||||
"wedmcupll" };
|
||||
|
||||
static const char *const da_xtp_glb_p0_parents[] = { "top_xtal",
|
||||
"net2pll_d8" };
|
||||
|
||||
static const char *const mcusys_backup_625m_parents[] = { "top_xtal",
|
||||
"net1pll_d4" };
|
||||
|
||||
static const char *const macsec_parents[] = { "top_xtal", "sgmpll",
|
||||
"net1pll_d8" };
|
||||
|
||||
static const char *const netsys_tops_400m_parents[] = { "top_xtal",
|
||||
"net2pll_d2" };
|
||||
|
||||
static const char *const eth_mii_parents[] = { "top_xtal_d2",
|
||||
"net2pll_d4_d8" };
|
||||
|
||||
static const struct mtk_mux top_muxes[] = {
|
||||
/* CLK_CFG_0 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_SEL, "netsys_sel", netsys_parents,
|
||||
0x000, 0x004, 0x008, 0, 2, 7, 0x1c0, 0),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_500M_SEL, "netsys_500m_sel",
|
||||
netsys_500m_parents, 0x000, 0x004, 0x008, 8, 2,
|
||||
15, 0x1C0, 1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_2X_SEL, "netsys_2x_sel",
|
||||
netsys_2x_parents, 0x000, 0x004, 0x008, 16, 2, 23,
|
||||
0x1C0, 2),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_GSW_SEL, "netsys_gsw_sel",
|
||||
netsys_gsw_parents, 0x000, 0x004, 0x008, 24, 2,
|
||||
31, 0x1C0, 3),
|
||||
/* CLK_CFG_1 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_GMII_SEL, "eth_gmii_sel",
|
||||
eth_gmii_parents, 0x010, 0x014, 0x018, 0, 1, 7,
|
||||
0x1C0, 4),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_MCU_SEL, "netsys_mcu_sel",
|
||||
netsys_mcu_parents, 0x010, 0x014, 0x018, 8, 3, 15,
|
||||
0x1C0, 5),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_PAO_2X_SEL, "netsys_pao_2x_sel",
|
||||
netsys_mcu_parents, 0x010, 0x014, 0x018, 16, 3,
|
||||
23, 0x1C0, 6),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_EIP197_SEL, "eip197_sel", eip197_parents,
|
||||
0x010, 0x014, 0x018, 24, 3, 31, 0x1c0, 7),
|
||||
/* CLK_CFG_2 */
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_AXI_INFRA_SEL, "axi_infra_sel",
|
||||
axi_infra_parents, 0x020, 0x024, 0x028, 0,
|
||||
1, 7, 0x1C0, 8, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x020,
|
||||
0x024, 0x028, 8, 2, 15, 0x1c0, 9),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_EMMC_250M_SEL, "emmc_250m_sel",
|
||||
emmc_250m_parents, 0x020, 0x024, 0x028, 16, 2, 23,
|
||||
0x1C0, 10),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_EMMC_400M_SEL, "emmc_400m_sel",
|
||||
emmc_400m_parents, 0x020, 0x024, 0x028, 24, 3, 31,
|
||||
0x1C0, 11),
|
||||
/* CLK_CFG_3 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x030,
|
||||
0x034, 0x038, 0, 3, 7, 0x1c0, 12),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SPIM_MST_SEL, "spim_mst_sel", spi_parents,
|
||||
0x030, 0x034, 0x038, 8, 3, 15, 0x1c0, 13),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NFI1X_SEL, "nfi1x_sel", nfi1x_parents,
|
||||
0x030, 0x034, 0x038, 16, 3, 23, 0x1c0, 14),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SPINFI_SEL, "spinfi_sel", spinfi_parents,
|
||||
0x030, 0x034, 0x038, 24, 3, 31, 0x1c0, 15),
|
||||
/* CLK_CFG_4 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x040,
|
||||
0x044, 0x048, 0, 3, 7, 0x1c0, 16),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, 0x040,
|
||||
0x044, 0x048, 8, 2, 15, 0x1c0, 17),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PCIE_MBIST_250M_SEL,
|
||||
"pcie_mbist_250m_sel", pcie_mbist_250m_parents,
|
||||
0x040, 0x044, 0x048, 16, 1, 23, 0x1C0, 18),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_TL_SEL, "pextp_tl_sel",
|
||||
pextp_tl_ck_parents, 0x040, 0x044, 0x048, 24, 3,
|
||||
31, 0x1C0, 19),
|
||||
/* CLK_CFG_5 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_TL_P1_SEL, "pextp_tl_p1_sel",
|
||||
pextp_tl_ck_parents, 0x050, 0x054, 0x058, 0, 3, 7,
|
||||
0x1C0, 20),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_TL_P2_SEL, "pextp_tl_p2_sel",
|
||||
pextp_tl_ck_parents, 0x050, 0x054, 0x058, 8, 3,
|
||||
15, 0x1C0, 21),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_TL_P3_SEL, "pextp_tl_p3_sel",
|
||||
pextp_tl_ck_parents, 0x050, 0x054, 0x058, 16, 3,
|
||||
23, 0x1C0, 22),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_SYS_SEL, "usb_sys_sel",
|
||||
eth_gmii_parents, 0x050, 0x054, 0x058, 24, 1, 31,
|
||||
0x1C0, 23),
|
||||
/* CLK_CFG_6 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_SYS_P1_SEL, "usb_sys_p1_sel",
|
||||
eth_gmii_parents, 0x060, 0x064, 0x068, 0, 1, 7,
|
||||
0x1C0, 24),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_XHCI_SEL, "usb_xhci_sel",
|
||||
eth_gmii_parents, 0x060, 0x064, 0x068, 8, 1, 15,
|
||||
0x1C0, 25),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_XHCI_P1_SEL, "usb_xhci_p1_sel",
|
||||
eth_gmii_parents, 0x060, 0x064, 0x068, 16, 1, 23,
|
||||
0x1C0, 26),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_FRMCNT_SEL, "usb_frmcnt_sel",
|
||||
usb_frmcnt_parents, 0x060, 0x064, 0x068, 24, 1,
|
||||
31, 0x1C0, 27),
|
||||
/* CLK_CFG_7 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_FRMCNT_P1_SEL, "usb_frmcnt_p1_sel",
|
||||
usb_frmcnt_parents, 0x070, 0x074, 0x078, 0, 1, 7,
|
||||
0x1C0, 28),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_SEL, "aud_sel", aud_parents, 0x070,
|
||||
0x074, 0x078, 8, 1, 15, 0x1c0, 29),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_A1SYS_SEL, "a1sys_sel", a1sys_parents,
|
||||
0x070, 0x074, 0x078, 16, 1, 23, 0x1c0, 30),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_L_SEL, "aud_l_sel", aud_l_parents,
|
||||
0x070, 0x074, 0x078, 24, 2, 31, 0x1c4, 0),
|
||||
/* CLK_CFG_8 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_A_TUNER_SEL, "a_tuner_sel", a1sys_parents,
|
||||
0x080, 0x084, 0x088, 0, 1, 7, 0x1c4, 1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SSPXTP_SEL, "sspxtp_sel", sspxtp_parents,
|
||||
0x080, 0x084, 0x088, 8, 1, 15, 0x1c4, 2),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_PHY_SEL, "usb_phy_sel",
|
||||
sspxtp_parents, 0x080, 0x084, 0x088, 16, 1, 23,
|
||||
0x1c4, 3),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USXGMII_SBUS_0_SEL, "usxgmii_sbus_0_sel",
|
||||
usxgmii_sbus_0_parents, 0x080, 0x084, 0x088, 24,
|
||||
1, 31, 0x1C4, 4),
|
||||
/* CLK_CFG_9 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USXGMII_SBUS_1_SEL, "usxgmii_sbus_1_sel",
|
||||
usxgmii_sbus_0_parents, 0x090, 0x094, 0x098, 0, 1,
|
||||
7, 0x1C4, 5),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_0_SEL, "sgm_0_sel", sgm_0_parents,
|
||||
0x090, 0x094, 0x098, 8, 1, 15, 0x1c4, 6),
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SGM_SBUS_0_SEL, "sgm_sbus_0_sel",
|
||||
usxgmii_sbus_0_parents, 0x090, 0x094, 0x098,
|
||||
16, 1, 23, 0x1C4, 7, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_1_SEL, "sgm_1_sel", sgm_0_parents,
|
||||
0x090, 0x094, 0x098, 24, 1, 31, 0x1c4, 8),
|
||||
/* CLK_CFG_10 */
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SGM_SBUS_1_SEL, "sgm_sbus_1_sel",
|
||||
usxgmii_sbus_0_parents, 0x0a0, 0x0a4, 0x0a8,
|
||||
0, 1, 7, 0x1C4, 9, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_XFI_PHY_0_XTAL_SEL, "xfi_phy_0_xtal_sel",
|
||||
sspxtp_parents, 0x0a0, 0x0a4, 0x0a8, 8, 1, 15,
|
||||
0x1C4, 10),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_XFI_PHY_1_XTAL_SEL, "xfi_phy_1_xtal_sel",
|
||||
sspxtp_parents, 0x0a0, 0x0a4, 0x0a8, 16, 1, 23,
|
||||
0x1C4, 11),
|
||||
/* CLK_CFG_11 */
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SYSAXI_SEL, "sysaxi_sel",
|
||||
axi_infra_parents, 0x0a0, 0x0a4, 0x0a8, 24,
|
||||
1, 31, 0x1C4, 12, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SYSAPB_SEL, "sysapb_sel",
|
||||
sysapb_parents, 0x0b0, 0x0b4, 0x0b8, 0, 1,
|
||||
7, 0x1c4, 13, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_REFCK_50M_SEL, "eth_refck_50m_sel",
|
||||
eth_refck_50m_parents, 0x0b0, 0x0b4, 0x0b8, 8, 1,
|
||||
15, 0x1C4, 14),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_SYS_200M_SEL, "eth_sys_200m_sel",
|
||||
eth_sys_200m_parents, 0x0b0, 0x0b4, 0x0b8, 16, 1,
|
||||
23, 0x1C4, 15),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_SYS_SEL, "eth_sys_sel",
|
||||
pcie_mbist_250m_parents, 0x0b0, 0x0b4, 0x0b8, 24,
|
||||
1, 31, 0x1C4, 16),
|
||||
/* CLK_CFG_12 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_XGMII_SEL, "eth_xgmii_sel",
|
||||
eth_xgmii_parents, 0x0c0, 0x0c4, 0x0c8, 0, 2, 7,
|
||||
0x1C4, 17),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_BUS_TOPS_SEL, "bus_tops_sel",
|
||||
bus_tops_parents, 0x0c0, 0x0c4, 0x0c8, 8, 2, 15,
|
||||
0x1C4, 18),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NPU_TOPS_SEL, "npu_tops_sel",
|
||||
npu_tops_parents, 0x0c0, 0x0c4, 0x0c8, 16, 1, 23,
|
||||
0x1C4, 19),
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_DRAMC_SEL, "dramc_sel",
|
||||
sspxtp_parents, 0x0c0, 0x0c4, 0x0c8, 24, 1,
|
||||
31, 0x1C4, 20, CLK_IS_CRITICAL),
|
||||
/* CLK_CFG_13 */
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_DRAMC_MD32_SEL, "dramc_md32_sel",
|
||||
dramc_md32_parents, 0x0d0, 0x0d4, 0x0d8, 0,
|
||||
2, 7, 0x1C4, 21, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(
|
||||
CLK_TOP_INFRA_F26M_SEL, "csw_infra_f26m_sel", sspxtp_parents,
|
||||
0x0d0, 0x0d4, 0x0d8, 8, 1, 15, 0x1C4, 22, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_P0_SEL, "pextp_p0_sel",
|
||||
sspxtp_parents, 0x0d0, 0x0d4, 0x0d8, 16, 1, 23,
|
||||
0x1C4, 23),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_P1_SEL, "pextp_p1_sel",
|
||||
sspxtp_parents, 0x0d0, 0x0d4, 0x0d8, 24, 1, 31,
|
||||
0x1C4, 24),
|
||||
/* CLK_CFG_14 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_P2_SEL, "pextp_p2_sel",
|
||||
sspxtp_parents, 0x0e0, 0x0e4, 0x0e8, 0, 1, 7,
|
||||
0x1C4, 25),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_P3_SEL, "pextp_p3_sel",
|
||||
sspxtp_parents, 0x0e0, 0x0e4, 0x0e8, 8, 1, 15,
|
||||
0x1C4, 26),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P0_SEL, "da_xtp_glb_p0_sel",
|
||||
da_xtp_glb_p0_parents, 0x0e0, 0x0e4, 0x0e8, 16, 1,
|
||||
23, 0x1C4, 27),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P1_SEL, "da_xtp_glb_p1_sel",
|
||||
da_xtp_glb_p0_parents, 0x0e0, 0x0e4, 0x0e8, 24, 1,
|
||||
31, 0x1C4, 28),
|
||||
/* CLK_CFG_15 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P2_SEL, "da_xtp_glb_p2_sel",
|
||||
da_xtp_glb_p0_parents, 0x0f0, 0x0f4, 0x0f8, 0, 1,
|
||||
7, 0x1C4, 29),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P3_SEL, "da_xtp_glb_p3_sel",
|
||||
da_xtp_glb_p0_parents, 0x0f0, 0x0f4, 0x0f8, 8, 1,
|
||||
15, 0x1C4, 30),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_CKM_SEL, "ckm_sel", sspxtp_parents, 0x0F0,
|
||||
0x0f4, 0x0f8, 16, 1, 23, 0x1c8, 0),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_SEL, "da_sel", sspxtp_parents, 0x0f0,
|
||||
0x0f4, 0x0f8, 24, 1, 31, 0x1C8, 1),
|
||||
/* CLK_CFG_16 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_SEL, "pextp_sel", sspxtp_parents,
|
||||
0x0100, 0x104, 0x108, 0, 1, 7, 0x1c8, 2),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_TOPS_P2_26M_SEL, "tops_p2_26m_sel",
|
||||
sspxtp_parents, 0x0100, 0x104, 0x108, 8, 1, 15,
|
||||
0x1C8, 3),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_MCUSYS_BACKUP_625M_SEL,
|
||||
"mcusys_backup_625m_sel",
|
||||
mcusys_backup_625m_parents, 0x0100, 0x104, 0x108,
|
||||
16, 1, 23, 0x1C8, 4),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_SYNC_250M_SEL,
|
||||
"netsys_sync_250m_sel", pcie_mbist_250m_parents,
|
||||
0x0100, 0x104, 0x108, 24, 1, 31, 0x1c8, 5),
|
||||
/* CLK_CFG_17 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_MACSEC_SEL, "macsec_sel", macsec_parents,
|
||||
0x0110, 0x114, 0x118, 0, 2, 7, 0x1c8, 6),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_TOPS_400M_SEL,
|
||||
"netsys_tops_400m_sel", netsys_tops_400m_parents,
|
||||
0x0110, 0x114, 0x118, 8, 1, 15, 0x1c8, 7),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_PPEFB_250M_SEL,
|
||||
"netsys_ppefb_250m_sel", pcie_mbist_250m_parents,
|
||||
0x0110, 0x114, 0x118, 16, 1, 23, 0x1c8, 8),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_WARP_SEL, "netsys_warp_sel",
|
||||
netsys_parents, 0x0110, 0x114, 0x118, 24, 2, 31,
|
||||
0x1C8, 9),
|
||||
/* CLK_CFG_18 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_MII_SEL, "eth_mii_sel",
|
||||
eth_mii_parents, 0x0120, 0x124, 0x128, 0, 1, 7,
|
||||
0x1c8, 10),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NPU_SEL, "ck_npu_sel", netsys_2x_parents,
|
||||
0x0120, 0x124, 0x128, 8, 2, 15, 0x1c8, 11),
|
||||
};
|
||||
|
||||
static const struct mtk_composite top_aud_divs[] = {
|
||||
DIV_GATE(CLK_TOP_AUD_I2S_M, "aud_i2s_m", "aud_sel", 0x0420, 0, 0x0420,
|
||||
8, 8),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc topck_desc = {
|
||||
.fixed_clks = top_fixed_clks,
|
||||
.num_fixed_clks = ARRAY_SIZE(top_fixed_clks),
|
||||
.factor_clks = top_divs,
|
||||
.num_factor_clks = ARRAY_SIZE(top_divs),
|
||||
.mux_clks = top_muxes,
|
||||
.num_mux_clks = ARRAY_SIZE(top_muxes),
|
||||
.composite_clks = top_aud_divs,
|
||||
.num_composite_clks = ARRAY_SIZE(top_aud_divs),
|
||||
.clk_lock = &mt7988_clk_lock,
|
||||
};
|
||||
|
||||
static const char *const mcu_bus_div_parents[] = { "top_xtal", "ccipll2_b",
|
||||
"net1pll_d4" };
|
||||
|
||||
static const char *const mcu_arm_div_parents[] = { "top_xtal", "arm_b",
|
||||
"net1pll_d4" };
|
||||
|
||||
static struct mtk_composite mcu_muxes[] = {
|
||||
/* bus_pll_divider_cfg */
|
||||
MUX_GATE_FLAGS(CLK_MCU_BUS_DIV_SEL, "mcu_bus_div_sel",
|
||||
mcu_bus_div_parents, 0x7C0, 9, 2, -1, CLK_IS_CRITICAL),
|
||||
/* mp2_pll_divider_cfg */
|
||||
MUX_GATE_FLAGS(CLK_MCU_ARM_DIV_SEL, "mcu_arm_div_sel",
|
||||
mcu_arm_div_parents, 0x7A8, 9, 2, -1, CLK_IS_CRITICAL),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc mcusys_desc = {
|
||||
.composite_clks = mcu_muxes,
|
||||
.num_composite_clks = ARRAY_SIZE(mcu_muxes),
|
||||
};
|
||||
|
||||
static const struct of_device_id of_match_clk_mt7988_topckgen[] = {
|
||||
{ .compatible = "mediatek,mt7988-topckgen", .data = &topck_desc },
|
||||
{ .compatible = "mediatek,mt7988-mcusys", .data = &mcusys_desc },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, of_match_clk_mt7988_topckgen);
|
||||
|
||||
static struct platform_driver clk_mt7988_topckgen_drv = {
|
||||
.probe = mtk_clk_simple_probe,
|
||||
.remove = mtk_clk_simple_remove,
|
||||
.driver = {
|
||||
.name = "clk-mt7988-topckgen",
|
||||
.of_match_table = of_match_clk_mt7988_topckgen,
|
||||
},
|
||||
};
|
||||
module_platform_driver(clk_mt7988_topckgen_drv);
|
||||
MODULE_LICENSE("GPL");
|
||||
@@ -7,12 +7,14 @@
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
#include <linux/phy.h>
|
||||
#include <linux/pm_domain.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
|
||||
#define MEDAITEK_2P5GE_PHY_DMB_FW "mediatek/mediatek-2p5ge-phy-dmb.bin"
|
||||
#define MEDIATEK_2P5GE_PHY_PMB_FW "mediatek/mediatek-2p5ge-phy-pmb.bin"
|
||||
#define MT7988_2P5GE_PMB "mediatek/mt7988/i2p5ge-phy-pmb.bin"
|
||||
|
||||
#define MD32_EN_CFG 0x18
|
||||
#define MD32_EN BIT(0)
|
||||
#define PMEM_PRIORITY BIT(8)
|
||||
#define DMEM_PRIORITY BIT(16)
|
||||
|
||||
#define BASE100T_STATUS_EXTEND 0x10
|
||||
#define BASE1000T_STATUS_EXTEND 0x11
|
||||
@@ -26,6 +28,9 @@
|
||||
#define MTK_PHY_LINK_STATUS_MISC 0xa2
|
||||
#define MTK_PHY_FDX_ENABLE BIT(5)
|
||||
|
||||
#define MTK_PHY_LPI_PCS_DSP_CTRL 0x121
|
||||
#define MTK_PHY_LPI_SIG_EN_LO_THRESH100_MASK GENMASK(12, 8)
|
||||
|
||||
/* Registers on MDIO_MMD_VEND2 */
|
||||
#define MTK_PHY_LED0_ON_CTRL 0x24
|
||||
#define MTK_PHY_LED0_ON_LINK1000 BIT(0)
|
||||
@@ -39,6 +44,14 @@
|
||||
#define MTK_PHY_LED1_ON_HDX BIT(5)
|
||||
#define MTK_PHY_LED1_POLARITY BIT(14)
|
||||
|
||||
#define MTK_EXT_PAGE_ACCESS 0x1f
|
||||
#define MTK_PHY_PAGE_STANDARD 0x0000
|
||||
#define MTK_PHY_PAGE_EXTENDED_52B5 0x52b5
|
||||
|
||||
struct mtk_i2p5ge_phy_priv {
|
||||
bool fw_loaded;
|
||||
};
|
||||
|
||||
enum {
|
||||
PHY_AUX_SPD_10 = 0,
|
||||
PHY_AUX_SPD_100,
|
||||
@@ -46,67 +59,89 @@ enum {
|
||||
PHY_AUX_SPD_2500,
|
||||
};
|
||||
|
||||
static int mt798x_2p5ge_phy_config_init(struct phy_device *phydev)
|
||||
static int mtk_2p5ge_phy_read_page(struct phy_device *phydev)
|
||||
{
|
||||
int ret;
|
||||
int i;
|
||||
return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);
|
||||
}
|
||||
|
||||
static int mtk_2p5ge_phy_write_page(struct phy_device *phydev, int page)
|
||||
{
|
||||
return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page);
|
||||
}
|
||||
|
||||
static int mt7988_2p5ge_phy_probe(struct phy_device *phydev)
|
||||
{
|
||||
struct mtk_i2p5ge_phy_priv *phy_priv;
|
||||
|
||||
phy_priv = devm_kzalloc(&phydev->mdio.dev,
|
||||
sizeof(struct mtk_i2p5ge_phy_priv), GFP_KERNEL);
|
||||
if (!phy_priv)
|
||||
return -ENOMEM;
|
||||
|
||||
phydev->priv = phy_priv;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mt7988_2p5ge_phy_config_init(struct phy_device *phydev)
|
||||
{
|
||||
int ret, i;
|
||||
const struct firmware *fw;
|
||||
struct device *dev = &phydev->mdio.dev;
|
||||
struct device_node *np;
|
||||
void __iomem *dmb_addr;
|
||||
void __iomem *pmb_addr;
|
||||
void __iomem *mcucsr_base;
|
||||
void __iomem *md32_en_cfg_base;
|
||||
struct mtk_i2p5ge_phy_priv *phy_priv = phydev->priv;
|
||||
u16 reg;
|
||||
struct pinctrl *pinctrl;
|
||||
|
||||
if (!phy_priv->fw_loaded) {
|
||||
np = of_find_compatible_node(NULL, NULL, "mediatek,2p5gphy-fw");
|
||||
if (!np)
|
||||
return -ENOENT;
|
||||
|
||||
dmb_addr = of_iomap(np, 0);
|
||||
if (!dmb_addr)
|
||||
return -ENOMEM;
|
||||
pmb_addr = of_iomap(np, 1);
|
||||
pmb_addr = of_iomap(np, 0);
|
||||
if (!pmb_addr)
|
||||
return -ENOMEM;
|
||||
mcucsr_base = of_iomap(np, 2);
|
||||
if (!mcucsr_base)
|
||||
md32_en_cfg_base = of_iomap(np, 1);
|
||||
if (!md32_en_cfg_base)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = request_firmware(&fw, MEDAITEK_2P5GE_PHY_DMB_FW, dev);
|
||||
ret = request_firmware(&fw, MT7988_2P5GE_PMB, dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to load firmware: %s, ret: %d\n",
|
||||
MEDAITEK_2P5GE_PHY_DMB_FW, ret);
|
||||
MT7988_2P5GE_PMB, ret);
|
||||
return ret;
|
||||
}
|
||||
for (i = 0; i < fw->size - 1; i += 4)
|
||||
writel(*((uint32_t *)(fw->data + i)), dmb_addr + i);
|
||||
release_firmware(fw);
|
||||
|
||||
ret = request_firmware(&fw, MEDIATEK_2P5GE_PHY_PMB_FW, dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to load firmware: %s, ret: %d\n",
|
||||
MEDIATEK_2P5GE_PHY_PMB_FW, ret);
|
||||
return ret;
|
||||
reg = readw(md32_en_cfg_base);
|
||||
if (reg & MD32_EN) {
|
||||
phy_set_bits(phydev, 0, BIT(15));
|
||||
usleep_range(10000, 11000);
|
||||
}
|
||||
phy_set_bits(phydev, 0, BIT(11));
|
||||
|
||||
/* Write magic number to safely stall MCU */
|
||||
phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x800e, 0x1100);
|
||||
phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x800f, 0x00df);
|
||||
|
||||
for (i = 0; i < fw->size - 1; i += 4)
|
||||
writel(*((uint32_t *)(fw->data + i)), pmb_addr + i);
|
||||
release_firmware(fw);
|
||||
|
||||
reg = readw(mcucsr_base + MD32_EN_CFG);
|
||||
writew(reg | MD32_EN, mcucsr_base + MD32_EN_CFG);
|
||||
dev_dbg(dev, "Firmware loading/trigger ok.\n");
|
||||
writew(reg & ~MD32_EN, md32_en_cfg_base);
|
||||
writew(reg | MD32_EN, md32_en_cfg_base);
|
||||
phy_set_bits(phydev, 0, BIT(15));
|
||||
dev_info(dev, "Firmware loading/trigger ok.\n");
|
||||
|
||||
phy_priv->fw_loaded = true;
|
||||
}
|
||||
|
||||
/* Setup LED */
|
||||
phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_ON_CTRL,
|
||||
MTK_PHY_LED0_POLARITY);
|
||||
|
||||
phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_ON_CTRL,
|
||||
MTK_PHY_LED0_ON_LINK10 |
|
||||
MTK_PHY_LED0_ON_LINK100 |
|
||||
MTK_PHY_LED0_ON_LINK1000 |
|
||||
MTK_PHY_LED0_ON_LINK2500);
|
||||
|
||||
phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED1_ON_CTRL,
|
||||
MTK_PHY_LED1_ON_FDX | MTK_PHY_LED1_ON_HDX);
|
||||
|
||||
@@ -116,10 +151,20 @@ static int mt798x_2p5ge_phy_config_init(struct phy_device *phydev)
|
||||
return PTR_ERR(pinctrl);
|
||||
}
|
||||
|
||||
phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LPI_PCS_DSP_CTRL,
|
||||
MTK_PHY_LPI_SIG_EN_LO_THRESH100_MASK, 0);
|
||||
|
||||
/* Enable 16-bit next page exchange bit if 1000-BT isn't advertizing */
|
||||
phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
|
||||
__phy_write(phydev, 0x11, 0xfbfa);
|
||||
__phy_write(phydev, 0x12, 0xc3);
|
||||
__phy_write(phydev, 0x10, 0x87f8);
|
||||
phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mt798x_2p5ge_phy_config_aneg(struct phy_device *phydev)
|
||||
static int mt7988_2p5ge_phy_config_aneg(struct phy_device *phydev)
|
||||
{
|
||||
bool changed = false;
|
||||
u32 adv;
|
||||
@@ -152,7 +197,7 @@ static int mt798x_2p5ge_phy_config_aneg(struct phy_device *phydev)
|
||||
return genphy_c45_check_and_restart_aneg(phydev, changed);
|
||||
}
|
||||
|
||||
static int mt798x_2p5ge_phy_get_features(struct phy_device *phydev)
|
||||
static int mt7988_2p5ge_phy_get_features(struct phy_device *phydev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
@@ -160,7 +205,7 @@ static int mt798x_2p5ge_phy_get_features(struct phy_device *phydev)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* We don't support HDX at MAC layer on mt798x.
|
||||
/* We don't support HDX at MAC layer on mt7988.
|
||||
* So mask phy's HDX capabilities, too.
|
||||
*/
|
||||
linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
|
||||
@@ -176,7 +221,7 @@ static int mt798x_2p5ge_phy_get_features(struct phy_device *phydev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mt798x_2p5ge_phy_read_status(struct phy_device *phydev)
|
||||
static int mt7988_2p5ge_phy_read_status(struct phy_device *phydev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
@@ -189,9 +234,6 @@ static int mt798x_2p5ge_phy_read_status(struct phy_device *phydev)
|
||||
phydev->pause = 0;
|
||||
phydev->asym_pause = 0;
|
||||
|
||||
if (!phydev->link)
|
||||
return 0;
|
||||
|
||||
if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
|
||||
ret = genphy_c45_read_lpa(phydev);
|
||||
if (ret < 0)
|
||||
@@ -222,7 +264,6 @@ static int mt798x_2p5ge_phy_read_status(struct phy_device *phydev)
|
||||
break;
|
||||
case PHY_AUX_SPD_2500:
|
||||
phydev->speed = SPEED_2500;
|
||||
phydev->duplex = DUPLEX_FULL; /* 2.5G must be FDX */
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -231,18 +272,32 @@ static int mt798x_2p5ge_phy_read_status(struct phy_device *phydev)
|
||||
return ret;
|
||||
|
||||
phydev->duplex = (ret & MTK_PHY_FDX_ENABLE) ? DUPLEX_FULL : DUPLEX_HALF;
|
||||
/* FIXME: The current firmware always enables rate adaptation mode. */
|
||||
phydev->rate_matching = RATE_MATCH_PAUSE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mt7988_2p5ge_phy_get_rate_matching(struct phy_device *phydev,
|
||||
phy_interface_t iface)
|
||||
{
|
||||
return RATE_MATCH_PAUSE;
|
||||
}
|
||||
|
||||
static struct phy_driver mtk_gephy_driver[] = {
|
||||
{
|
||||
PHY_ID_MATCH_EXACT(0x00339c11),
|
||||
PHY_ID_MATCH_MODEL(0x00339c11),
|
||||
.name = "MediaTek MT798x 2.5GbE PHY",
|
||||
.config_init = mt798x_2p5ge_phy_config_init,
|
||||
.config_aneg = mt798x_2p5ge_phy_config_aneg,
|
||||
.get_features = mt798x_2p5ge_phy_get_features,
|
||||
.read_status = mt798x_2p5ge_phy_read_status,
|
||||
.probe = mt7988_2p5ge_phy_probe,
|
||||
.config_init = mt7988_2p5ge_phy_config_init,
|
||||
.config_aneg = mt7988_2p5ge_phy_config_aneg,
|
||||
.get_features = mt7988_2p5ge_phy_get_features,
|
||||
.read_status = mt7988_2p5ge_phy_read_status,
|
||||
.get_rate_matching = mt7988_2p5ge_phy_get_rate_matching,
|
||||
.suspend = genphy_suspend,
|
||||
.resume = genphy_resume,
|
||||
.read_page = mtk_2p5ge_phy_read_page,
|
||||
.write_page = mtk_2p5ge_phy_write_page,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -258,5 +313,4 @@ MODULE_AUTHOR("SkyLake Huang <SkyLake.Huang@mediatek.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
MODULE_DEVICE_TABLE(mdio, mtk_2p5ge_phy_tbl);
|
||||
MODULE_FIRMWARE(MEDAITEK_2P5GE_PHY_DMB_FW);
|
||||
MODULE_FIRMWARE(MEDIATEK_2P5GE_PHY_PMB_FW);
|
||||
MODULE_FIRMWARE(MT7988_2P5GE_PMB);
|
||||
|
||||
@@ -596,6 +596,51 @@ static const struct mtk_pin_field_calc mt7988_pin_r1_range[] = {
|
||||
PIN_FIELD_BASE(83, 83, 1, 0x90, 0x10, 15, 1),
|
||||
};
|
||||
|
||||
static const unsigned int mt7988_pull_type[] = {
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*0*/ MTK_PULL_PUPD_R1R0_TYPE,/*1*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*2*/ MTK_PULL_PUPD_R1R0_TYPE,/*3*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*4*/ MTK_PULL_PUPD_R1R0_TYPE,/*5*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*6*/ MTK_PULL_PU_PD_TYPE, /*7*/
|
||||
MTK_PULL_PU_PD_TYPE, /*8*/ MTK_PULL_PU_PD_TYPE, /*9*/
|
||||
MTK_PULL_PU_PD_TYPE, /*10*/ MTK_PULL_PUPD_R1R0_TYPE,/*11*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*12*/ MTK_PULL_PU_PD_TYPE, /*13*/
|
||||
MTK_PULL_PU_PD_TYPE, /*14*/ MTK_PULL_PD_TYPE, /*15*/
|
||||
MTK_PULL_PD_TYPE, /*16*/ MTK_PULL_PD_TYPE, /*17*/
|
||||
MTK_PULL_PD_TYPE, /*18*/ MTK_PULL_PUPD_R1R0_TYPE,/*19*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*20*/ MTK_PULL_PUPD_R1R0_TYPE,/*21*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*22*/ MTK_PULL_PUPD_R1R0_TYPE,/*23*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*24*/ MTK_PULL_PUPD_R1R0_TYPE,/*25*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*26*/ MTK_PULL_PUPD_R1R0_TYPE,/*27*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*28*/ MTK_PULL_PUPD_R1R0_TYPE,/*29*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*30*/ MTK_PULL_PUPD_R1R0_TYPE,/*31*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*32*/ MTK_PULL_PUPD_R1R0_TYPE,/*33*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*34*/ MTK_PULL_PUPD_R1R0_TYPE,/*35*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*36*/ MTK_PULL_PUPD_R1R0_TYPE,/*37*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*38*/ MTK_PULL_PUPD_R1R0_TYPE,/*39*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*40*/ MTK_PULL_PUPD_R1R0_TYPE,/*41*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*42*/ MTK_PULL_PUPD_R1R0_TYPE,/*43*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*44*/ MTK_PULL_PUPD_R1R0_TYPE,/*45*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*46*/ MTK_PULL_PUPD_R1R0_TYPE,/*47*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*48*/ MTK_PULL_PUPD_R1R0_TYPE,/*49*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*50*/ MTK_PULL_PUPD_R1R0_TYPE,/*51*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*52*/ MTK_PULL_PUPD_R1R0_TYPE,/*53*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*54*/ MTK_PULL_PUPD_R1R0_TYPE,/*55*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*56*/ MTK_PULL_PUPD_R1R0_TYPE,/*57*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*58*/ MTK_PULL_PUPD_R1R0_TYPE,/*59*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*60*/ MTK_PULL_PUPD_R1R0_TYPE,/*61*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*62*/ MTK_PULL_PU_PD_TYPE, /*63*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*64*/ MTK_PULL_PUPD_R1R0_TYPE,/*65*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*66*/ MTK_PULL_PUPD_R1R0_TYPE,/*67*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*68*/ MTK_PULL_PUPD_R1R0_TYPE,/*69*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*70*/ MTK_PULL_PD_TYPE, /*71*/
|
||||
MTK_PULL_PD_TYPE, /*72*/ MTK_PULL_PUPD_R1R0_TYPE,/*73*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*74*/ MTK_PULL_PU_PD_TYPE, /*75*/
|
||||
MTK_PULL_PU_PD_TYPE, /*76*/ MTK_PULL_PU_PD_TYPE, /*77*/
|
||||
MTK_PULL_PU_PD_TYPE, /*78*/ MTK_PULL_PU_PD_TYPE, /*79*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*80*/ MTK_PULL_PUPD_R1R0_TYPE,/*81*/
|
||||
MTK_PULL_PUPD_R1R0_TYPE,/*82*/ MTK_PULL_PUPD_R1R0_TYPE,/*83*/
|
||||
};
|
||||
|
||||
static const struct mtk_pin_reg_calc mt7988_reg_cals[] = {
|
||||
[PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7988_pin_mode_range),
|
||||
[PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7988_pin_dir_range),
|
||||
@@ -992,11 +1037,11 @@ static int mt7988_uart2_3_funcs[] = { 3, 3, 3, 3 };
|
||||
static int mt7988_uart1_2_pins[] = { 80, 81, 82, 83 };
|
||||
static int mt7988_uart1_2_funcs[] = { 1, 1, 1, 1 };
|
||||
|
||||
static int mt7988_uart1_2_lite_pins[] = { 80, 81 };
|
||||
static int mt7988_uart1_2_lite_funcs[] = { 1, 1 };
|
||||
|
||||
static int mt7988_tops_uart1_2_pins[] = { 80, 81 };
|
||||
static int mt7988_tops_uart1_2_funcs[] = {
|
||||
4,
|
||||
4,
|
||||
};
|
||||
static int mt7988_tops_uart1_2_funcs[] = { 4, 4, };
|
||||
|
||||
static int mt7988_net_wo0_uart_txd_1_pins[] = { 80 };
|
||||
static int mt7988_net_wo0_uart_txd_1_funcs[] = { 3 };
|
||||
@@ -1254,6 +1299,8 @@ static const struct group_desc mt7988_groups[] = {
|
||||
PINCTRL_PIN_GROUP("pcie_wake_n2_1", mt7988_pcie_wake_n2_1),
|
||||
/* @GPIO(80,81,82,83) uart1_2 */
|
||||
PINCTRL_PIN_GROUP("uart1_2", mt7988_uart1_2),
|
||||
/* @GPIO(80,81) uart1_2_lite */
|
||||
PINCTRL_PIN_GROUP("uart1_2_lite", mt7988_uart1_2_lite),
|
||||
/* @GPIO(80) pwm2 */
|
||||
PINCTRL_PIN_GROUP("pwm2", mt7988_pwm2),
|
||||
/* @GPIO(81) pwm3 */
|
||||
@@ -1363,6 +1410,7 @@ static const char * const mt7988_uart_groups[] = {
|
||||
"uart1_1",
|
||||
"uart2_3",
|
||||
"uart1_2",
|
||||
"uart1_2_lite",
|
||||
"tops_uart1_2",
|
||||
"net_wo0_uart_txd_1",
|
||||
"net_wo1_uart_txd_1",
|
||||
@@ -1433,6 +1481,9 @@ static struct mtk_pin_soc mt7988_data = {
|
||||
.bias_disable_get = mtk_pinconf_bias_disable_get,
|
||||
.bias_set = mtk_pinconf_bias_set,
|
||||
.bias_get = mtk_pinconf_bias_get,
|
||||
.pull_type = mt7988_pull_type,
|
||||
.bias_set_combo = mtk_pinconf_bias_set_combo,
|
||||
.bias_get_combo = mtk_pinconf_bias_get_combo,
|
||||
.drive_set = mtk_pinconf_drive_set_rev1,
|
||||
.drive_get = mtk_pinconf_drive_get_rev1,
|
||||
.adv_pull_get = mtk_pinconf_adv_pull_get,
|
||||
|
||||
@@ -1,276 +0,0 @@
|
||||
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
|
||||
/*
|
||||
* Copyright (c) 2023 MediaTek Inc.
|
||||
* Author: Sam Shih <sam.shih@mediatek.com>
|
||||
* Author: Xiufeng Li <Xiufeng.Li@mediatek.com>
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_CLK_MT7988_H
|
||||
#define _DT_BINDINGS_CLK_MT7988_H
|
||||
|
||||
/* APMIXEDSYS */
|
||||
|
||||
#define CLK_APMIXED_NETSYSPLL 0
|
||||
#define CLK_APMIXED_MPLL 1
|
||||
#define CLK_APMIXED_MMPLL 2
|
||||
#define CLK_APMIXED_APLL2 3
|
||||
#define CLK_APMIXED_NET1PLL 4
|
||||
#define CLK_APMIXED_NET2PLL 5
|
||||
#define CLK_APMIXED_WEDMCUPLL 6
|
||||
#define CLK_APMIXED_SGMPLL 7
|
||||
#define CLK_APMIXED_ARM_B 8
|
||||
#define CLK_APMIXED_CCIPLL2_B 9
|
||||
#define CLK_APMIXED_USXGMIIPLL 10
|
||||
#define CLK_APMIXED_MSDCPLL 11
|
||||
|
||||
/* TOPCKGEN */
|
||||
|
||||
#define CLK_TOP_XTAL 0
|
||||
#define CLK_TOP_XTAL_D2 1
|
||||
#define CLK_TOP_RTC_32K 2
|
||||
#define CLK_TOP_RTC_32P7K 3
|
||||
#define CLK_TOP_MPLL_D2 4
|
||||
#define CLK_TOP_MPLL_D3_D2 5
|
||||
#define CLK_TOP_MPLL_D4 6
|
||||
#define CLK_TOP_MPLL_D8 7
|
||||
#define CLK_TOP_MPLL_D8_D2 8
|
||||
#define CLK_TOP_MMPLL_D2 9
|
||||
#define CLK_TOP_MMPLL_D3_D5 10
|
||||
#define CLK_TOP_MMPLL_D4 11
|
||||
#define CLK_TOP_MMPLL_D6_D2 12
|
||||
#define CLK_TOP_MMPLL_D8 13
|
||||
#define CLK_TOP_APLL2_D4 14
|
||||
#define CLK_TOP_NET1PLL_D4 15
|
||||
#define CLK_TOP_NET1PLL_D5 16
|
||||
#define CLK_TOP_NET1PLL_D5_D2 17
|
||||
#define CLK_TOP_NET1PLL_D5_D4 18
|
||||
#define CLK_TOP_NET1PLL_D8 19
|
||||
#define CLK_TOP_NET1PLL_D8_D2 20
|
||||
#define CLK_TOP_NET1PLL_D8_D4 21
|
||||
#define CLK_TOP_NET1PLL_D8_D8 22
|
||||
#define CLK_TOP_NET1PLL_D8_D16 23
|
||||
#define CLK_TOP_NET2PLL_D2 24
|
||||
#define CLK_TOP_NET2PLL_D4 25
|
||||
#define CLK_TOP_NET2PLL_D4_D4 26
|
||||
#define CLK_TOP_NET2PLL_D4_D8 27
|
||||
#define CLK_TOP_NET2PLL_D6 28
|
||||
#define CLK_TOP_NET2PLL_D8 29
|
||||
#define CLK_TOP_NETSYS_SEL 30
|
||||
#define CLK_TOP_NETSYS_500M_SEL 31
|
||||
#define CLK_TOP_NETSYS_2X_SEL 32
|
||||
#define CLK_TOP_NETSYS_GSW_SEL 33
|
||||
#define CLK_TOP_ETH_GMII_SEL 34
|
||||
#define CLK_TOP_NETSYS_MCU_SEL 35
|
||||
#define CLK_TOP_NETSYS_PAO_2X_SEL 36
|
||||
#define CLK_TOP_EIP197_SEL 37
|
||||
#define CLK_TOP_AXI_INFRA_SEL 38
|
||||
#define CLK_TOP_UART_SEL 39
|
||||
#define CLK_TOP_EMMC_250M_SEL 40
|
||||
#define CLK_TOP_EMMC_400M_SEL 41
|
||||
#define CLK_TOP_SPI_SEL 42
|
||||
#define CLK_TOP_SPIM_MST_SEL 43
|
||||
#define CLK_TOP_NFI1X_SEL 44
|
||||
#define CLK_TOP_SPINFI_SEL 45
|
||||
#define CLK_TOP_PWM_SEL 46
|
||||
#define CLK_TOP_I2C_SEL 47
|
||||
#define CLK_TOP_PCIE_MBIST_250M_SEL 48
|
||||
#define CLK_TOP_PEXTP_TL_SEL 49
|
||||
#define CLK_TOP_PEXTP_TL_P1_SEL 50
|
||||
#define CLK_TOP_PEXTP_TL_P2_SEL 51
|
||||
#define CLK_TOP_PEXTP_TL_P3_SEL 52
|
||||
#define CLK_TOP_USB_SYS_SEL 53
|
||||
#define CLK_TOP_USB_SYS_P1_SEL 54
|
||||
#define CLK_TOP_USB_XHCI_SEL 55
|
||||
#define CLK_TOP_USB_XHCI_P1_SEL 56
|
||||
#define CLK_TOP_USB_FRMCNT_SEL 57
|
||||
#define CLK_TOP_USB_FRMCNT_P1_SEL 58
|
||||
#define CLK_TOP_AUD_SEL 59
|
||||
#define CLK_TOP_A1SYS_SEL 60
|
||||
#define CLK_TOP_AUD_L_SEL 61
|
||||
#define CLK_TOP_A_TUNER_SEL 62
|
||||
#define CLK_TOP_SSPXTP_SEL 63
|
||||
#define CLK_TOP_USB_PHY_SEL 64
|
||||
#define CLK_TOP_USXGMII_SBUS_0_SEL 65
|
||||
#define CLK_TOP_USXGMII_SBUS_1_SEL 66
|
||||
#define CLK_TOP_SGM_0_SEL 67
|
||||
#define CLK_TOP_SGM_SBUS_0_SEL 68
|
||||
#define CLK_TOP_SGM_1_SEL 69
|
||||
#define CLK_TOP_SGM_SBUS_1_SEL 70
|
||||
#define CLK_TOP_XFI_PHY_0_XTAL_SEL 71
|
||||
#define CLK_TOP_XFI_PHY_1_XTAL_SEL 72
|
||||
#define CLK_TOP_SYSAXI_SEL 73
|
||||
#define CLK_TOP_SYSAPB_SEL 74
|
||||
#define CLK_TOP_ETH_REFCK_50M_SEL 75
|
||||
#define CLK_TOP_ETH_SYS_200M_SEL 76
|
||||
#define CLK_TOP_ETH_SYS_SEL 77
|
||||
#define CLK_TOP_ETH_XGMII_SEL 78
|
||||
#define CLK_TOP_BUS_TOPS_SEL 79
|
||||
#define CLK_TOP_NPU_TOPS_SEL 80
|
||||
#define CLK_TOP_DRAMC_SEL 81
|
||||
#define CLK_TOP_DRAMC_MD32_SEL 82
|
||||
#define CLK_TOP_INFRA_F26M_SEL 83
|
||||
#define CLK_TOP_PEXTP_P0_SEL 84
|
||||
#define CLK_TOP_PEXTP_P1_SEL 85
|
||||
#define CLK_TOP_PEXTP_P2_SEL 86
|
||||
#define CLK_TOP_PEXTP_P3_SEL 87
|
||||
#define CLK_TOP_DA_XTP_GLB_P0_SEL 88
|
||||
#define CLK_TOP_DA_XTP_GLB_P1_SEL 89
|
||||
#define CLK_TOP_DA_XTP_GLB_P2_SEL 90
|
||||
#define CLK_TOP_DA_XTP_GLB_P3_SEL 91
|
||||
#define CLK_TOP_CKM_SEL 92
|
||||
#define CLK_TOP_DA_SEL 93
|
||||
#define CLK_TOP_PEXTP_SEL 94
|
||||
#define CLK_TOP_TOPS_P2_26M_SEL 95
|
||||
#define CLK_TOP_MCUSYS_BACKUP_625M_SEL 96
|
||||
#define CLK_TOP_NETSYS_SYNC_250M_SEL 97
|
||||
#define CLK_TOP_MACSEC_SEL 98
|
||||
#define CLK_TOP_NETSYS_TOPS_400M_SEL 99
|
||||
#define CLK_TOP_NETSYS_PPEFB_250M_SEL 100
|
||||
#define CLK_TOP_NETSYS_WARP_SEL 101
|
||||
#define CLK_TOP_ETH_MII_SEL 102
|
||||
#define CLK_TOP_NPU_SEL 103
|
||||
#define CLK_TOP_AUD_I2S_M 104
|
||||
|
||||
/* MCUSYS */
|
||||
|
||||
#define CLK_MCU_BUS_DIV_SEL 0
|
||||
#define CLK_MCU_ARM_DIV_SEL 1
|
||||
|
||||
/* INFRACFG_AO */
|
||||
|
||||
#define CLK_INFRA_MUX_UART0_SEL 0
|
||||
#define CLK_INFRA_MUX_UART1_SEL 1
|
||||
#define CLK_INFRA_MUX_UART2_SEL 2
|
||||
#define CLK_INFRA_MUX_SPI0_SEL 3
|
||||
#define CLK_INFRA_MUX_SPI1_SEL 4
|
||||
#define CLK_INFRA_MUX_SPI2_SEL 5
|
||||
#define CLK_INFRA_PWM_SEL 6
|
||||
#define CLK_INFRA_PWM_CK1_SEL 7
|
||||
#define CLK_INFRA_PWM_CK2_SEL 8
|
||||
#define CLK_INFRA_PWM_CK3_SEL 9
|
||||
#define CLK_INFRA_PWM_CK4_SEL 10
|
||||
#define CLK_INFRA_PWM_CK5_SEL 11
|
||||
#define CLK_INFRA_PWM_CK6_SEL 12
|
||||
#define CLK_INFRA_PWM_CK7_SEL 13
|
||||
#define CLK_INFRA_PWM_CK8_SEL 14
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_O_P0_SEL 15
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_O_P1_SEL 16
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_O_P2_SEL 17
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_O_P3_SEL 18
|
||||
|
||||
/* INFRACFG */
|
||||
|
||||
#define CLK_INFRA_PCIE_PERI_26M_CK_P0 19
|
||||
#define CLK_INFRA_PCIE_PERI_26M_CK_P1 20
|
||||
#define CLK_INFRA_PCIE_PERI_26M_CK_P2 21
|
||||
#define CLK_INFRA_PCIE_PERI_26M_CK_P3 22
|
||||
#define CLK_INFRA_66M_GPT_BCK 23
|
||||
#define CLK_INFRA_66M_PWM_HCK 24
|
||||
#define CLK_INFRA_66M_PWM_BCK 25
|
||||
#define CLK_INFRA_66M_PWM_CK1 26
|
||||
#define CLK_INFRA_66M_PWM_CK2 27
|
||||
#define CLK_INFRA_66M_PWM_CK3 28
|
||||
#define CLK_INFRA_66M_PWM_CK4 29
|
||||
#define CLK_INFRA_66M_PWM_CK5 30
|
||||
#define CLK_INFRA_66M_PWM_CK6 31
|
||||
#define CLK_INFRA_66M_PWM_CK7 32
|
||||
#define CLK_INFRA_66M_PWM_CK8 33
|
||||
#define CLK_INFRA_133M_CQDMA_BCK 34
|
||||
#define CLK_INFRA_66M_AUD_SLV_BCK 35
|
||||
#define CLK_INFRA_AUD_26M 36
|
||||
#define CLK_INFRA_AUD_L 37
|
||||
#define CLK_INFRA_AUD_AUD 38
|
||||
#define CLK_INFRA_AUD_EG2 39
|
||||
#define CLK_INFRA_DRAMC_F26M 40
|
||||
#define CLK_INFRA_133M_DBG_ACKM 41
|
||||
#define CLK_INFRA_66M_AP_DMA_BCK 42
|
||||
#define CLK_INFRA_66M_SEJ_BCK 43
|
||||
#define CLK_INFRA_PRE_CK_SEJ_F13M 44
|
||||
#define CLK_INFRA_26M_THERM_SYSTEM 45
|
||||
#define CLK_INFRA_I2C_BCK 46
|
||||
#define CLK_INFRA_52M_UART0_CK 47
|
||||
#define CLK_INFRA_52M_UART1_CK 48
|
||||
#define CLK_INFRA_52M_UART2_CK 49
|
||||
#define CLK_INFRA_NFI 50
|
||||
#define CLK_INFRA_SPINFI 51
|
||||
#define CLK_INFRA_66M_NFI_HCK 52
|
||||
#define CLK_INFRA_104M_SPI0 53
|
||||
#define CLK_INFRA_104M_SPI1 54
|
||||
#define CLK_INFRA_104M_SPI2_BCK 55
|
||||
#define CLK_INFRA_66M_SPI0_HCK 56
|
||||
#define CLK_INFRA_66M_SPI1_HCK 57
|
||||
#define CLK_INFRA_66M_SPI2_HCK 58
|
||||
#define CLK_INFRA_66M_FLASHIF_AXI 59
|
||||
#define CLK_INFRA_RTC 60
|
||||
#define CLK_INFRA_26M_ADC_BCK 61
|
||||
#define CLK_INFRA_RC_ADC 62
|
||||
#define CLK_INFRA_MSDC400 63
|
||||
#define CLK_INFRA_MSDC2_HCK 64
|
||||
#define CLK_INFRA_133M_MSDC_0_HCK 65
|
||||
#define CLK_INFRA_66M_MSDC_0_HCK 66
|
||||
#define CLK_INFRA_133M_CPUM_BCK 67
|
||||
#define CLK_INFRA_BIST2FPC 68
|
||||
#define CLK_INFRA_I2C_X16W_MCK_CK_P1 69
|
||||
#define CLK_INFRA_I2C_X16W_PCK_CK_P1 70
|
||||
#define CLK_INFRA_133M_USB_HCK 71
|
||||
#define CLK_INFRA_133M_USB_HCK_CK_P1 72
|
||||
#define CLK_INFRA_66M_USB_HCK 73
|
||||
#define CLK_INFRA_66M_USB_HCK_CK_P1 74
|
||||
#define CLK_INFRA_USB_SYS 75
|
||||
#define CLK_INFRA_USB_SYS_CK_P1 76
|
||||
#define CLK_INFRA_USB_REF 77
|
||||
#define CLK_INFRA_USB_CK_P1 78
|
||||
#define CLK_INFRA_USB_FRMCNT 79
|
||||
#define CLK_INFRA_USB_FRMCNT_CK_P1 80
|
||||
#define CLK_INFRA_USB_PIPE 81
|
||||
#define CLK_INFRA_USB_PIPE_CK_P1 82
|
||||
#define CLK_INFRA_USB_UTMI 83
|
||||
#define CLK_INFRA_USB_UTMI_CK_P1 84
|
||||
#define CLK_INFRA_USB_XHCI 85
|
||||
#define CLK_INFRA_USB_XHCI_CK_P1 86
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_P0 87
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_P1 88
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_P2 89
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_P3 90
|
||||
#define CLK_INFRA_PCIE_PIPE_P0 91
|
||||
#define CLK_INFRA_PCIE_PIPE_P1 92
|
||||
#define CLK_INFRA_PCIE_PIPE_P2 93
|
||||
#define CLK_INFRA_PCIE_PIPE_P3 94
|
||||
#define CLK_INFRA_133M_PCIE_CK_P0 95
|
||||
#define CLK_INFRA_133M_PCIE_CK_P1 96
|
||||
#define CLK_INFRA_133M_PCIE_CK_P2 97
|
||||
#define CLK_INFRA_133M_PCIE_CK_P3 98
|
||||
|
||||
/* ETHDMA */
|
||||
|
||||
#define CLK_ETHDMA_XGP1_EN 0
|
||||
#define CLK_ETHDMA_XGP2_EN 1
|
||||
#define CLK_ETHDMA_XGP3_EN 2
|
||||
#define CLK_ETHDMA_FE_EN 3
|
||||
#define CLK_ETHDMA_GP2_EN 4
|
||||
#define CLK_ETHDMA_GP1_EN 5
|
||||
#define CLK_ETHDMA_GP3_EN 6
|
||||
#define CLK_ETHDMA_ESW_EN 7
|
||||
#define CLK_ETHDMA_CRYPT0_EN 8
|
||||
#define CLK_ETHDMA_NR_CLK 9
|
||||
|
||||
/* SGMIISYS_0 */
|
||||
|
||||
#define CLK_SGM0_TX_EN 0
|
||||
#define CLK_SGM0_RX_EN 1
|
||||
#define CLK_SGMII0_NR_CLK 2
|
||||
|
||||
/* SGMIISYS_1 */
|
||||
|
||||
#define CLK_SGM1_TX_EN 0
|
||||
#define CLK_SGM1_RX_EN 1
|
||||
#define CLK_SGMII1_NR_CLK 2
|
||||
|
||||
/* ETHWARP */
|
||||
|
||||
#define CLK_ETHWARP_WOCPU2_EN 0
|
||||
#define CLK_ETHWARP_WOCPU1_EN 1
|
||||
#define CLK_ETHWARP_WOCPU0_EN 2
|
||||
#define CLK_ETHWARP_NR_CLK 3
|
||||
|
||||
#endif /* _DT_BINDINGS_CLK_MT7988_H */
|
||||
@@ -73,11 +73,7 @@
|
||||
|
||||
int parse_fit_partitions(struct parsed_partitions *state, u64 fit_start_sector, u64 sectors, int *slot, int add_remain)
|
||||
{
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0)
|
||||
struct block_device *bdev = state->disk->part0;
|
||||
#else
|
||||
struct block_device *bdev = state->bdev;
|
||||
#endif
|
||||
struct address_space *mapping = bdev->bd_inode->i_mapping;
|
||||
struct page *page;
|
||||
void *fit, *init_fit;
|
||||
@@ -104,8 +100,11 @@ int parse_fit_partitions(struct parsed_partitions *state, u64 fit_start_sector,
|
||||
return -ERANGE;
|
||||
|
||||
page = read_mapping_page(mapping, fit_start_sector >> (PAGE_SHIFT - SECTOR_SHIFT), NULL);
|
||||
if (!page)
|
||||
return -ENOMEM;
|
||||
if (IS_ERR(page))
|
||||
return -EFAULT;
|
||||
|
||||
if (PageError(page))
|
||||
return -EFAULT;
|
||||
|
||||
init_fit = page_address(page);
|
||||
|
||||
@@ -224,8 +223,8 @@ int parse_fit_partitions(struct parsed_partitions *state, u64 fit_start_sector,
|
||||
|
||||
image_description = fdt_getprop(fit, node, FIT_DESC_PROP, &image_description_len);
|
||||
|
||||
printk(KERN_DEBUG "FIT: %16s sub-image 0x%08x - 0x%08x \"%s\" %s%s%s\n",
|
||||
image_type, image_pos, image_pos + image_len, image_name,
|
||||
printk(KERN_DEBUG "FIT: %16s sub-image 0x%08x..0x%08x \"%s\" %s%s%s\n",
|
||||
image_type, image_pos, image_pos + image_len - 1, image_name,
|
||||
image_description?"(":"", image_description?:"", image_description?") ":"");
|
||||
|
||||
if (strcmp(image_type, FIT_FILESYSTEM_PROP))
|
||||
|
||||
@@ -7,6 +7,7 @@
|
||||
#include <linux/module.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/version.h>
|
||||
|
||||
/**
|
||||
* Driver for SmartRG RGBW LED microcontroller.
|
||||
@@ -159,7 +160,11 @@ srg_led_init_led(struct srg_led_ctrl *sysled_ctrl, struct device_node *np)
|
||||
|
||||
static int
|
||||
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(6,6,0)
|
||||
srg_led_probe(struct i2c_client *client, const struct i2c_device_id *id)
|
||||
#else
|
||||
srg_led_probe(struct i2c_client *client)
|
||||
#endif
|
||||
{
|
||||
struct device_node *np = client->dev.of_node, *child;
|
||||
struct srg_led_ctrl *sysled_ctrl;
|
||||
@@ -193,13 +198,21 @@ static void srg_led_disable(struct i2c_client *client)
|
||||
srg_led_i2c_write(sysled_ctrl, i, 0);
|
||||
}
|
||||
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,16,0)
|
||||
static void
|
||||
#else
|
||||
static int
|
||||
#endif
|
||||
srg_led_remove(struct i2c_client *client)
|
||||
{
|
||||
struct srg_led_ctrl *sysled_ctrl = i2c_get_clientdata(client);
|
||||
|
||||
srg_led_disable(client);
|
||||
mutex_destroy(&sysled_ctrl->lock);
|
||||
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,16,0)
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
static const struct i2c_device_id srg_led_id[] = {
|
||||
|
||||
@@ -144,7 +144,7 @@ static rtk_api_ret_t _rtk_filter_igrAcl_writeDataField(rtl8367c_aclrule *aclRule
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_NULL_POINTER - Pointer pFilter_field or pFilter_cfg point to NULL.
|
||||
* Note:
|
||||
* This function enable and intialize ACL function
|
||||
* This function enable and initialize ACL function
|
||||
*/
|
||||
rtk_api_ret_t rtk_filter_igrAcl_init(void)
|
||||
{
|
||||
@@ -204,7 +204,7 @@ rtk_api_ret_t rtk_filter_igrAcl_init(void)
|
||||
* This function add a comparison rule (*pFilter_field) to an ACL configuration (*pFilter_cfg).
|
||||
* Pointer pFilter_cfg points to an ACL configuration structure, this structure keeps multiple ACL
|
||||
* comparison rules by means of linked list. Pointer pFilter_field will be added to linked
|
||||
* list keeped by structure that pFilter_cfg points to.
|
||||
* list kept by structure that pFilter_cfg points to.
|
||||
*/
|
||||
rtk_api_ret_t rtk_filter_igrAcl_field_add(rtk_filter_cfg_t* pFilter_cfg, rtk_filter_field_t* pFilter_field)
|
||||
{
|
||||
@@ -348,7 +348,7 @@ static rtk_api_ret_t _rtk_filter_igrAcl_writeDataField(rtl8367c_aclrule *aclRule
|
||||
}
|
||||
else
|
||||
{
|
||||
/*default acl template for ipv6 address supports MSB 32-bits and LSB 32-bits only*/
|
||||
/*default ACL template for ipv6 address supports MSB 32-bits and LSB 32-bits only*/
|
||||
aclRule[tempIdx].data_bits.field[fieldIdx] = ((ip6addr[3] & (0xFFFF << ((i&1) * 16))) >> ((i&1) * 16));
|
||||
aclRule[tempIdx].care_bits.field[fieldIdx] = ((ip6mask[3] & (0xFFFF << ((i&1) * 16))) >> ((i&1) * 16));
|
||||
}
|
||||
@@ -557,7 +557,7 @@ static rtk_api_ret_t _rtk_filter_igrAcl_writeDataField(rtl8367c_aclrule *aclRule
|
||||
* pFilter_cfg - The ACL configuration that this function will add comparison rule
|
||||
* pFilter_action - Action(s) of ACL configuration.
|
||||
* Output:
|
||||
* ruleNum - number of rules written in acl table
|
||||
* ruleNum - number of rules written in ACL table
|
||||
* Return:
|
||||
* RT_ERR_OK - OK
|
||||
* RT_ERR_FAILED - Failed
|
||||
@@ -1140,12 +1140,12 @@ rtk_api_ret_t rtk_filter_igrAcl_cfg_delAll(void)
|
||||
/* Function Name:
|
||||
* rtk_filter_igrAcl_cfg_get
|
||||
* Description:
|
||||
* Get one ingress acl configuration from ASIC.
|
||||
* Get one ingress ACL configuration from ASIC.
|
||||
* Input:
|
||||
* filter_id - Start index of ACL configuration.
|
||||
* Output:
|
||||
* pFilter_cfg - buffer pointer of ingress acl data
|
||||
* pFilter_action - buffer pointer of ingress acl action
|
||||
* pFilter_cfg - buffer pointer of ingress ACL data
|
||||
* pFilter_action - buffer pointer of ingress ACL action
|
||||
* Return:
|
||||
* RT_ERR_OK - OK
|
||||
* RT_ERR_FAILED - Failed
|
||||
@@ -1462,7 +1462,7 @@ rtk_api_ret_t rtk_filter_igrAcl_cfg_get(rtk_filter_id_t filter_id, rtk_filter_cf
|
||||
* RT_ERR_PORT_ID - Invalid port id.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* This function sets action of packets when no ACL configruation matches.
|
||||
* This function sets action of packets when no ACL configuration matches.
|
||||
*/
|
||||
rtk_api_ret_t rtk_filter_igrAcl_unmatchAction_set(rtk_port_t port, rtk_filter_unmatch_action_t action)
|
||||
{
|
||||
@@ -1535,7 +1535,7 @@ rtk_api_ret_t rtk_filter_igrAcl_unmatchAction_get(rtk_port_t port, rtk_filter_un
|
||||
* RT_ERR_PORT_ID - Invalid port id.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* This function gets action of packets when no ACL configruation matches.
|
||||
* This function gets action of packets when no ACL configuration matches.
|
||||
*/
|
||||
rtk_api_ret_t rtk_filter_igrAcl_state_set(rtk_port_t port, rtk_filter_state_t state)
|
||||
{
|
||||
@@ -1571,7 +1571,7 @@ rtk_api_ret_t rtk_filter_igrAcl_state_set(rtk_port_t port, rtk_filter_state_t st
|
||||
* RT_ERR_PORT_ID - Invalid port id.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* This function gets action of packets when no ACL configruation matches.
|
||||
* This function gets action of packets when no ACL configuration matches.
|
||||
*/
|
||||
rtk_api_ret_t rtk_filter_igrAcl_state_get(rtk_port_t port, rtk_filter_state_t* pState)
|
||||
{
|
||||
@@ -1699,7 +1699,7 @@ rtk_api_ret_t rtk_filter_igrAcl_template_get(rtk_filter_template_t *aclTemplate)
|
||||
* RT_ERR_FAILED - Failed
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* Note:
|
||||
* System support 16 user defined field selctors.
|
||||
* System support 16 user defined field selectors.
|
||||
* Each selector can be enabled or disable.
|
||||
* User can defined retrieving 16-bits in many predefiend
|
||||
* standard l2/l3/l4 payload.
|
||||
@@ -1928,7 +1928,7 @@ rtk_api_ret_t rtk_filter_vidrange_get(rtk_uint32 index, rtk_filter_vidrange_t *p
|
||||
* Set Port Range check
|
||||
* Input:
|
||||
* index - index of Port Range 0-15
|
||||
* type - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destnation Port
|
||||
* type - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destination Port
|
||||
* upperPort - The upper bound of Port range
|
||||
* lowerPort - The lower Bound of Port range
|
||||
* Output:
|
||||
@@ -1977,7 +1977,7 @@ rtk_api_ret_t rtk_filter_portrange_set(rtk_uint32 index, rtk_filter_portrange_t
|
||||
* Input:
|
||||
* index - index of Port Range 0-15
|
||||
* Output:
|
||||
* pType - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destnation Port
|
||||
* pType - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destination Port
|
||||
* pUpperPort - The upper bound of Port range
|
||||
* pLowerPort - The lower Bound of Port range
|
||||
* Return:
|
||||
@@ -2011,7 +2011,7 @@ rtk_api_ret_t rtk_filter_portrange_get(rtk_uint32 index, rtk_filter_portrange_t
|
||||
/* Function Name:
|
||||
* rtk_filter_igrAclPolarity_set
|
||||
* Description:
|
||||
* Set ACL Goip control palarity
|
||||
* Set ACL Goip control polarity
|
||||
* Input:
|
||||
* polarity - 1: High, 0: Low
|
||||
* Output:
|
||||
@@ -2034,7 +2034,7 @@ rtk_api_ret_t rtk_filter_igrAclPolarity_set(rtk_uint32 polarity)
|
||||
/* Function Name:
|
||||
* rtk_filter_igrAclPolarity_get
|
||||
* Description:
|
||||
* Get ACL Goip control palarity
|
||||
* Get ACL Goip control polarity
|
||||
* Input:
|
||||
* pPolarity - 1: High, 0: Low
|
||||
* Output:
|
||||
|
||||
@@ -113,7 +113,7 @@ rtk_api_ret_t rtk_cpu_enable_get(rtk_enable_t *pEnable)
|
||||
* Note:
|
||||
* The API can set CPU port and inserting proprietary CPU tag mode (Length/Type 0x8899)
|
||||
* to the frame that transmitting to CPU port.
|
||||
* The inset cpu tag mode is as following:
|
||||
* The insert CPU tag mode is as following:
|
||||
* - CPU_INSERT_TO_ALL
|
||||
* - CPU_INSERT_TO_TRAPPING
|
||||
* - CPU_INSERT_TO_NONE
|
||||
@@ -160,7 +160,7 @@ rtk_api_ret_t rtk_cpu_tagPort_set(rtk_port_t port, rtk_cpu_insert_t mode)
|
||||
* RT_ERR_L2_NO_CPU_PORT - CPU port is not exist
|
||||
* Note:
|
||||
* The API can get configured CPU port and its setting.
|
||||
* The inset cpu tag mode is as following:
|
||||
* The insert CPU tag mode is as following:
|
||||
* - CPU_INSERT_TO_ALL
|
||||
* - CPU_INSERT_TO_TRAPPING
|
||||
* - CPU_INSERT_TO_NONE
|
||||
|
||||
@@ -233,7 +233,7 @@ rtk_api_ret_t rtk_igmp_static_router_port_get(rtk_portmask_t *pPortmask)
|
||||
* Input:
|
||||
* port - Port ID
|
||||
* protocol - IGMP/MLD protocol
|
||||
* action - Per-port and per-protocol IGMP action seeting
|
||||
* action - Per-port and per-protocol IGMP action setting
|
||||
* Output:
|
||||
* None.
|
||||
* Return:
|
||||
@@ -321,7 +321,7 @@ rtk_api_ret_t rtk_igmp_protocol_set(rtk_port_t port, rtk_igmp_protocol_t protoco
|
||||
* Input:
|
||||
* port - Port ID
|
||||
* protocol - IGMP/MLD protocol
|
||||
* action - Per-port and per-protocol IGMP action seeting
|
||||
* action - Per-port and per-protocol IGMP action setting
|
||||
* Output:
|
||||
* None.
|
||||
* Return:
|
||||
@@ -1217,7 +1217,7 @@ rtk_api_ret_t rtk_igmp_portRxPktEnable_get(rtk_port_t port, rtk_igmp_rxPktEnable
|
||||
* Description:
|
||||
* Get IGMP/MLD Group database
|
||||
* Input:
|
||||
* indes - Index (0~255)
|
||||
* index - Index (0~255)
|
||||
* Output:
|
||||
* pGroup - Group database information.
|
||||
* Return:
|
||||
@@ -1418,7 +1418,7 @@ rtk_api_ret_t rtk_igmp_ReportLeaveFwdAction_get(rtk_igmp_ReportLeaveFwdAct_t *pA
|
||||
/* Function Name:
|
||||
* rtk_igmp_dropLeaveZeroEnable_set
|
||||
* Description:
|
||||
* Set the function of droppping Leave packet with group IP = 0.0.0.0
|
||||
* Set the function of dropping Leave packet with group IP = 0.0.0.0
|
||||
* Input:
|
||||
* enabled - Action 1: drop, 0:pass
|
||||
* Output:
|
||||
@@ -1451,7 +1451,7 @@ rtk_api_ret_t rtk_igmp_dropLeaveZeroEnable_set(rtk_enable_t enabled)
|
||||
/* Function Name:
|
||||
* rtk_igmp_dropLeaveZeroEnable_get
|
||||
* Description:
|
||||
* Get the function of droppping Leave packet with group IP = 0.0.0.0
|
||||
* Get the function of dropping Leave packet with group IP = 0.0.0.0
|
||||
* Input:
|
||||
* None
|
||||
* Output:
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes ACL module high-layer API defination
|
||||
* Feature : The file includes ACL module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
@@ -566,7 +566,7 @@ typedef enum rtk_filter_portrange_e
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_NULL_POINTER - Pointer pFilter_field or pFilter_cfg point to NULL.
|
||||
* Note:
|
||||
* This function enable and intialize ACL function
|
||||
* This function enable and initialize ACL function
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_filter_igrAcl_init(void);
|
||||
|
||||
@@ -589,7 +589,7 @@ extern rtk_api_ret_t rtk_filter_igrAcl_init(void);
|
||||
* This function add a comparison rule (*pFilter_field) to an ACL configuration (*pFilter_cfg).
|
||||
* Pointer pFilter_cfg points to an ACL configuration structure, this structure keeps multiple ACL
|
||||
* comparison rules by means of linked list. Pointer pFilter_field will be added to linked
|
||||
* list keeped by structure that pFilter_cfg points to.
|
||||
* list kept by structure that pFilter_cfg points to.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_filter_igrAcl_field_add(rtk_filter_cfg_t *pFilter_cfg, rtk_filter_field_t *pFilter_field);
|
||||
|
||||
@@ -602,7 +602,7 @@ extern rtk_api_ret_t rtk_filter_igrAcl_field_add(rtk_filter_cfg_t *pFilter_cfg,
|
||||
* pFilter_cfg - The ACL configuration that this function will add comparison rule
|
||||
* pFilter_action - Action(s) of ACL configuration.
|
||||
* Output:
|
||||
* ruleNum - number of rules written in acl table
|
||||
* ruleNum - number of rules written in ACL table
|
||||
* Return:
|
||||
* RT_ERR_OK - OK
|
||||
* RT_ERR_FAILED - Failed
|
||||
@@ -657,12 +657,12 @@ extern rtk_api_ret_t rtk_filter_igrAcl_cfg_delAll(void);
|
||||
/* Function Name:
|
||||
* rtk_filter_igrAcl_cfg_get
|
||||
* Description:
|
||||
* Get one ingress acl configuration from ASIC.
|
||||
* Get one ingress ACL configuration from ASIC.
|
||||
* Input:
|
||||
* filter_id - Start index of ACL configuration.
|
||||
* Output:
|
||||
* pFilter_cfg - buffer pointer of ingress acl data
|
||||
* pFilter_action - buffer pointer of ingress acl action
|
||||
* pFilter_cfg - buffer pointer of ingress ACL data
|
||||
* pFilter_action - buffer pointer of ingress ACL action
|
||||
* Return:
|
||||
* RT_ERR_OK - OK
|
||||
* RT_ERR_FAILED - Failed
|
||||
@@ -690,7 +690,7 @@ extern rtk_api_ret_t rtk_filter_igrAcl_cfg_get(rtk_filter_id_t filter_id, rtk_fi
|
||||
* RT_ERR_PORT_ID - Invalid port id.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* This function sets action of packets when no ACL configruation matches.
|
||||
* This function sets action of packets when no ACL configuration matches.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_filter_igrAcl_unmatchAction_set(rtk_port_t port, rtk_filter_unmatch_action_t action);
|
||||
|
||||
@@ -709,7 +709,7 @@ extern rtk_api_ret_t rtk_filter_igrAcl_unmatchAction_set(rtk_port_t port, rtk_fi
|
||||
* RT_ERR_PORT_ID - Invalid port id.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* This function gets action of packets when no ACL configruation matches.
|
||||
* This function gets action of packets when no ACL configuration matches.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_filter_igrAcl_unmatchAction_get(rtk_port_t port, rtk_filter_unmatch_action_t* action);
|
||||
|
||||
@@ -729,7 +729,7 @@ extern rtk_api_ret_t rtk_filter_igrAcl_unmatchAction_get(rtk_port_t port, rtk_fi
|
||||
* RT_ERR_PORT_ID - Invalid port id.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* This function gets action of packets when no ACL configruation matches.
|
||||
* This function gets action of packets when no ACL configuration matches.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_filter_igrAcl_state_set(rtk_port_t port, rtk_filter_state_t state);
|
||||
|
||||
@@ -748,7 +748,7 @@ extern rtk_api_ret_t rtk_filter_igrAcl_state_set(rtk_port_t port, rtk_filter_sta
|
||||
* RT_ERR_PORT_ID - Invalid port id.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* This function gets action of packets when no ACL configruation matches.
|
||||
* This function gets action of packets when no ACL configuration matches.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_filter_igrAcl_state_get(rtk_port_t port, rtk_filter_state_t* state);
|
||||
|
||||
@@ -802,7 +802,7 @@ extern rtk_api_ret_t rtk_filter_igrAcl_template_get(rtk_filter_template_t *aclTe
|
||||
* RT_ERR_FAILED - Failed
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* Note:
|
||||
* System support 16 user defined field selctors.
|
||||
* System support 16 user defined field selectors.
|
||||
* Each selector can be enabled or disable.
|
||||
* User can defined retrieving 16-bits in many predefiend
|
||||
* standard l2/l3/l4 payload.
|
||||
@@ -917,7 +917,7 @@ extern rtk_api_ret_t rtk_filter_vidrange_get(rtk_uint32 index, rtk_filter_vidran
|
||||
* Set Port Range check
|
||||
* Input:
|
||||
* index - index of Port Range 0-15
|
||||
* type - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destnation Port
|
||||
* type - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destination Port
|
||||
* upperPort - The upper bound of Port range
|
||||
* lowerPort - The lower Bound of Port range
|
||||
* Output:
|
||||
@@ -940,7 +940,7 @@ extern rtk_api_ret_t rtk_filter_portrange_set(rtk_uint32 index, rtk_filter_portr
|
||||
* Input:
|
||||
* index - index of Port Range 0-15
|
||||
* Output:
|
||||
* pType - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destnation Port
|
||||
* pType - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destination Port
|
||||
* pUpperPort - The upper bound of Port range
|
||||
* pLowerPort - The lower Bound of Port range
|
||||
* Return:
|
||||
@@ -957,7 +957,7 @@ extern rtk_api_ret_t rtk_filter_portrange_get(rtk_uint32 index, rtk_filter_portr
|
||||
/* Function Name:
|
||||
* rtk_filter_igrAclPolarity_set
|
||||
* Description:
|
||||
* Set ACL Goip control palarity
|
||||
* Set ACL Goip control polarity
|
||||
* Input:
|
||||
* polarity - 1: High, 0: Low
|
||||
* Output:
|
||||
@@ -973,7 +973,7 @@ extern rtk_api_ret_t rtk_filter_igrAclPolarity_set(rtk_uint32 polarity);
|
||||
/* Function Name:
|
||||
* rtk_filter_igrAclPolarity_get
|
||||
* Description:
|
||||
* Get ACL Goip control palarity
|
||||
* Get ACL Goip control polarity
|
||||
* Input:
|
||||
* pPolarity - 1: High, 0: Low
|
||||
* Output:
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes CPU module high-layer API defination
|
||||
* Feature : The file includes CPU module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
@@ -107,7 +107,7 @@ extern rtk_api_ret_t rtk_cpu_enable_get(rtk_enable_t *pEnable);
|
||||
* Note:
|
||||
* The API can set CPU port and inserting proprietary CPU tag mode (Length/Type 0x8899)
|
||||
* to the frame that transmitting to CPU port.
|
||||
* The inset cpu tag mode is as following:
|
||||
* The insert CPU tag mode is as following:
|
||||
* - CPU_INSERT_TO_ALL
|
||||
* - CPU_INSERT_TO_TRAPPING
|
||||
* - CPU_INSERT_TO_NONE
|
||||
@@ -131,7 +131,7 @@ extern rtk_api_ret_t rtk_cpu_tagPort_set(rtk_port_t port, rtk_cpu_insert_t mode)
|
||||
* RT_ERR_L2_NO_CPU_PORT - CPU port is not exist
|
||||
* Note:
|
||||
* The API can get configured CPU port and its setting.
|
||||
* The inset cpu tag mode is as following:
|
||||
* The insert CPU tag mode is as following:
|
||||
* - CPU_INSERT_TO_ALL
|
||||
* - CPU_INSERT_TO_TRAPPING
|
||||
* - CPU_INSERT_TO_NONE
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes 1X module high-layer API defination
|
||||
* Feature : The file includes 1X module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes EEE module high-layer API defination
|
||||
* Feature : The file includes EEE module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes I2C module high-layer API defination
|
||||
* Feature : The file includes I2C module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes IGMP module high-layer API defination
|
||||
* Feature : The file includes IGMP module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
@@ -205,7 +205,7 @@ extern rtk_api_ret_t rtk_igmp_static_router_port_get(rtk_portmask_t *pPortmask);
|
||||
* Input:
|
||||
* port - Port ID
|
||||
* protocol - IGMP/MLD protocol
|
||||
* action - Per-port and per-protocol IGMP action seeting
|
||||
* action - Per-port and per-protocol IGMP action setting
|
||||
* Output:
|
||||
* None.
|
||||
* Return:
|
||||
@@ -225,7 +225,7 @@ extern rtk_api_ret_t rtk_igmp_protocol_set(rtk_port_t port, rtk_igmp_protocol_t
|
||||
* Input:
|
||||
* port - Port ID
|
||||
* protocol - IGMP/MLD protocol
|
||||
* action - Per-port and per-protocol IGMP action seeting
|
||||
* action - Per-port and per-protocol IGMP action setting
|
||||
* Output:
|
||||
* None.
|
||||
* Return:
|
||||
@@ -640,7 +640,7 @@ extern rtk_api_ret_t rtk_igmp_portRxPktEnable_get(rtk_port_t port, rtk_igmp_rxPk
|
||||
* Description:
|
||||
* Get IGMP/MLD Group database
|
||||
* Input:
|
||||
* indes - Index (0~255)
|
||||
* index - Index (0~255)
|
||||
* Output:
|
||||
* pGroup - Group database information.
|
||||
* Return:
|
||||
@@ -694,7 +694,7 @@ extern rtk_api_ret_t rtk_igmp_ReportLeaveFwdAction_get(rtk_igmp_ReportLeaveFwdAc
|
||||
/* Function Name:
|
||||
* rtk_igmp_dropLeaveZeroEnable_set
|
||||
* Description:
|
||||
* Set the function of droppping Leave packet with group IP = 0.0.0.0
|
||||
* Set the function of dropping Leave packet with group IP = 0.0.0.0
|
||||
* Input:
|
||||
* enabled - Action 1: drop, 0:pass
|
||||
* Output:
|
||||
@@ -712,7 +712,7 @@ extern rtk_api_ret_t rtk_igmp_dropLeaveZeroEnable_set(rtk_enable_t enabled);
|
||||
/* Function Name:
|
||||
* rtk_igmp_dropLeaveZeroEnable_get
|
||||
* Description:
|
||||
* Get the function of droppping Leave packet with group IP = 0.0.0.0
|
||||
* Get the function of dropping Leave packet with group IP = 0.0.0.0
|
||||
* Input:
|
||||
* None
|
||||
* Output:
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes Interrupt module high-layer API defination
|
||||
* Feature : The file includes Interrupt module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes L2 module high-layer API defination
|
||||
* Feature : The file includes L2 module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
@@ -209,7 +209,7 @@ extern rtk_api_ret_t rtk_l2_init(void);
|
||||
* RT_ERR_L2_INDEXTBL_FULL - hashed index is full of entries.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* If the unicast mac address already existed in LUT, it will udpate the status of the entry.
|
||||
* If the unicast mac address already existed in LUT, it will update the status of the entry.
|
||||
* Otherwise, it will find an empty or asic auto learned entry to write. If all the entries
|
||||
* with the same hash value can't be replaced, ASIC will return a RT_ERR_L2_INDEXTBL_FULL error.
|
||||
*/
|
||||
@@ -307,7 +307,7 @@ extern rtk_api_ret_t rtk_l2_addr_del(rtk_mac_t *pMac, rtk_l2_ucastAddr_t *pL2_da
|
||||
* RT_ERR_PORT_MASK - Invalid portmask.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* If the multicast mac address already existed in the LUT, it will udpate the
|
||||
* If the multicast mac address already existed in the LUT, it will update the
|
||||
* port mask of the entry. Otherwise, it will find an empty or asic auto learned
|
||||
* entry to write. If all the entries with the same hash value can't be replaced,
|
||||
* ASIC will return a RT_ERR_L2_INDEXTBL_FULL error.
|
||||
@@ -383,7 +383,7 @@ extern rtk_api_ret_t rtk_l2_mcastAddr_del(rtk_l2_mcastAddr_t *pMcastAddr);
|
||||
/* Function Name:
|
||||
* rtk_l2_ipMcastAddr_add
|
||||
* Description:
|
||||
* Add Lut IP multicast entry
|
||||
* Add LUT IP multicast entry
|
||||
* Input:
|
||||
* pIpMcastAddr - IP Multicast entry
|
||||
* Output:
|
||||
@@ -418,7 +418,7 @@ extern rtk_api_ret_t rtk_l2_ipMcastAddr_add(rtk_l2_ipMcastAddr_t *pIpMcastAddr);
|
||||
* RT_ERR_L2_ENTRY_NOTFOUND - No such LUT entry.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* The API can get Lut table of IP multicast entry.
|
||||
* The API can get LUT table of IP multicast entry.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_l2_ipMcastAddr_get(rtk_l2_ipMcastAddr_t *pIpMcastAddr);
|
||||
|
||||
@@ -465,7 +465,7 @@ extern rtk_api_ret_t rtk_l2_ipMcastAddr_del(rtk_l2_ipMcastAddr_t *pIpMcastAddr);
|
||||
/* Function Name:
|
||||
* rtk_l2_ipVidMcastAddr_add
|
||||
* Description:
|
||||
* Add Lut IP multicast+VID entry
|
||||
* Add LUT IP multicast+VID entry
|
||||
* Input:
|
||||
* pIpVidMcastAddr - IP & VID multicast Entry
|
||||
* Output:
|
||||
@@ -913,7 +913,7 @@ extern rtk_api_ret_t rtk_l2_learningCnt_get(rtk_port_t port, rtk_mac_cnt_t *pMac
|
||||
* Set flooding portmask
|
||||
* Input:
|
||||
* type - flooding type.
|
||||
* pFlood_portmask - flooding porkmask
|
||||
* pFlood_portmask - flooding portmask
|
||||
* Output:
|
||||
* None
|
||||
* Return:
|
||||
@@ -938,7 +938,7 @@ extern rtk_api_ret_t rtk_l2_floodPortMask_set(rtk_l2_flood_type_t floood_type, r
|
||||
* Input:
|
||||
* type - flooding type.
|
||||
* Output:
|
||||
* pFlood_portmask - flooding porkmask
|
||||
* pFlood_portmask - flooding portmask
|
||||
* Return:
|
||||
* RT_ERR_OK - OK
|
||||
* RT_ERR_FAILED - Failed
|
||||
@@ -956,10 +956,10 @@ extern rtk_api_ret_t rtk_l2_floodPortMask_get(rtk_l2_flood_type_t floood_type, r
|
||||
/* Function Name:
|
||||
* rtk_l2_localPktPermit_set
|
||||
* Description:
|
||||
* Set permittion of frames if source port and destination port are the same.
|
||||
* Set permission of frames if source port and destination port are the same.
|
||||
* Input:
|
||||
* port - Port id.
|
||||
* permit - permittion status
|
||||
* permit - permission status
|
||||
* Output:
|
||||
* None
|
||||
* Return:
|
||||
@@ -969,34 +969,34 @@ extern rtk_api_ret_t rtk_l2_floodPortMask_get(rtk_l2_flood_type_t floood_type, r
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* RT_ERR_ENABLE - Invalid permit value.
|
||||
* Note:
|
||||
* This API is setted to permit frame if its source port is equal to destination port.
|
||||
* This API is set to permit frame if its source port is equal to destination port.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_l2_localPktPermit_set(rtk_port_t port, rtk_enable_t permit);
|
||||
|
||||
/* Function Name:
|
||||
* rtk_l2_localPktPermit_get
|
||||
* Description:
|
||||
* Get permittion of frames if source port and destination port are the same.
|
||||
* Get permission of frames if source port and destination port are the same.
|
||||
* Input:
|
||||
* port - Port id.
|
||||
* Output:
|
||||
* pPermit - permittion status
|
||||
* pPermit - permission status
|
||||
* Return:
|
||||
* RT_ERR_OK - OK
|
||||
* RT_ERR_FAILED - Failed
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* Note:
|
||||
* This API is to get permittion status for frames if its source port is equal to destination port.
|
||||
* This API is to get permission status for frames if its source port is equal to destination port.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_l2_localPktPermit_get(rtk_port_t port, rtk_enable_t *pPermit);
|
||||
|
||||
/* Function Name:
|
||||
* rtk_l2_aging_set
|
||||
* Description:
|
||||
* Set LUT agging out speed
|
||||
* Set LUT ageing out speed
|
||||
* Input:
|
||||
* aging_time - Agging out time.
|
||||
* aging_time - Ageing out time.
|
||||
* Output:
|
||||
* None
|
||||
* Return:
|
||||
@@ -1005,14 +1005,14 @@ extern rtk_api_ret_t rtk_l2_localPktPermit_get(rtk_port_t port, rtk_enable_t *pP
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_OUT_OF_RANGE - input out of range.
|
||||
* Note:
|
||||
* The API can set LUT agging out period for each entry and the range is from 14s to 800s.
|
||||
* The API can set LUT ageing out period for each entry and the range is from 14s to 800s.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_l2_aging_set(rtk_l2_age_time_t aging_time);
|
||||
|
||||
/* Function Name:
|
||||
* rtk_l2_aging_get
|
||||
* Description:
|
||||
* Get LUT agging out time
|
||||
* Get LUT ageing out time
|
||||
* Input:
|
||||
* None
|
||||
* Output:
|
||||
@@ -1023,14 +1023,14 @@ extern rtk_api_ret_t rtk_l2_aging_set(rtk_l2_age_time_t aging_time);
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* Note:
|
||||
* The API can get LUT agging out period for each entry.
|
||||
* The API can get LUT ageing out period for each entry.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_l2_aging_get(rtk_l2_age_time_t *pAging_time);
|
||||
|
||||
/* Function Name:
|
||||
* rtk_l2_ipMcastAddrLookup_set
|
||||
* Description:
|
||||
* Set Lut IP multicast lookup function
|
||||
* Set LUT IP multicast lookup function
|
||||
* Input:
|
||||
* type - Lookup type for IPMC packet.
|
||||
* Output:
|
||||
@@ -1051,7 +1051,7 @@ extern rtk_api_ret_t rtk_l2_ipMcastAddrLookup_set(rtk_l2_ipmc_lookup_type_t type
|
||||
/* Function Name:
|
||||
* rtk_l2_ipMcastAddrLookup_get
|
||||
* Description:
|
||||
* Get Lut IP multicast lookup function
|
||||
* Get LUT IP multicast lookup function
|
||||
* Input:
|
||||
* None.
|
||||
* Output:
|
||||
@@ -1068,9 +1068,9 @@ extern rtk_api_ret_t rtk_l2_ipMcastAddrLookup_get(rtk_l2_ipmc_lookup_type_t *pTy
|
||||
/* Function Name:
|
||||
* rtk_l2_ipMcastForwardRouterPort_set
|
||||
* Description:
|
||||
* Set IPMC packet forward to rounter port also or not
|
||||
* Set IPMC packet forward to router port also or not
|
||||
* Input:
|
||||
* enabled - 1: Inlcude router port, 0, exclude router port
|
||||
* enabled - 1: Include router port, 0, exclude router port
|
||||
* Output:
|
||||
* None.
|
||||
* Return:
|
||||
@@ -1085,11 +1085,11 @@ extern rtk_api_ret_t rtk_l2_ipMcastForwardRouterPort_set(rtk_enable_t enabled);
|
||||
/* Function Name:
|
||||
* rtk_l2_ipMcastForwardRouterPort_get
|
||||
* Description:
|
||||
* Get IPMC packet forward to rounter port also or not
|
||||
* Get IPMC packet forward to router port also or not
|
||||
* Input:
|
||||
* None.
|
||||
* Output:
|
||||
* pEnabled - 1: Inlcude router port, 0, exclude router port
|
||||
* pEnabled - 1: Include router port, 0, exclude router port
|
||||
* Return:
|
||||
* RT_ERR_OK - OK
|
||||
* RT_ERR_FAILED - Failed
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes Leaky module high-layer API defination
|
||||
* Feature : The file includes Leaky module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes LED module high-layer API defination
|
||||
* Feature : The file includes LED module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
@@ -107,7 +107,7 @@ typedef enum rtk_led_serialOutput_e
|
||||
/* Function Name:
|
||||
* rtk_led_enable_set
|
||||
* Description:
|
||||
* Set Led enable congiuration
|
||||
* Set Led enable configuration
|
||||
* Input:
|
||||
* group - LED group id.
|
||||
* pPortmask - LED enable port mask.
|
||||
@@ -126,7 +126,7 @@ extern rtk_api_ret_t rtk_led_enable_set(rtk_led_group_t group, rtk_portmask_t *p
|
||||
/* Function Name:
|
||||
* rtk_led_enable_get
|
||||
* Description:
|
||||
* Get Led enable congiuration
|
||||
* Get Led enable configuration
|
||||
* Input:
|
||||
* group - LED group id.
|
||||
* Output:
|
||||
@@ -188,7 +188,7 @@ extern rtk_api_ret_t rtk_led_operation_get(rtk_led_operation_t *pMode);
|
||||
/* Function Name:
|
||||
* rtk_led_modeForce_set
|
||||
* Description:
|
||||
* Set Led group to congiuration force mode
|
||||
* Set Led group to configuration force mode
|
||||
* Input:
|
||||
* port - port ID
|
||||
* group - Support LED group id.
|
||||
@@ -214,7 +214,7 @@ extern rtk_api_ret_t rtk_led_modeForce_set(rtk_port_t port, rtk_led_group_t grou
|
||||
/* Function Name:
|
||||
* rtk_led_modeForce_get
|
||||
* Description:
|
||||
* Get Led group to congiuration force mode
|
||||
* Get Led group to configuration force mode
|
||||
* Input:
|
||||
* port - port ID
|
||||
* group - Support LED group id.
|
||||
@@ -276,7 +276,7 @@ extern rtk_api_ret_t rtk_led_blinkRate_get(rtk_led_blink_rate_t *pBlinkRate);
|
||||
/* Function Name:
|
||||
* rtk_led_groupConfig_set
|
||||
* Description:
|
||||
* Set per group Led to congiuration mode
|
||||
* Set per group Led to configuration mode
|
||||
* Input:
|
||||
* group - LED group.
|
||||
* config - LED configuration
|
||||
@@ -312,7 +312,7 @@ extern rtk_api_ret_t rtk_led_groupConfig_set(rtk_led_group_t group, rtk_led_cong
|
||||
/* Function Name:
|
||||
* rtk_led_groupConfig_get
|
||||
* Description:
|
||||
* Get Led group congiuration mode
|
||||
* Get Led group configuration mode
|
||||
* Input:
|
||||
* group - LED group.
|
||||
* Output:
|
||||
@@ -370,7 +370,7 @@ extern rtk_api_ret_t rtk_led_groupAbility_get(rtk_led_group_t group, rtk_led_abi
|
||||
/* Function Name:
|
||||
* rtk_led_serialMode_set
|
||||
* Description:
|
||||
* Set Led serial mode active congiuration
|
||||
* Set Led serial mode active configuration
|
||||
* Input:
|
||||
* active - LED group.
|
||||
* Output:
|
||||
@@ -381,14 +381,14 @@ extern rtk_api_ret_t rtk_led_groupAbility_get(rtk_led_group_t group, rtk_led_abi
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* The API can set LED serial mode active congiuration.
|
||||
* The API can set LED serial mode active configuration.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_led_serialMode_set(rtk_led_active_t active);
|
||||
|
||||
/* Function Name:
|
||||
* rtk_led_serialMode_get
|
||||
* Description:
|
||||
* Get Led group congiuration mode
|
||||
* Get Led group configuration mode
|
||||
* Input:
|
||||
* group - LED group.
|
||||
* Output:
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes Mirror module high-layer API defination
|
||||
* Feature : The file includes Mirror module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
@@ -81,7 +81,7 @@ extern rtk_api_ret_t rtk_mirror_portBased_get(rtk_port_t* pMirroring_port, rtk_p
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_ENABLE - Invalid enable input
|
||||
* Note:
|
||||
* The API is to set mirror isolation function that prevent normal forwarding packets to miror port.
|
||||
* The API is to set mirror isolation function that prevent normal forwarding packets to mirror port.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_mirror_portIso_set(rtk_enable_t enable);
|
||||
|
||||
@@ -118,7 +118,7 @@ extern rtk_api_ret_t rtk_mirror_portIso_get(rtk_enable_t *pEnable);
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_ENABLE - Invalid enable input
|
||||
* Note:
|
||||
* The API is to set mirror VLAN leaky function forwarding packets to miror port.
|
||||
* The API is to set mirror VLAN leaky function forwarding packets to mirror port.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_mirror_vlanLeaky_set(rtk_enable_t txenable, rtk_enable_t rxenable);
|
||||
|
||||
@@ -157,7 +157,7 @@ extern rtk_api_ret_t rtk_mirror_vlanLeaky_get(rtk_enable_t *pTxenable, rtk_enabl
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_ENABLE - Invalid enable input
|
||||
* Note:
|
||||
* The API is to set mirror VLAN leaky function forwarding packets to miror port.
|
||||
* The API is to set mirror VLAN leaky function forwarding packets to mirror port.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_mirror_isolationLeaky_set(rtk_enable_t txenable, rtk_enable_t rxenable);
|
||||
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes port module high-layer API defination
|
||||
* Feature : The file includes port module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
@@ -222,7 +222,7 @@ typedef struct rtk_rtctResult_s
|
||||
/* Function Name:
|
||||
* rtk_port_phyAutoNegoAbility_set
|
||||
* Description:
|
||||
* Set ethernet PHY auto-negotiation desired ability.
|
||||
* Set Ethernet PHY auto-negotiation desired ability.
|
||||
* Input:
|
||||
* port - port id.
|
||||
* pAbility - Ability structure
|
||||
@@ -259,7 +259,7 @@ extern rtk_api_ret_t rtk_port_phyAutoNegoAbility_set(rtk_port_t port, rtk_port_p
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
|
||||
* Note:
|
||||
* Get the capablity of specified PHY.
|
||||
* Get the capability of specified PHY.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_port_phyAutoNegoAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility);
|
||||
|
||||
@@ -303,14 +303,14 @@ extern rtk_api_ret_t rtk_port_phyForceModeAbility_set(rtk_port_t port, rtk_port_
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
|
||||
* Note:
|
||||
* Get the capablity of specified PHY.
|
||||
* Get the capability of specified PHY.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_port_phyForceModeAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility);
|
||||
|
||||
/* Function Name:
|
||||
* rtk_port_phyStatus_get
|
||||
* Description:
|
||||
* Get ethernet PHY linking status
|
||||
* Get Ethernet PHY linking status
|
||||
* Input:
|
||||
* port - Port id.
|
||||
* Output:
|
||||
@@ -459,7 +459,7 @@ extern rtk_api_ret_t rtk_port_macStatus_get(rtk_port_t port, rtk_port_mac_abilit
|
||||
* For UTP port, This API will also enable the digital
|
||||
* loopback bit in PHY register for sync of speed between
|
||||
* PHY and MAC. For EXT port, users need to force the
|
||||
* link state by themself.
|
||||
* link state by themselves.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_port_macLocalLoopbackEnable_set(rtk_port_t port, rtk_enable_t enable);
|
||||
|
||||
@@ -527,7 +527,7 @@ extern rtk_api_ret_t rtk_port_phyReg_get(rtk_port_t port, rtk_port_phy_reg_t reg
|
||||
/* Function Name:
|
||||
* rtk_port_backpressureEnable_set
|
||||
* Description:
|
||||
* Set the half duplex backpressure enable status of the specific port.
|
||||
* Set the half duplex back-pressure enable status of the specific port.
|
||||
* Input:
|
||||
* port - port id.
|
||||
* enable - Back pressure status.
|
||||
@@ -540,8 +540,8 @@ extern rtk_api_ret_t rtk_port_phyReg_get(rtk_port_t port, rtk_port_phy_reg_t reg
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* RT_ERR_ENABLE - Invalid enable input.
|
||||
* Note:
|
||||
* This API can set the half duplex backpressure enable status of the specific port.
|
||||
* The half duplex backpressure enable status of the port is as following:
|
||||
* This API can set the half duplex back-pressure enable status of the specific port.
|
||||
* The half duplex back-pressure enable status of the port is as following:
|
||||
* - DISABLE
|
||||
* - ENABLE
|
||||
*/
|
||||
@@ -550,7 +550,7 @@ extern rtk_api_ret_t rtk_port_backpressureEnable_set(rtk_port_t port, rtk_enable
|
||||
/* Function Name:
|
||||
* rtk_port_backpressureEnable_get
|
||||
* Description:
|
||||
* Get the half duplex backpressure enable status of the specific port.
|
||||
* Get the half duplex back-pressure enable status of the specific port.
|
||||
* Input:
|
||||
* port - Port id.
|
||||
* Output:
|
||||
@@ -561,8 +561,8 @@ extern rtk_api_ret_t rtk_port_backpressureEnable_set(rtk_port_t port, rtk_enable
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* Note:
|
||||
* This API can get the half duplex backpressure enable status of the specific port.
|
||||
* The half duplex backpressure enable status of the port is as following:
|
||||
* This API can get the half duplex back-pressure enable status of the specific port.
|
||||
* The half duplex back-pressure enable status of the port is as following:
|
||||
* - DISABLE
|
||||
* - ENABLE
|
||||
*/
|
||||
@@ -594,7 +594,7 @@ extern rtk_api_ret_t rtk_port_adminEnable_set(rtk_port_t port, rtk_enable_t enab
|
||||
/* Function Name:
|
||||
* rtk_port_adminEnable_get
|
||||
* Description:
|
||||
* Get port admin configurationof the specific port.
|
||||
* Get port admin configuration of the specific port.
|
||||
* Input:
|
||||
* port - Port id.
|
||||
* Output:
|
||||
@@ -628,7 +628,7 @@ extern rtk_api_ret_t rtk_port_adminEnable_get(rtk_port_t port, rtk_enable_t *pEn
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* RT_ERR_PORT_MASK - Invalid portmask.
|
||||
* Note:
|
||||
* This API set the port mask that a port can trasmit packet to of each port
|
||||
* This API set the port mask that a port can transmit packet to of each port
|
||||
* A port can only transmit packet to ports included in permitted portmask
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_port_isolation_set(rtk_port_t port, rtk_portmask_t *pPortmask);
|
||||
@@ -647,7 +647,7 @@ extern rtk_api_ret_t rtk_port_isolation_set(rtk_port_t port, rtk_portmask_t *pPo
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* Note:
|
||||
* This API get the port mask that a port can trasmit packet to of each port
|
||||
* This API get the port mask that a port can transmit packet to of each port
|
||||
* A port can only transmit packet to ports included in permitted portmask
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_port_isolation_get(rtk_port_t port, rtk_portmask_t *pPortmask);
|
||||
@@ -669,7 +669,7 @@ extern rtk_api_ret_t rtk_port_isolation_get(rtk_port_t port, rtk_portmask_t *pPo
|
||||
* Note:
|
||||
* This API can set external interface 2 RGMII delay.
|
||||
* In TX delay, there are 2 selection: no-delay and 2ns delay.
|
||||
* In RX dekay, there are 8 steps for delay tunning. 0 for no-delay, and 7 for maximum delay.
|
||||
* In RX delay, there are 8 steps for delay tuning. 0 for no-delay, and 7 for maximum delay.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_port_rgmiiDelayExt_set(rtk_port_t port, rtk_data_t txDelay, rtk_data_t rxDelay);
|
||||
|
||||
@@ -690,7 +690,7 @@ extern rtk_api_ret_t rtk_port_rgmiiDelayExt_set(rtk_port_t port, rtk_data_t txDe
|
||||
* Note:
|
||||
* This API can set external interface 2 RGMII delay.
|
||||
* In TX delay, there are 2 selection: no-delay and 2ns delay.
|
||||
* In RX dekay, there are 8 steps for delay tunning. 0 for n0-delay, and 7 for maximum delay.
|
||||
* In RX delay, there are 8 steps for delay tuning. 0 for n0-delay, and 7 for maximum delay.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_port_rgmiiDelayExt_get(rtk_port_t port, rtk_data_t *pTxDelay, rtk_data_t *pRxDelay);
|
||||
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes time module high-layer API defination
|
||||
* Feature : The file includes time module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
@@ -310,7 +310,7 @@ extern rtk_api_ret_t rtk_ptp_portEnable_get(rtk_port_t port, rtk_enable_t *pEnab
|
||||
/* Function Name:
|
||||
* rtk_ptp_portTimestamp_get
|
||||
* Description:
|
||||
* Get PTP timstamp according to the PTP identifier on the dedicated port from the specified device.
|
||||
* Get PTP timestamp according to the PTP identifier on the dedicated port from the specified device.
|
||||
* Input:
|
||||
* unit - unit id
|
||||
* port - port id
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes QoS module high-layer API defination
|
||||
* Feature : The file includes QoS module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
@@ -123,7 +123,7 @@ typedef rtk_uint32 rtk_queue_num_t; /* queue number*/
|
||||
/* Function Name:
|
||||
* rtk_qos_init
|
||||
* Description:
|
||||
* Configure Qos default settings with queue number assigment to each port.
|
||||
* Configure QoS default settings with queue number assignment to each port.
|
||||
* Input:
|
||||
* queueNum - Queue number of each port.
|
||||
* Output:
|
||||
@@ -135,7 +135,7 @@ typedef rtk_uint32 rtk_queue_num_t; /* queue number*/
|
||||
* RT_ERR_QUEUE_NUM - Invalid queue number.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* This API will initialize related Qos setting with queue number assigment.
|
||||
* This API will initialize related QoS setting with queue number assignment.
|
||||
* The queue number is from 1 to 8.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_qos_init(rtk_queue_num_t queueNum);
|
||||
@@ -235,7 +235,7 @@ extern rtk_api_ret_t rtk_qos_1pPriRemap_set(rtk_pri_t dot1p_pri, rtk_pri_t int_p
|
||||
* RT_ERR_VLAN_PRIORITY - Invalid priority.
|
||||
* RT_ERR_QOS_INT_PRIORITY - Invalid priority.
|
||||
* Note:
|
||||
* Priority of 802.1Q assigment for internal asic priority, and it is uesed for queue usage and packet scheduling.
|
||||
* Priority of 802.1Q assignment for internal asic priority, and it is used for queue usage and packet scheduling.
|
||||
*/
|
||||
extern rtk_api_ret_t rtk_qos_1pPriRemap_get(rtk_pri_t dot1p_pri, rtk_pri_t *pInt_pri);
|
||||
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*
|
||||
* Purpose : RTL8367/RTL8367C switch high-level API
|
||||
*
|
||||
* Feature : The file includes rate module high-layer API defination
|
||||
* Feature : The file includes rate module high-layer API definition
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@@ -40,7 +40,7 @@ typedef enum rt_error_code_e
|
||||
RT_ERR_NULL_POINTER, /* 0x00000007, input parameter is null pointer */
|
||||
RT_ERR_QUEUE_ID, /* 0x00000008, invalid queue id */
|
||||
RT_ERR_QUEUE_NUM, /* 0x00000009, invalid queue number */
|
||||
RT_ERR_BUSYWAIT_TIMEOUT, /* 0x0000000a, busy watting time out */
|
||||
RT_ERR_BUSYWAIT_TIMEOUT, /* 0x0000000a, busy waiting time out */
|
||||
RT_ERR_MAC, /* 0x0000000b, invalid mac address */
|
||||
RT_ERR_OUT_OF_RANGE, /* 0x0000000c, input parameter out of range */
|
||||
RT_ERR_CHIP_NOT_SUPPORTED, /* 0x0000000d, functions not supported by this chip model */
|
||||
@@ -57,7 +57,7 @@ typedef enum rt_error_code_e
|
||||
/* 0x0001xxxx for vlan */
|
||||
RT_ERR_VLAN_VID = 0x00010000, /* 0x00010000, invalid vid */
|
||||
RT_ERR_VLAN_PRIORITY, /* 0x00010001, invalid 1p priority */
|
||||
RT_ERR_VLAN_EMPTY_ENTRY, /* 0x00010002, emtpy entry of vlan table */
|
||||
RT_ERR_VLAN_EMPTY_ENTRY, /* 0x00010002, empty entry of vlan table */
|
||||
RT_ERR_VLAN_ACCEPT_FRAME_TYPE, /* 0x00010003, invalid accept frame type */
|
||||
RT_ERR_VLAN_EXIST, /* 0x00010004, vlan is exist */
|
||||
RT_ERR_VLAN_ENTRY_NOT_FOUND, /* 0x00010005, specified vlan entry not found */
|
||||
@@ -165,7 +165,7 @@ typedef enum rt_error_code_e
|
||||
RT_ERR_INBW_TOKEN_AMOUNT, /* 0x000c0001, invalid amount of token for input bandwidth control */
|
||||
RT_ERR_INBW_FCON_VALUE, /* 0x000c0002, invalid flow control ON threshold value for input bandwidth control */
|
||||
RT_ERR_INBW_FCOFF_VALUE, /* 0x000c0003, invalid flow control OFF threshold value for input bandwidth control */
|
||||
RT_ERR_INBW_FC_ALLOWANCE, /* 0x000c0004, invalid allowance of incomming packet for input bandwidth control */
|
||||
RT_ERR_INBW_FC_ALLOWANCE, /* 0x000c0004, invalid allowance of incoming packet for input bandwidth control */
|
||||
RT_ERR_INBW_RATE, /* 0x000c0005, invalid input bandwidth */
|
||||
|
||||
/* 0x000dxxxx for QoS */
|
||||
@@ -220,7 +220,7 @@ typedef enum rt_error_code_e
|
||||
RT_ERR_DOT1X_PROC, /* 0x00110006, unauthorized behavior error */
|
||||
RT_ERR_DOT1X_GVLANIDX, /* 0x00110007, guest vlan index error */
|
||||
RT_ERR_DOT1X_GVLANTALK, /* 0x00110008, guest vlan OPDIR error */
|
||||
RT_ERR_DOT1X_MAC_PORT_MISMATCH, /* 0x00110009, Auth MAC and port mismatch eror */
|
||||
RT_ERR_DOT1X_MAC_PORT_MISMATCH, /* 0x00110009, Auth MAC and port mismatch error */
|
||||
|
||||
RT_ERR_END /* The symbol is the latest symbol */
|
||||
} rt_error_code_t;
|
||||
|
||||
@@ -185,10 +185,10 @@ typedef enum rtk_switch_maxPktLen_linkSpeed_e {
|
||||
#define RTK_SCAN_ALL_LOG_PORT(__port__) for(__port__ = 0; __port__ < RTK_SWITCH_PORT_NUM; __port__++) if( rtk_switch_logicalPortCheck(__port__) == RT_ERR_OK)
|
||||
#define RTK_SCAN_ALL_LOG_PORTMASK(__portmask__) for((__portmask__).bits[0] = 0; (__portmask__).bits[0] < 0x7FFFF; (__portmask__).bits[0]++) if( rtk_switch_isPortMaskValid(&__portmask__) == RT_ERR_OK)
|
||||
|
||||
/* Port mask defination */
|
||||
/* Port mask definition */
|
||||
#define RTK_PHY_PORTMASK_ALL (rtk_switch_phyPortMask_get())
|
||||
|
||||
/* Port defination*/
|
||||
/* Port definition*/
|
||||
#define RTK_MAX_LOGICAL_PORT_ID (rtk_switch_maxLogicalPort_get())
|
||||
|
||||
/* Function Name:
|
||||
@@ -477,7 +477,7 @@ extern rtk_api_ret_t rtk_switch_isPortMaskExt(rtk_portmask_t *pPmask);
|
||||
/* Function Name:
|
||||
* rtk_switch_portmask_L2P_get
|
||||
* Description:
|
||||
* Get physicl portmask from logical portmask
|
||||
* Get physical portmask from logical portmask
|
||||
* Input:
|
||||
* pLogicalPmask - logical port mask
|
||||
* Output:
|
||||
@@ -546,7 +546,7 @@ rtk_api_ret_t rtk_switch_logPortMask_get(rtk_portmask_t *pPortmask);
|
||||
/* Function Name:
|
||||
* rtk_switch_init
|
||||
* Description:
|
||||
* Set chip to default configuration enviroment
|
||||
* Set chip to default configuration environment
|
||||
* Input:
|
||||
* None
|
||||
* Output:
|
||||
|
||||
@@ -56,13 +56,13 @@ typedef enum rtk_enable_e
|
||||
#define ETHER_ADDR_LEN 6
|
||||
#endif
|
||||
|
||||
/* ethernet address type */
|
||||
/* Ethernet address type */
|
||||
typedef struct rtk_mac_s
|
||||
{
|
||||
rtk_uint8 octet[ETHER_ADDR_LEN];
|
||||
} rtk_mac_t;
|
||||
|
||||
typedef rtk_uint32 rtk_pri_t; /* priority vlaue */
|
||||
typedef rtk_uint32 rtk_pri_t; /* priority value */
|
||||
typedef rtk_uint32 rtk_qid_t; /* queue id type */
|
||||
typedef rtk_uint32 rtk_data_t;
|
||||
typedef rtk_uint32 rtk_dscp_t; /* dscp vlaue */
|
||||
|
||||
@@ -38,7 +38,7 @@ extern ret_t rtl8367c_setAsicCputagInsertMode(rtk_uint32 mode);
|
||||
extern ret_t rtl8367c_getAsicCputagInsertMode(rtk_uint32 *pMode);
|
||||
extern ret_t rtl8367c_setAsicCputagPriorityRemapping(rtk_uint32 srcPri, rtk_uint32 newPri);
|
||||
extern ret_t rtl8367c_getAsicCputagPriorityRemapping(rtk_uint32 srcPri, rtk_uint32 *pNewPri);
|
||||
extern ret_t rtl8367c_setAsicCputagPosition(rtk_uint32 postion);
|
||||
extern ret_t rtl8367c_setAsicCputagPosition(rtk_uint32 position);
|
||||
extern ret_t rtl8367c_getAsicCputagPosition(rtk_uint32* pPostion);
|
||||
extern ret_t rtl8367c_setAsicCputagMode(rtk_uint32 mode);
|
||||
extern ret_t rtl8367c_getAsicCputagMode(rtk_uint32 *pMode);
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* $Date: 2017-03-08 15:13:58 +0800 (<28>g<EFBFBD>T, 08 <20>T<EFBFBD><54> 2017) $
|
||||
*
|
||||
* Purpose : RTL8367C switch high-level API for RTL8367C
|
||||
* Feature : Green ethernet related functions
|
||||
* Feature : Green Ethernet related functions
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* $Date: 2017-03-08 15:13:58 +0800 (<28>g<EFBFBD>T, 08 <20>T<EFBFBD><54> 2017) $
|
||||
*
|
||||
* Purpose : RTL8367C switch high-level API for RTL8367C
|
||||
* Feature : Qos related functions
|
||||
* Feature : QoS related functions
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* $Date: 2017-03-08 15:13:58 +0800 (<28>g<EFBFBD>T, 08 <20>T<EFBFBD><54> 2017) $
|
||||
*
|
||||
* Purpose : RTL8367C switch high-level API for RTL8367C
|
||||
* Feature : Unkown multicast related functions
|
||||
* Feature : Unknown multicast related functions
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* $Date: 2017-03-08 15:13:58 +0800 (<28>g<EFBFBD>T, 08 <20>T<EFBFBD><54> 2017) $
|
||||
*
|
||||
* Purpose : RTL8367C switch high-level API for RTL8367C
|
||||
* Feature : Regsiter MACRO related definition
|
||||
* Feature : Register MACRO related definition
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@@ -20357,8 +20357,8 @@ auto-generated register address and field data
|
||||
#define RTL8367C_IGMP_MLD_DISCARD_STORM_FILTER_MASK 0x2000
|
||||
#define RTL8367C_REPORT_FORWARD_OFFSET 12
|
||||
#define RTL8367C_REPORT_FORWARD_MASK 0x1000
|
||||
#define RTL8367C_ROBURSTNESS_VAR_OFFSET 9
|
||||
#define RTL8367C_ROBURSTNESS_VAR_MASK 0xE00
|
||||
#define RTL8367C_ROBUSTNESS_VAR_OFFSET 9
|
||||
#define RTL8367C_ROBUSTNESS_VAR_MASK 0xE00
|
||||
#define RTL8367C_LEAVE_SUPPRESSION_OFFSET 8
|
||||
#define RTL8367C_LEAVE_SUPPRESSION_MASK 0x100
|
||||
#define RTL8367C_REPORT_SUPPRESSION_OFFSET 7
|
||||
|
||||
@@ -86,7 +86,7 @@ rtk_api_ret_t rtk_l2_init(void)
|
||||
* RT_ERR_L2_INDEXTBL_FULL - hashed index is full of entries.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* If the unicast mac address already existed in LUT, it will udpate the status of the entry.
|
||||
* If the unicast mac address already existed in LUT, it will update the status of the entry.
|
||||
* Otherwise, it will find an empty or asic auto learned entry to write. If all the entries
|
||||
* with the same hash value can't be replaced, ASIC will return a RT_ERR_L2_INDEXTBL_FULL error.
|
||||
*/
|
||||
@@ -453,7 +453,7 @@ rtk_api_ret_t rtk_l2_addr_del(rtk_mac_t *pMac, rtk_l2_ucastAddr_t *pL2_data)
|
||||
* RT_ERR_PORT_MASK - Invalid portmask.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* If the multicast mac address already existed in the LUT, it will udpate the
|
||||
* If the multicast mac address already existed in the LUT, it will update the
|
||||
* port mask of the entry. Otherwise, it will find an empty or asic auto learned
|
||||
* entry to write. If all the entries with the same hash value can't be replaced,
|
||||
* ASIC will return a RT_ERR_L2_INDEXTBL_FULL error.
|
||||
@@ -800,7 +800,7 @@ rtk_api_ret_t rtk_l2_mcastAddr_del(rtk_l2_mcastAddr_t *pMcastAddr)
|
||||
/* Function Name:
|
||||
* rtk_l2_ipMcastAddr_add
|
||||
* Description:
|
||||
* Add Lut IP multicast entry
|
||||
* Add LUT IP multicast entry
|
||||
* Input:
|
||||
* pIpMcastAddr - IP Multicast entry
|
||||
* Output:
|
||||
@@ -914,7 +914,7 @@ rtk_api_ret_t rtk_l2_ipMcastAddr_add(rtk_l2_ipMcastAddr_t *pIpMcastAddr)
|
||||
* RT_ERR_L2_ENTRY_NOTFOUND - No such LUT entry.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* The API can get Lut table of IP multicast entry.
|
||||
* The API can get LUT table of IP multicast entry.
|
||||
*/
|
||||
rtk_api_ret_t rtk_l2_ipMcastAddr_get(rtk_l2_ipMcastAddr_t *pIpMcastAddr)
|
||||
{
|
||||
@@ -1080,7 +1080,7 @@ rtk_api_ret_t rtk_l2_ipMcastAddr_del(rtk_l2_ipMcastAddr_t *pIpMcastAddr)
|
||||
/* Function Name:
|
||||
* rtk_l2_ipVidMcastAddr_add
|
||||
* Description:
|
||||
* Add Lut IP multicast+VID entry
|
||||
* Add LUT IP multicast+VID entry
|
||||
* Input:
|
||||
* pIpVidMcastAddr - IP & VID multicast Entry
|
||||
* Output:
|
||||
@@ -2143,7 +2143,7 @@ rtk_api_ret_t rtk_l2_learningCnt_get(rtk_port_t port, rtk_mac_cnt_t *pMac_cnt)
|
||||
* Set flooding portmask
|
||||
* Input:
|
||||
* type - flooding type.
|
||||
* pFlood_portmask - flooding porkmask
|
||||
* pFlood_portmask - flooding portmask
|
||||
* Output:
|
||||
* None
|
||||
* Return:
|
||||
@@ -2204,7 +2204,7 @@ rtk_api_ret_t rtk_l2_floodPortMask_set(rtk_l2_flood_type_t floood_type, rtk_port
|
||||
* Input:
|
||||
* type - flooding type.
|
||||
* Output:
|
||||
* pFlood_portmask - flooding porkmask
|
||||
* pFlood_portmask - flooding portmask
|
||||
* Return:
|
||||
* RT_ERR_OK - OK
|
||||
* RT_ERR_FAILED - Failed
|
||||
@@ -2259,10 +2259,10 @@ rtk_api_ret_t rtk_l2_floodPortMask_get(rtk_l2_flood_type_t floood_type, rtk_port
|
||||
/* Function Name:
|
||||
* rtk_l2_localPktPermit_set
|
||||
* Description:
|
||||
* Set permittion of frames if source port and destination port are the same.
|
||||
* Set permission of frames if source port and destination port are the same.
|
||||
* Input:
|
||||
* port - Port id.
|
||||
* permit - permittion status
|
||||
* permit - permission status
|
||||
* Output:
|
||||
* None
|
||||
* Return:
|
||||
@@ -2272,7 +2272,7 @@ rtk_api_ret_t rtk_l2_floodPortMask_get(rtk_l2_flood_type_t floood_type, rtk_port
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* RT_ERR_ENABLE - Invalid permit value.
|
||||
* Note:
|
||||
* This API is setted to permit frame if its source port is equal to destination port.
|
||||
* This API is set to permit frame if its source port is equal to destination port.
|
||||
*/
|
||||
rtk_api_ret_t rtk_l2_localPktPermit_set(rtk_port_t port, rtk_enable_t permit)
|
||||
{
|
||||
@@ -2296,18 +2296,18 @@ rtk_api_ret_t rtk_l2_localPktPermit_set(rtk_port_t port, rtk_enable_t permit)
|
||||
/* Function Name:
|
||||
* rtk_l2_localPktPermit_get
|
||||
* Description:
|
||||
* Get permittion of frames if source port and destination port are the same.
|
||||
* Get permission of frames if source port and destination port are the same.
|
||||
* Input:
|
||||
* port - Port id.
|
||||
* Output:
|
||||
* pPermit - permittion status
|
||||
* pPermit - permission status
|
||||
* Return:
|
||||
* RT_ERR_OK - OK
|
||||
* RT_ERR_FAILED - Failed
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* Note:
|
||||
* This API is to get permittion status for frames if its source port is equal to destination port.
|
||||
* This API is to get permission status for frames if its source port is equal to destination port.
|
||||
*/
|
||||
rtk_api_ret_t rtk_l2_localPktPermit_get(rtk_port_t port, rtk_enable_t *pPermit)
|
||||
{
|
||||
@@ -2331,9 +2331,9 @@ rtk_api_ret_t rtk_l2_localPktPermit_get(rtk_port_t port, rtk_enable_t *pPermit)
|
||||
/* Function Name:
|
||||
* rtk_l2_aging_set
|
||||
* Description:
|
||||
* Set LUT agging out speed
|
||||
* Set LUT ageing out speed
|
||||
* Input:
|
||||
* aging_time - Agging out time.
|
||||
* aging_time - Ageing out time.
|
||||
* Output:
|
||||
* None
|
||||
* Return:
|
||||
@@ -2342,7 +2342,7 @@ rtk_api_ret_t rtk_l2_localPktPermit_get(rtk_port_t port, rtk_enable_t *pPermit)
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_OUT_OF_RANGE - input out of range.
|
||||
* Note:
|
||||
* The API can set LUT agging out period for each entry and the range is from 45s to 458s.
|
||||
* The API can set LUT ageing out period for each entry and the range is from 45s to 458s.
|
||||
*/
|
||||
rtk_api_ret_t rtk_l2_aging_set(rtk_l2_age_time_t aging_time)
|
||||
{
|
||||
@@ -2371,7 +2371,7 @@ rtk_api_ret_t rtk_l2_aging_set(rtk_l2_age_time_t aging_time)
|
||||
/* Function Name:
|
||||
* rtk_l2_aging_get
|
||||
* Description:
|
||||
* Get LUT agging out time
|
||||
* Get LUT ageing out time
|
||||
* Input:
|
||||
* None
|
||||
* Output:
|
||||
@@ -2382,7 +2382,7 @@ rtk_api_ret_t rtk_l2_aging_set(rtk_l2_age_time_t aging_time)
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* Note:
|
||||
* The API can get LUT agging out period for each entry.
|
||||
* The API can get LUT ageing out period for each entry.
|
||||
*/
|
||||
rtk_api_ret_t rtk_l2_aging_get(rtk_l2_age_time_t *pAging_time)
|
||||
{
|
||||
@@ -2416,7 +2416,7 @@ rtk_api_ret_t rtk_l2_aging_get(rtk_l2_age_time_t *pAging_time)
|
||||
/* Function Name:
|
||||
* rtk_l2_ipMcastAddrLookup_set
|
||||
* Description:
|
||||
* Set Lut IP multicast lookup function
|
||||
* Set LUT IP multicast lookup function
|
||||
* Input:
|
||||
* type - Lookup type for IPMC packet.
|
||||
* Output:
|
||||
@@ -2473,7 +2473,7 @@ rtk_api_ret_t rtk_l2_ipMcastAddrLookup_set(rtk_l2_ipmc_lookup_type_t type)
|
||||
/* Function Name:
|
||||
* rtk_l2_ipMcastAddrLookup_get
|
||||
* Description:
|
||||
* Get Lut IP multicast lookup function
|
||||
* Get LUT IP multicast lookup function
|
||||
* Input:
|
||||
* None.
|
||||
* Output:
|
||||
@@ -2518,9 +2518,9 @@ rtk_api_ret_t rtk_l2_ipMcastAddrLookup_get(rtk_l2_ipmc_lookup_type_t *pType)
|
||||
/* Function Name:
|
||||
* rtk_l2_ipMcastForwardRouterPort_set
|
||||
* Description:
|
||||
* Set IPMC packet forward to rounter port also or not
|
||||
* Set IPMC packet forward to router port also or not
|
||||
* Input:
|
||||
* enabled - 1: Inlcude router port, 0, exclude router port
|
||||
* enabled - 1: Include router port, 0, exclude router port
|
||||
* Output:
|
||||
* None.
|
||||
* Return:
|
||||
@@ -2549,11 +2549,11 @@ rtk_api_ret_t rtk_l2_ipMcastForwardRouterPort_set(rtk_enable_t enabled)
|
||||
/* Function Name:
|
||||
* rtk_l2_ipMcastForwardRouterPort_get
|
||||
* Description:
|
||||
* Get IPMC packet forward to rounter port also or not
|
||||
* Get IPMC packet forward to router port also or not
|
||||
* Input:
|
||||
* None.
|
||||
* Output:
|
||||
* pEnabled - 1: Inlcude router port, 0, exclude router port
|
||||
* pEnabled - 1: Include router port, 0, exclude router port
|
||||
* Return:
|
||||
* RT_ERR_OK - OK
|
||||
* RT_ERR_FAILED - Failed
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
/* Function Name:
|
||||
* rtk_led_enable_set
|
||||
* Description:
|
||||
* Set Led enable congiuration
|
||||
* Set Led enable configuration
|
||||
* Input:
|
||||
* group - LED group id.
|
||||
* pPortmask - LED enable port mask.
|
||||
@@ -74,7 +74,7 @@ rtk_api_ret_t rtk_led_enable_set(rtk_led_group_t group, rtk_portmask_t *pPortmas
|
||||
/* Function Name:
|
||||
* rtk_led_enable_get
|
||||
* Description:
|
||||
* Get Led enable congiuration
|
||||
* Get Led enable configuration
|
||||
* Input:
|
||||
* group - LED group id.
|
||||
* Output:
|
||||
@@ -205,7 +205,7 @@ rtk_api_ret_t rtk_led_operation_get(rtk_led_operation_t *pMode)
|
||||
/* Function Name:
|
||||
* rtk_led_modeForce_set
|
||||
* Description:
|
||||
* Set Led group to congiuration force mode
|
||||
* Set Led group to configuration force mode
|
||||
* Input:
|
||||
* port - port ID
|
||||
* group - Support LED group id.
|
||||
@@ -255,7 +255,7 @@ rtk_api_ret_t rtk_led_modeForce_set(rtk_port_t port, rtk_led_group_t group, rtk_
|
||||
/* Function Name:
|
||||
* rtk_led_modeForce_get
|
||||
* Description:
|
||||
* Get Led group to congiuration force mode
|
||||
* Get Led group to configuration force mode
|
||||
* Input:
|
||||
* port - port ID
|
||||
* group - Support LED group id.
|
||||
@@ -369,7 +369,7 @@ rtk_api_ret_t rtk_led_blinkRate_get(rtk_led_blink_rate_t *pBlinkRate)
|
||||
/* Function Name:
|
||||
* rtk_led_groupConfig_set
|
||||
* Description:
|
||||
* Set per group Led to congiuration mode
|
||||
* Set per group Led to configuration mode
|
||||
* Input:
|
||||
* group - LED group.
|
||||
* config - LED configuration
|
||||
@@ -422,7 +422,7 @@ rtk_api_ret_t rtk_led_groupConfig_set(rtk_led_group_t group, rtk_led_congig_t co
|
||||
/* Function Name:
|
||||
* rtk_led_groupConfig_get
|
||||
* Description:
|
||||
* Get Led group congiuration mode
|
||||
* Get Led group configuration mode
|
||||
* Input:
|
||||
* group - LED group.
|
||||
* Output:
|
||||
@@ -583,7 +583,7 @@ rtk_api_ret_t rtk_led_groupAbility_get(rtk_led_group_t group, rtk_led_ability_t
|
||||
/* Function Name:
|
||||
* rtk_led_serialMode_set
|
||||
* Description:
|
||||
* Set Led serial mode active congiuration
|
||||
* Set Led serial mode active configuration
|
||||
* Input:
|
||||
* active - LED group.
|
||||
* Output:
|
||||
@@ -594,7 +594,7 @@ rtk_api_ret_t rtk_led_groupAbility_get(rtk_led_group_t group, rtk_led_ability_t
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* The API can set LED serial mode active congiuration.
|
||||
* The API can set LED serial mode active configuration.
|
||||
*/
|
||||
rtk_api_ret_t rtk_led_serialMode_set(rtk_led_active_t active)
|
||||
{
|
||||
|
||||
@@ -66,7 +66,7 @@ rtk_api_ret_t rtk_mirror_portBased_set(rtk_port_t mirroring_port, rtk_portmask_t
|
||||
|
||||
RTK_CHK_PORTMASK_VALID(pMirrored_tx_portmask);
|
||||
|
||||
/*Mirror Sorce Port Mask Check*/
|
||||
/*Mirror Source Port Mask Check*/
|
||||
if (pMirrored_tx_portmask->bits[0]!=pMirrored_rx_portmask->bits[0]&&pMirrored_tx_portmask->bits[0]!=0&&pMirrored_rx_portmask->bits[0]!=0)
|
||||
return RT_ERR_PORT_MASK;
|
||||
|
||||
@@ -353,7 +353,7 @@ rtk_api_ret_t rtk_mirror_vlanLeaky_get(rtk_enable_t *pTxenable, rtk_enable_t *pR
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_ENABLE - Invalid enable input
|
||||
* Note:
|
||||
* The API is to set mirror VLAN leaky function forwarding packets to miror port.
|
||||
* The API is to set mirror VLAN leaky function forwarding packets to mirror port.
|
||||
*/
|
||||
rtk_api_ret_t rtk_mirror_isolationLeaky_set(rtk_enable_t txenable, rtk_enable_t rxenable)
|
||||
{
|
||||
|
||||
@@ -410,7 +410,7 @@ static rtk_api_ret_t _rtk_port_FiberModeAbility_get(rtk_port_t port, rtk_port_ph
|
||||
/* Function Name:
|
||||
* rtk_port_phyAutoNegoAbility_set
|
||||
* Description:
|
||||
* Set ethernet PHY auto-negotiation desired ability.
|
||||
* Set Ethernet PHY auto-negotiation desired ability.
|
||||
* Input:
|
||||
* port - port id.
|
||||
* pAbility - Ability structure
|
||||
@@ -618,7 +618,7 @@ rtk_api_ret_t rtk_port_phyAutoNegoAbility_set(rtk_port_t port, rtk_port_phy_abil
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
|
||||
* Note:
|
||||
* Get the capablity of specified PHY.
|
||||
* Get the capability of specified PHY.
|
||||
*/
|
||||
rtk_api_ret_t rtk_port_phyAutoNegoAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
|
||||
{
|
||||
@@ -836,7 +836,7 @@ rtk_api_ret_t rtk_port_phyForceModeAbility_set(rtk_port_t port, rtk_port_phy_abi
|
||||
|
||||
if (1 == pAbility->AsyFC)
|
||||
{
|
||||
/*Asymetric flow control in reg 4.11*/
|
||||
/*Asymmetric flow control in reg 4.11*/
|
||||
phyEnMsk4 = phyEnMsk4 | (1 << 11);
|
||||
}
|
||||
if (1 == pAbility->FC)
|
||||
@@ -892,7 +892,7 @@ rtk_api_ret_t rtk_port_phyForceModeAbility_set(rtk_port_t port, rtk_port_phy_abi
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
|
||||
* Note:
|
||||
* Get the capablity of specified PHY.
|
||||
* Get the capability of specified PHY.
|
||||
*/
|
||||
rtk_api_ret_t rtk_port_phyForceModeAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
|
||||
{
|
||||
@@ -982,7 +982,7 @@ rtk_api_ret_t rtk_port_phyForceModeAbility_get(rtk_port_t port, rtk_port_phy_abi
|
||||
/* Function Name:
|
||||
* rtk_port_phyStatus_get
|
||||
* Description:
|
||||
* Get ethernet PHY linking status
|
||||
* Get Ethernet PHY linking status
|
||||
* Input:
|
||||
* port - Port id.
|
||||
* Output:
|
||||
@@ -1363,7 +1363,7 @@ rtk_api_ret_t rtk_port_macStatus_get(rtk_port_t port, rtk_port_mac_ability_t *pP
|
||||
* For UTP port, This API will also enable the digital
|
||||
* loopback bit in PHY register for sync of speed between
|
||||
* PHY and MAC. For EXT port, users need to force the
|
||||
* link state by themself.
|
||||
* link state by themselves.
|
||||
*/
|
||||
rtk_api_ret_t rtk_port_macLocalLoopbackEnable_set(rtk_port_t port, rtk_enable_t enable)
|
||||
{
|
||||
@@ -1508,7 +1508,7 @@ rtk_api_ret_t rtk_port_phyReg_get(rtk_port_t port, rtk_port_phy_reg_t reg, rtk_p
|
||||
/* Function Name:
|
||||
* rtk_port_backpressureEnable_set
|
||||
* Description:
|
||||
* Set the half duplex backpressure enable status of the specific port.
|
||||
* Set the half duplex back-pressure enable status of the specific port.
|
||||
* Input:
|
||||
* port - port id.
|
||||
* enable - Back pressure status.
|
||||
@@ -1521,10 +1521,10 @@ rtk_api_ret_t rtk_port_phyReg_get(rtk_port_t port, rtk_port_phy_reg_t reg, rtk_p
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* RT_ERR_ENABLE - Invalid enable input.
|
||||
* Note:
|
||||
* This API can set the half duplex backpressure enable status of the specific port.
|
||||
* The half duplex backpressure enable status of the port is as following:
|
||||
* This API can set the half duplex back-pressure enable status of the specific port.
|
||||
* The half duplex back-pressure enable status of the port is as following:
|
||||
* - DISABLE(Defer)
|
||||
* - ENABLE (Backpressure)
|
||||
* - ENABLE (Back-pressure)
|
||||
*/
|
||||
rtk_api_ret_t rtk_port_backpressureEnable_set(rtk_port_t port, rtk_enable_t enable)
|
||||
{
|
||||
@@ -1548,7 +1548,7 @@ rtk_api_ret_t rtk_port_backpressureEnable_set(rtk_port_t port, rtk_enable_t enab
|
||||
/* Function Name:
|
||||
* rtk_port_backpressureEnable_get
|
||||
* Description:
|
||||
* Get the half duplex backpressure enable status of the specific port.
|
||||
* Get the half duplex back-pressure enable status of the specific port.
|
||||
* Input:
|
||||
* port - Port id.
|
||||
* Output:
|
||||
@@ -1559,10 +1559,10 @@ rtk_api_ret_t rtk_port_backpressureEnable_set(rtk_port_t port, rtk_enable_t enab
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* Note:
|
||||
* This API can get the half duplex backpressure enable status of the specific port.
|
||||
* The half duplex backpressure enable status of the port is as following:
|
||||
* This API can get the half duplex back-pressure enable status of the specific port.
|
||||
* The half duplex back-pressure enable status of the port is as following:
|
||||
* - DISABLE(Defer)
|
||||
* - ENABLE (Backpressure)
|
||||
* - ENABLE (Back-pressure)
|
||||
*/
|
||||
rtk_api_ret_t rtk_port_backpressureEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
|
||||
{
|
||||
@@ -1643,7 +1643,7 @@ rtk_api_ret_t rtk_port_adminEnable_set(rtk_port_t port, rtk_enable_t enable)
|
||||
/* Function Name:
|
||||
* rtk_port_adminEnable_get
|
||||
* Description:
|
||||
* Get port admin configurationof the specific port.
|
||||
* Get port admin configuration of the specific port.
|
||||
* Input:
|
||||
* port - Port id.
|
||||
* Output:
|
||||
@@ -1704,7 +1704,7 @@ rtk_api_ret_t rtk_port_adminEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* RT_ERR_PORT_MASK - Invalid portmask.
|
||||
* Note:
|
||||
* This API set the port mask that a port can trasmit packet to of each port
|
||||
* This API set the port mask that a port can transmit packet to of each port
|
||||
* A port can only transmit packet to ports included in permitted portmask
|
||||
*/
|
||||
rtk_api_ret_t rtk_port_isolation_set(rtk_port_t port, rtk_portmask_t *pPortmask)
|
||||
@@ -1747,7 +1747,7 @@ rtk_api_ret_t rtk_port_isolation_set(rtk_port_t port, rtk_portmask_t *pPortmask)
|
||||
* RT_ERR_SMI - SMI access error
|
||||
* RT_ERR_PORT_ID - Invalid port number.
|
||||
* Note:
|
||||
* This API get the port mask that a port can trasmit packet to of each port
|
||||
* This API get the port mask that a port can transmit packet to of each port
|
||||
* A port can only transmit packet to ports included in permitted portmask
|
||||
*/
|
||||
rtk_api_ret_t rtk_port_isolation_get(rtk_port_t port, rtk_portmask_t *pPortmask)
|
||||
@@ -1790,7 +1790,7 @@ rtk_api_ret_t rtk_port_isolation_get(rtk_port_t port, rtk_portmask_t *pPortmask)
|
||||
* Note:
|
||||
* This API can set external interface 2 RGMII delay.
|
||||
* In TX delay, there are 2 selection: no-delay and 2ns delay.
|
||||
* In RX dekay, there are 8 steps for delay tunning. 0 for no-delay, and 7 for maximum delay.
|
||||
* In RX delay, there are 8 steps for delay tuning. 0 for no-delay, and 7 for maximum delay.
|
||||
*/
|
||||
rtk_api_ret_t rtk_port_rgmiiDelayExt_set(rtk_port_t port, rtk_data_t txDelay, rtk_data_t rxDelay)
|
||||
{
|
||||
@@ -1841,7 +1841,7 @@ rtk_api_ret_t rtk_port_rgmiiDelayExt_set(rtk_port_t port, rtk_data_t txDelay, rt
|
||||
* Note:
|
||||
* This API can set external interface 2 RGMII delay.
|
||||
* In TX delay, there are 2 selection: no-delay and 2ns delay.
|
||||
* In RX dekay, there are 8 steps for delay tunning. 0 for n0-delay, and 7 for maximum delay.
|
||||
* In RX delay, there are 8 steps for delay tuning. 0 for n0-delay, and 7 for maximum delay.
|
||||
*/
|
||||
rtk_api_ret_t rtk_port_rgmiiDelayExt_get(rtk_port_t port, rtk_data_t *pTxDelay, rtk_data_t *pRxDelay)
|
||||
{
|
||||
|
||||
@@ -401,7 +401,7 @@ rtk_api_ret_t rtk_ptp_portEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
|
||||
/* Function Name:
|
||||
* rtk_ptp_portTimestamp_get
|
||||
* Description:
|
||||
* Get PTP timstamp according to the PTP identifier on the dedicated port from the specified device.
|
||||
* Get PTP timestamp according to the PTP identifier on the dedicated port from the specified device.
|
||||
* Input:
|
||||
* unit - unit id
|
||||
* port - port id
|
||||
|
||||
@@ -28,7 +28,7 @@
|
||||
/* Function Name:
|
||||
* rtk_qos_init
|
||||
* Description:
|
||||
* Configure Qos default settings with queue number assigment to each port.
|
||||
* Configure QoS default settings with queue number assignment to each port.
|
||||
* Input:
|
||||
* queueNum - Queue number of each port.
|
||||
* Output:
|
||||
@@ -40,7 +40,7 @@
|
||||
* RT_ERR_QUEUE_NUM - Invalid queue number.
|
||||
* RT_ERR_INPUT - Invalid input parameters.
|
||||
* Note:
|
||||
* This API will initialize related Qos setting with queue number assigment.
|
||||
* This API will initialize related QoS setting with queue number assignment.
|
||||
* The queue number is from 1 to 8.
|
||||
*/
|
||||
rtk_api_ret_t rtk_qos_init(rtk_queue_num_t queueNum)
|
||||
@@ -143,7 +143,7 @@ rtk_api_ret_t rtk_qos_init(rtk_queue_num_t queueNum)
|
||||
return retVal;
|
||||
}
|
||||
|
||||
/* Finetune B/T value */
|
||||
/* Fine-tune B/T value */
|
||||
if((retVal = rtl8367c_setAsicReg(0x1722, 0x1158)) != RT_ERR_OK)
|
||||
return retVal;
|
||||
|
||||
@@ -455,7 +455,7 @@ rtk_api_ret_t rtk_qos_1pPriRemap_set(rtk_pri_t dot1p_pri, rtk_pri_t int_pri)
|
||||
* RT_ERR_VLAN_PRIORITY - Invalid priority.
|
||||
* RT_ERR_QOS_INT_PRIORITY - Invalid priority.
|
||||
* Note:
|
||||
* Priority of 802.1Q assigment for internal asic priority, and it is uesed for queue usage and packet scheduling.
|
||||
* Priority of 802.1Q assignment for internal asic priority, and it is used for queue usage and packet scheduling.
|
||||
*/
|
||||
rtk_api_ret_t rtk_qos_1pPriRemap_get(rtk_pri_t dot1p_pri, rtk_pri_t *pInt_pri)
|
||||
{
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
* available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
|
||||
*
|
||||
* $Revision: 76306 $
|
||||
* $Date: 2017-03-08 15:13:58 +0800 (<EFBFBD>g<EFBFBD>T, 08 <EFBFBD>T<EFBFBD><EFBFBD> 2017) $
|
||||
* $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
|
||||
*
|
||||
* Purpose : Declaration of RLDP and RLPP API
|
||||
*
|
||||
@@ -404,7 +404,7 @@ rtk_api_ret_t rtk_rldp_portStatus_get(rtk_port_t port, rtk_rldp_portStatus_t *pP
|
||||
* RT_ERR_NULL_POINTER
|
||||
* Note:
|
||||
* Clear operation effect loop_enter and loop_leave only, other field in
|
||||
* the structure are don't care. Loop status cab't be clean.
|
||||
* the structure are don't care. Loop status can't be clean.
|
||||
*/
|
||||
rtk_api_ret_t rtk_rldp_portStatus_set(rtk_port_t port, rtk_rldp_portStatus_t *pPortStatus)
|
||||
{
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user