Update On Fri May 9 20:36:54 CEST 2025

This commit is contained in:
github-action[bot]
2025-05-09 20:36:54 +02:00
parent 40a1860078
commit 5ad5eb65a0
268 changed files with 32572 additions and 1774 deletions

1
.github/update.log vendored
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@@ -993,3 +993,4 @@ Update On Mon May 5 20:33:21 CEST 2025
Update On Tue May 6 20:37:12 CEST 2025
Update On Wed May 7 20:36:18 CEST 2025
Update On Thu May 8 20:37:23 CEST 2025
Update On Fri May 9 20:36:45 CEST 2025

View File

@@ -30,7 +30,7 @@
"country-code-emoji": "2.3.0",
"country-emoji": "1.5.6",
"dayjs": "1.11.13",
"framer-motion": "12.10.1",
"framer-motion": "12.10.5",
"i18next": "25.0.2",
"jotai": "2.12.4",
"json-schema": "0.4.0",

View File

@@ -23,7 +23,7 @@
"@vitejs/plugin-react": "4.4.1",
"ahooks": "3.8.4",
"d3": "7.9.0",
"framer-motion": "12.10.1",
"framer-motion": "12.10.5",
"react": "19.1.0",
"react-dom": "19.1.0",
"react-error-boundary": "6.0.0",

View File

@@ -65,7 +65,7 @@
"@tauri-apps/cli": "2.5.0",
"@types/fs-extra": "11.0.4",
"@types/lodash-es": "4.17.12",
"@types/node": "22.15.16",
"@types/node": "22.15.17",
"@typescript-eslint/eslint-plugin": "8.32.0",
"@typescript-eslint/parser": "8.32.0",
"autoprefixer": "10.4.21",
@@ -73,11 +73,11 @@
"cross-env": "7.0.3",
"dedent": "1.6.0",
"eslint": "9.26.0",
"eslint-config-prettier": "10.1.3",
"eslint-config-prettier": "10.1.5",
"eslint-import-resolver-alias": "1.1.2",
"eslint-plugin-html": "8.1.2",
"eslint-plugin-import": "2.31.0",
"eslint-plugin-n": "17.17.0",
"eslint-plugin-n": "17.18.0",
"eslint-plugin-prettier": "5.4.0",
"eslint-plugin-promise": "7.2.1",
"eslint-plugin-react": "7.37.5",
@@ -94,7 +94,7 @@
"postcss-scss": "4.0.9",
"prettier": "3.5.3",
"prettier-plugin-tailwindcss": "0.6.11",
"prettier-plugin-toml": "2.0.4",
"prettier-plugin-toml": "2.0.5",
"react-devtools": "6.1.2",
"stylelint": "16.19.1",
"stylelint-config-html": "1.1.0",

View File

@@ -20,7 +20,7 @@ importers:
devDependencies:
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specifier: 19.8.1
version: 19.8.1(@types/node@22.15.16)(typescript@5.8.3)
version: 19.8.1(@types/node@22.15.17)(typescript@5.8.3)
'@commitlint/config-conventional':
specifier: 19.8.1
version: 19.8.1
@@ -43,8 +43,8 @@ importers:
specifier: 4.17.12
version: 4.17.12
'@types/node':
specifier: 22.15.16
version: 22.15.16
specifier: 22.15.17
version: 22.15.17
'@typescript-eslint/eslint-plugin':
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version: 8.32.0(@typescript-eslint/parser@8.32.0(eslint@9.26.0(jiti@2.4.2))(typescript@5.8.3))(eslint@9.26.0(jiti@2.4.2))(typescript@5.8.3)
@@ -67,8 +67,8 @@ importers:
specifier: 9.26.0
version: 9.26.0(jiti@2.4.2)
eslint-config-prettier:
specifier: 10.1.3
version: 10.1.3(eslint@9.26.0(jiti@2.4.2))
specifier: 10.1.5
version: 10.1.5(eslint@9.26.0(jiti@2.4.2))
eslint-import-resolver-alias:
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version: 1.1.2(eslint-plugin-import@2.31.0(@typescript-eslint/parser@8.32.0(eslint@9.26.0(jiti@2.4.2))(typescript@5.8.3))(eslint@9.26.0(jiti@2.4.2)))
@@ -79,11 +79,11 @@ importers:
specifier: 2.31.0
version: 2.31.0(@typescript-eslint/parser@8.32.0(eslint@9.26.0(jiti@2.4.2))(typescript@5.8.3))(eslint@9.26.0(jiti@2.4.2))
eslint-plugin-n:
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version: 17.17.0(eslint@9.26.0(jiti@2.4.2))
specifier: 17.18.0
version: 17.18.0(eslint@9.26.0(jiti@2.4.2))
eslint-plugin-prettier:
specifier: 5.4.0
version: 5.4.0(eslint-config-prettier@10.1.3(eslint@9.26.0(jiti@2.4.2)))(eslint@9.26.0(jiti@2.4.2))(prettier@3.5.3)
version: 5.4.0(eslint-config-prettier@10.1.5(eslint@9.26.0(jiti@2.4.2)))(eslint@9.26.0(jiti@2.4.2))(prettier@3.5.3)
eslint-plugin-promise:
specifier: 7.2.1
version: 7.2.1(eslint@9.26.0(jiti@2.4.2))
@@ -101,7 +101,7 @@ importers:
version: 16.0.0
knip:
specifier: 5.54.1
version: 5.54.1(@types/node@22.15.16)(typescript@5.8.3)
version: 5.54.1(@types/node@22.15.17)(typescript@5.8.3)
lint-staged:
specifier: 15.5.2
version: 15.5.2
@@ -130,8 +130,8 @@ importers:
specifier: 0.6.11
version: 0.6.11(@ianvs/prettier-plugin-sort-imports@4.4.1(prettier@3.5.3))(@trivago/prettier-plugin-sort-imports@4.3.0(prettier@3.5.3))(prettier@3.5.3)
prettier-plugin-toml:
specifier: 2.0.4
version: 2.0.4(prettier@3.5.3)
specifier: 2.0.5
version: 2.0.5(prettier@3.5.3)
react-devtools:
specifier: 6.1.2
version: 6.1.2(bufferutil@4.0.8)(utf-8-validate@5.0.10)
@@ -266,8 +266,8 @@ importers:
specifier: 1.11.13
version: 1.11.13
framer-motion:
specifier: 12.10.1
version: 12.10.1(@emotion/is-prop-valid@1.3.0)(react-dom@19.1.0(react@19.1.0))(react@19.1.0)
specifier: 12.10.5
version: 12.10.5(@emotion/is-prop-valid@1.3.0)(react-dom@19.1.0(react@19.1.0))(react@19.1.0)
i18next:
specifier: 25.0.2
version: 25.0.2(typescript@5.8.3)
@@ -349,7 +349,7 @@ importers:
version: 1.119.1(@tanstack/react-router@1.119.0(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(@tanstack/router-core@1.119.0)(csstype@3.1.3)(react-dom@19.1.0(react@19.1.0))(react@19.1.0)(tiny-invariant@1.3.3)
'@tanstack/router-plugin':
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version: 1.119.0(@tanstack/react-router@1.119.0(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
version: 1.119.0(@tanstack/react-router@1.119.0(react-dom@19.1.0(react@19.1.0))(react@19.1.0))(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
'@tauri-apps/plugin-clipboard-manager':
specifier: 2.2.2
version: 2.2.2
@@ -385,13 +385,13 @@ importers:
version: 13.15.0
'@vitejs/plugin-legacy':
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version: 6.1.1(terser@5.36.0)(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
version: 6.1.1(terser@5.36.0)(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
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specifier: 4.4.1
version: 4.4.1(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
version: 4.4.1(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
'@vitejs/plugin-react-swc':
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version: 3.9.0(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
version: 3.9.0(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
change-case:
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version: 5.4.4
@@ -430,19 +430,19 @@ importers:
version: 13.15.0
vite:
specifier: 6.3.5
version: 6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
version: 6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
vite-plugin-html:
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version: 3.2.2(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
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vite-plugin-sass-dts:
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version: 1.3.31(postcss@8.5.3)(prettier@3.5.3)(sass-embedded@1.87.0)(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
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vite-plugin-svgr:
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version: 4.3.0(rollup@4.40.0)(typescript@5.8.3)(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
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vite-tsconfig-paths:
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version: 5.1.4(typescript@5.8.3)(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
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zod:
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version: 3.24.4
@@ -478,7 +478,7 @@ importers:
version: 19.1.3
'@vitejs/plugin-react':
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version: 4.4.1(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
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ahooks:
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version: 3.8.4(react@19.1.0)
@@ -486,8 +486,8 @@ importers:
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framer-motion:
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version: 12.10.1(@emotion/is-prop-valid@1.3.0)(react-dom@19.1.0(react@19.1.0))(react@19.1.0)
specifier: 12.10.5
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react:
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version: 19.1.0
@@ -508,10 +508,10 @@ importers:
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vite:
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version: 6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
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devDependencies:
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@@ -536,13 +536,13 @@ importers:
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vite-plugin-dts:
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version: 4.5.3(@types/node@22.15.16)(rollup@4.40.0)(typescript@5.8.3)(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))
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scripts:
dependencies:
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version: 6.0.0
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version: 6.0.1
'@types/figlet':
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@@ -613,8 +613,8 @@ importers:
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@@ -2067,16 +2067,12 @@ packages:
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engines: {node: '>= 18'}
'@octokit/graphql@7.1.0':
@@ -2127,8 +2123,8 @@ packages:
peerDependencies:
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engines: {node: '>= 18'}
peerDependencies:
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@@ -2157,20 +2153,16 @@ packages:
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- supports-color
'@vitejs/plugin-react-swc@3.9.0(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))':
'@vitejs/plugin-react-swc@3.9.0(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))':
dependencies:
'@swc/core': 1.11.21
vite: 6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
vite: 6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
transitivePeerDependencies:
- '@swc/helpers'
'@vitejs/plugin-react@4.4.1(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))':
'@vitejs/plugin-react@4.4.1(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0))':
dependencies:
'@babel/core': 7.26.10
'@babel/plugin-transform-react-jsx-self': 7.25.9(@babel/core@7.26.10)
'@babel/plugin-transform-react-jsx-source': 7.25.9(@babel/core@7.26.10)
'@types/babel__core': 7.20.5
react-refresh: 0.17.0
vite: 6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
vite: 6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
transitivePeerDependencies:
- supports-color
@@ -12156,9 +12138,9 @@ snapshots:
object-assign: 4.1.1
vary: 1.1.2
cosmiconfig-typescript-loader@6.1.0(@types/node@22.15.16)(cosmiconfig@9.0.0(typescript@5.8.3))(typescript@5.8.3):
cosmiconfig-typescript-loader@6.1.0(@types/node@22.15.17)(cosmiconfig@9.0.0(typescript@5.8.3))(typescript@5.8.3):
dependencies:
'@types/node': 22.15.16
'@types/node': 22.15.17
cosmiconfig: 9.0.0(typescript@5.8.3)
jiti: 2.4.2
typescript: 5.8.3
@@ -12886,7 +12868,7 @@ snapshots:
eslint: 9.26.0(jiti@2.4.2)
semver: 7.7.1
eslint-config-prettier@10.1.3(eslint@9.26.0(jiti@2.4.2)):
eslint-config-prettier@10.1.5(eslint@9.26.0(jiti@2.4.2)):
dependencies:
eslint: 9.26.0(jiti@2.4.2)
@@ -12931,7 +12913,7 @@ snapshots:
eslint-plugin-es-x@7.8.0(eslint@9.26.0(jiti@2.4.2)):
dependencies:
'@eslint-community/eslint-utils': 4.5.1(eslint@9.26.0(jiti@2.4.2))
'@eslint-community/eslint-utils': 4.7.0(eslint@9.26.0(jiti@2.4.2))
'@eslint-community/regexpp': 4.12.1
eslint: 9.26.0(jiti@2.4.2)
eslint-compat-utils: 0.5.1(eslint@9.26.0(jiti@2.4.2))
@@ -12987,9 +12969,9 @@ snapshots:
- eslint-import-resolver-webpack
- supports-color
eslint-plugin-n@17.17.0(eslint@9.26.0(jiti@2.4.2)):
eslint-plugin-n@17.18.0(eslint@9.26.0(jiti@2.4.2)):
dependencies:
'@eslint-community/eslint-utils': 4.5.1(eslint@9.26.0(jiti@2.4.2))
'@eslint-community/eslint-utils': 4.7.0(eslint@9.26.0(jiti@2.4.2))
enhanced-resolve: 5.18.1
eslint: 9.26.0(jiti@2.4.2)
eslint-plugin-es-x: 7.8.0(eslint@9.26.0(jiti@2.4.2))
@@ -12999,14 +12981,14 @@ snapshots:
minimatch: 9.0.5
semver: 7.7.1
eslint-plugin-prettier@5.4.0(eslint-config-prettier@10.1.3(eslint@9.26.0(jiti@2.4.2)))(eslint@9.26.0(jiti@2.4.2))(prettier@3.5.3):
eslint-plugin-prettier@5.4.0(eslint-config-prettier@10.1.5(eslint@9.26.0(jiti@2.4.2)))(eslint@9.26.0(jiti@2.4.2))(prettier@3.5.3):
dependencies:
eslint: 9.26.0(jiti@2.4.2)
prettier: 3.5.3
prettier-linter-helpers: 1.0.0
synckit: 0.11.1
optionalDependencies:
eslint-config-prettier: 10.1.3(eslint@9.26.0(jiti@2.4.2))
eslint-config-prettier: 10.1.5(eslint@9.26.0(jiti@2.4.2))
eslint-plugin-promise@7.2.1(eslint@9.26.0(jiti@2.4.2)):
dependencies:
@@ -13373,9 +13355,9 @@ snapshots:
fraction.js@4.3.7: {}
framer-motion@12.10.1(@emotion/is-prop-valid@1.3.0)(react-dom@19.1.0(react@19.1.0))(react@19.1.0):
framer-motion@12.10.5(@emotion/is-prop-valid@1.3.0)(react-dom@19.1.0(react@19.1.0))(react@19.1.0):
dependencies:
motion-dom: 12.10.1
motion-dom: 12.10.5
motion-utils: 12.9.4
tslib: 2.8.1
optionalDependencies:
@@ -14228,10 +14210,10 @@ snapshots:
kind-of@6.0.3: {}
knip@5.54.1(@types/node@22.15.16)(typescript@5.8.3):
knip@5.54.1(@types/node@22.15.17)(typescript@5.8.3):
dependencies:
'@nodelib/fs.walk': 1.2.8
'@types/node': 22.15.16
'@types/node': 22.15.17
enhanced-resolve: 5.18.1
fast-glob: 3.3.3
formatly: 0.2.3
@@ -14812,7 +14794,7 @@ snapshots:
vscode-uri: 3.0.8
yaml: 2.7.0
motion-dom@12.10.1:
motion-dom@12.10.5:
dependencies:
motion-utils: 12.9.4
@@ -14869,7 +14851,7 @@ snapshots:
eslint: 9.26.0(jiti@2.4.2)
eslint-import-resolver-typescript: 3.7.0(eslint-plugin-import-x@4.5.0(eslint@9.26.0(jiti@2.4.2))(typescript@5.8.3))(eslint-plugin-import@2.31.0(@typescript-eslint/parser@8.32.0(eslint@9.26.0(jiti@2.4.2))(typescript@5.8.3))(eslint@9.26.0(jiti@2.4.2)))(eslint@9.26.0(jiti@2.4.2))
eslint-plugin-import-x: 4.5.0(eslint@9.26.0(jiti@2.4.2))(typescript@5.8.3)
eslint-plugin-n: 17.17.0(eslint@9.26.0(jiti@2.4.2))
eslint-plugin-n: 17.18.0(eslint@9.26.0(jiti@2.4.2))
eslint-plugin-promise: 7.2.1(eslint@9.26.0(jiti@2.4.2))
eslint-plugin-react: 7.37.5(eslint@9.26.0(jiti@2.4.2))
find-up: 5.0.0
@@ -15322,7 +15304,7 @@ snapshots:
'@ianvs/prettier-plugin-sort-imports': 4.4.1(prettier@3.5.3)
'@trivago/prettier-plugin-sort-imports': 4.3.0(prettier@3.5.3)
prettier-plugin-toml@2.0.4(prettier@3.5.3):
prettier-plugin-toml@2.0.5(prettier@3.5.3):
dependencies:
'@taplo/lib': 0.5.0
prettier: 3.5.3
@@ -16649,7 +16631,7 @@ snapshots:
undici-types@6.21.0: {}
undici@5.28.4:
undici@5.29.0:
dependencies:
'@fastify/busboy': 2.1.1
@@ -16859,9 +16841,9 @@ snapshots:
- rollup
- supports-color
vite-plugin-dts@4.5.3(@types/node@22.15.16)(rollup@4.40.0)(typescript@5.8.3)(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)):
vite-plugin-dts@4.5.3(@types/node@22.15.17)(rollup@4.40.0)(typescript@5.8.3)(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)):
dependencies:
'@microsoft/api-extractor': 7.51.0(@types/node@22.15.16)
'@microsoft/api-extractor': 7.51.0(@types/node@22.15.17)
'@rollup/pluginutils': 5.1.4(rollup@4.40.0)
'@volar/typescript': 2.4.11
'@vue/language-core': 2.2.0(typescript@5.8.3)
@@ -16872,13 +16854,13 @@ snapshots:
magic-string: 0.30.17
typescript: 5.8.3
optionalDependencies:
vite: 6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
vite: 6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
transitivePeerDependencies:
- '@types/node'
- rollup
- supports-color
vite-plugin-html@3.2.2(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)):
vite-plugin-html@3.2.2(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)):
dependencies:
'@rollup/pluginutils': 4.2.1
colorette: 2.0.20
@@ -16892,39 +16874,39 @@ snapshots:
html-minifier-terser: 6.1.0
node-html-parser: 5.4.2
pathe: 0.2.0
vite: 6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
vite: 6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
vite-plugin-sass-dts@1.3.31(postcss@8.5.3)(prettier@3.5.3)(sass-embedded@1.87.0)(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)):
vite-plugin-sass-dts@1.3.31(postcss@8.5.3)(prettier@3.5.3)(sass-embedded@1.87.0)(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)):
dependencies:
postcss: 8.5.3
postcss-js: 4.0.1(postcss@8.5.3)
prettier: 3.5.3
sass-embedded: 1.87.0
vite: 6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
vite: 6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
vite-plugin-svgr@4.3.0(rollup@4.40.0)(typescript@5.8.3)(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)):
vite-plugin-svgr@4.3.0(rollup@4.40.0)(typescript@5.8.3)(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)):
dependencies:
'@rollup/pluginutils': 5.1.3(rollup@4.40.0)
'@svgr/core': 8.1.0(typescript@5.8.3)
'@svgr/plugin-jsx': 8.1.0(@svgr/core@8.1.0(typescript@5.8.3))
vite: 6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
vite: 6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
transitivePeerDependencies:
- rollup
- supports-color
- typescript
vite-tsconfig-paths@5.1.4(typescript@5.8.3)(vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)):
vite-tsconfig-paths@5.1.4(typescript@5.8.3)(vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)):
dependencies:
debug: 4.3.7
globrex: 0.1.2
tsconfck: 3.0.3(typescript@5.8.3)
optionalDependencies:
vite: 6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
vite: 6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0)
transitivePeerDependencies:
- supports-color
- typescript
vite@6.3.5(@types/node@22.15.16)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0):
vite@6.3.5(@types/node@22.15.17)(jiti@2.4.2)(less@4.2.0)(lightningcss@1.29.2)(sass-embedded@1.87.0)(sass@1.83.0)(stylus@0.62.0)(terser@5.36.0)(tsx@4.19.4)(yaml@2.7.0):
dependencies:
esbuild: 0.25.0
fdir: 6.4.4(picomatch@4.0.2)
@@ -16933,7 +16915,7 @@ snapshots:
rollup: 4.40.0
tinyglobby: 0.2.13
optionalDependencies:
'@types/node': 22.15.16
'@types/node': 22.15.17
fsevents: 2.3.3
jiti: 2.4.2
less: 4.2.0

View File

@@ -3,7 +3,7 @@
"type": "module",
"version": "2.0.0",
"dependencies": {
"@actions/github": "6.0.0",
"@actions/github": "6.0.1",
"@types/figlet": "1.7.0",
"@types/semver": "7.7.0",
"figlet": "1.8.1",

View File

@@ -18,6 +18,7 @@
- 切换自定义代理地址导致系统代理状态异常
- Macos TUN 默认无效网卡名称
- 托盘更改订阅后 UI 不同步的问题
- 修复提权漏洞,改用带认证的 IPC 通信(后续还可以加强完善认证密钥创建和管理机制)
#### 新增了:
- 允许代理主机地址设置为非 127.0.0.1 对 WSL 代理友好
@@ -47,6 +48,7 @@
- 重构前端通知系统分离通知线程防止前端卡死
- 优化网络请求和错误处理
- 重构通知系统
- 使用异步方法重构 UI 启动逻辑,解决启动软件过程中的各种卡死问题
## v2.2.3

View File

@@ -87,23 +87,18 @@ pub async fn download_icon_cache(url: String, name: String) -> CmdResult<String>
let icon_cache_dir = wrap_err!(dirs::app_home_dir())?.join("icons").join("cache");
let icon_path = icon_cache_dir.join(&name);
// 如果文件已存在,直接返回路径
if icon_path.exists() {
return Ok(icon_path.to_string_lossy().to_string());
}
// 确保缓存目录存在
if !icon_cache_dir.exists() {
let _ = std::fs::create_dir_all(&icon_cache_dir);
}
// 使用临时文件名来下载
let temp_path = icon_cache_dir.join(format!("{}.downloading", &name));
// 下载文件到临时位置
let response = wrap_err!(reqwest::get(&url).await)?;
// 检查内容类型是否为图片
let content_type = response
.headers()
.get(reqwest::header::CONTENT_TYPE)
@@ -112,16 +107,13 @@ pub async fn download_icon_cache(url: String, name: String) -> CmdResult<String>
let is_image = content_type.starts_with("image/");
// 获取响应内容
let content = wrap_err!(response.bytes().await)?;
// 检查内容是否为HTML (针对CDN错误页面)
let is_html = content.len() > 15
&& (content.starts_with(b"<!DOCTYPE html")
|| content.starts_with(b"<html")
|| content.starts_with(b"<?xml"));
// 只有当内容确实是图片时才保存
if is_image && !is_html {
{
let mut file = match std::fs::File::create(&temp_path) {
@@ -138,7 +130,6 @@ pub async fn download_icon_cache(url: String, name: String) -> CmdResult<String>
wrap_err!(std::io::copy(&mut content.as_ref(), &mut file))?;
}
// 再次检查目标文件是否已存在,避免重命名覆盖其他线程已完成的文件
if !icon_path.exists() {
match std::fs::rename(&temp_path, &icon_path) {
Ok(_) => {}
@@ -223,6 +214,29 @@ pub fn notify_ui_ready() -> CmdResult<()> {
Ok(())
}
/// UI加载阶段
#[tauri::command]
pub fn update_ui_stage(stage: String) -> CmdResult<()> {
log::info!(target: "app", "UI加载阶段更新: {}", stage);
use crate::utils::resolve::UiReadyStage;
let stage_enum = match stage.as_str() {
"NotStarted" => UiReadyStage::NotStarted,
"Loading" => UiReadyStage::Loading,
"DomReady" => UiReadyStage::DomReady,
"ResourcesLoaded" => UiReadyStage::ResourcesLoaded,
"Ready" => UiReadyStage::Ready,
_ => {
log::warn!(target: "app", "未知的UI加载阶段: {}", stage);
return Err(format!("未知的UI加载阶段: {}", stage));
}
};
crate::utils::resolve::update_ui_ready_stage(stage_enum);
Ok(())
}
/// 重置UI就绪状态
#[tauri::command]
pub fn reset_ui_ready_state() -> CmdResult<()> {

View File

@@ -11,7 +11,7 @@ use crate::{
mihomo::Rate,
},
resolve,
utils::{dirs::find_target_icons, i18n::t, logging::Type, resolve::VERSION},
utils::{dirs::find_target_icons, i18n::t, resolve::VERSION},
};
use anyhow::Result;
@@ -29,7 +29,7 @@ use std::sync::Arc;
use tauri::{
menu::{CheckMenuItem, IsMenuItem, MenuEvent, MenuItem, PredefinedMenuItem, Submenu},
tray::{MouseButton, MouseButtonState, TrayIconEvent},
App, AppHandle, Wry,
AppHandle, Wry,
};
#[cfg(target_os = "macos")]
use tokio::sync::broadcast;
@@ -178,52 +178,6 @@ impl Tray {
Ok(())
}
pub fn create_systray(&self, app: &App) -> Result<()> {
let mut builder = TrayIconBuilder::with_id("main")
.icon(app.default_window_icon().unwrap().clone())
.icon_as_template(false);
#[cfg(any(target_os = "macos", target_os = "windows"))]
{
let tray_event = { Config::verge().latest().tray_event.clone() };
let tray_event: String = tray_event.unwrap_or("main_window".into());
if tray_event.as_str() != "tray_menu" {
builder = builder.show_menu_on_left_click(false);
}
}
let tray = builder.build(app)?;
tray.on_tray_icon_event(|_, event| {
let tray_event = { Config::verge().latest().tray_event.clone() };
let tray_event: String = tray_event.unwrap_or("main_window".into());
log::debug!(target: "app","tray event: {:?}", tray_event);
if let TrayIconEvent::Click {
button: MouseButton::Left,
button_state: MouseButtonState::Down,
..
} = event
{
match tray_event.as_str() {
"system_proxy" => feat::toggle_system_proxy(),
"tun_mode" => feat::toggle_tun_mode(None),
"main_window" => {
// 如果在轻量模式中,先退出轻量模式
if crate::module::lightweight::is_in_lightweight_mode() {
crate::module::lightweight::exit_lightweight_mode();
}
// 然后创建窗口
resolve::create_window(true)
}
_ => {}
}
}
});
tray.on_menu_event(on_menu_event);
Ok(())
}
/// 更新托盘点击行为
pub fn update_click_behavior(&self) -> Result<()> {
let app_handle = handle::Handle::global().app_handle().unwrap();
@@ -239,7 +193,14 @@ impl Tray {
/// 更新托盘菜单
pub fn update_menu(&self) -> Result<()> {
let app_handle = handle::Handle::global().app_handle().unwrap();
let app_handle = match handle::Handle::global().app_handle() {
Some(handle) => handle,
None => {
log::warn!(target: "app", "更新托盘菜单失败: app_handle不存在");
return Ok(()); // 早期返回避免panic
}
};
let verge = Config::verge().latest().clone();
let system_proxy = verge.enable_system_proxy.as_ref().unwrap_or(&false);
let tun_mode = verge.enable_tun_mode.as_ref().unwrap_or(&false);
@@ -258,7 +219,8 @@ impl Tray {
.unwrap_or_default();
let is_lightweight_mode = is_in_lightweight_mode();
let tray = app_handle.tray_by_id("main").unwrap();
match app_handle.tray_by_id("main") {
Some(tray) => {
let _ = tray.set_menu(Some(create_tray_menu(
&app_handle,
Some(mode.as_str()),
@@ -269,16 +231,35 @@ impl Tray {
)?));
Ok(())
}
None => {
log::warn!(target: "app", "更新托盘菜单失败: 托盘不存在");
Ok(())
}
}
}
/// 更新托盘图标
pub fn update_icon(&self, rate: Option<Rate>) -> Result<()> {
let app_handle = match handle::Handle::global().app_handle() {
Some(handle) => handle,
None => {
log::warn!(target: "app", "更新托盘图标失败: app_handle不存在");
return Ok(());
}
};
let tray = match app_handle.tray_by_id("main") {
Some(tray) => tray,
None => {
log::warn!(target: "app", "更新托盘图标失败: 托盘不存在");
return Ok(());
}
};
let verge = Config::verge().latest().clone();
let system_mode = verge.enable_system_proxy.as_ref().unwrap_or(&false);
let tun_mode = verge.enable_tun_mode.as_ref().unwrap_or(&false);
let app_handle = handle::Handle::global().app_handle().unwrap();
let tray = app_handle.tray_by_id("main").unwrap();
let (is_custom_icon, icon_bytes) = match (*system_mode, *tun_mode) {
(true, true) => TrayState::get_tun_tray_icon(),
(true, false) => TrayState::get_sysproxy_tray_icon(),
@@ -302,11 +283,15 @@ impl Tray {
Some(rate)
} else {
let guard = self.speed_rate.lock();
if let Some(rate) = guard.as_ref().unwrap().get_curent_rate() {
if let Some(guard) = guard.as_ref() {
if let Some(rate) = guard.get_curent_rate() {
Some(rate)
} else {
Some(Rate::default())
}
} else {
Some(Rate::default())
}
};
let mut rate_guard = self.rate_cache.lock();
@@ -320,10 +305,11 @@ impl Tray {
};
let rate = rate_guard.as_ref();
let rate_bytes = SpeedRate::add_speed_text(is_custom_icon, bytes, rate).unwrap();
if let Ok(rate_bytes) = SpeedRate::add_speed_text(is_custom_icon, bytes, rate) {
let _ = tray.set_icon(Some(tauri::image::Image::from_bytes(&rate_bytes)?));
let _ = tray.set_icon_as_template(!is_custom_icon && !is_colorful);
}
}
Ok(())
}
@@ -336,8 +322,21 @@ impl Tray {
/// 更新托盘提示
pub fn update_tooltip(&self) -> Result<()> {
let app_handle = handle::Handle::global().app_handle().unwrap();
let version = VERSION.get().unwrap();
let app_handle = match handle::Handle::global().app_handle() {
Some(handle) => handle,
None => {
log::warn!(target: "app", "更新托盘提示失败: app_handle不存在");
return Ok(());
}
};
let version = match VERSION.get() {
Some(v) => v,
None => {
log::warn!(target: "app", "更新托盘提示失败: 版本信息不存在");
return Ok(());
}
};
let verge = Config::verge().latest().clone();
let system_proxy = verge.enable_system_proxy.as_ref().unwrap_or(&false);
@@ -354,14 +353,15 @@ impl Tray {
let profiles = Config::profiles();
let profiles = profiles.latest();
if let Some(current_profile_uid) = profiles.get_current() {
let current_profile = profiles.get_item(&current_profile_uid);
current_profile_name = match &current_profile.unwrap().name {
if let Ok(profile) = profiles.get_item(&current_profile_uid) {
current_profile_name = match &profile.name {
Some(profile_name) => profile_name.to_string(),
None => current_profile_name,
};
}
};
let tray = app_handle.tray_by_id("main").unwrap();
if let Some(tray) = app_handle.tray_by_id("main") {
let _ = tray.set_tooltip(Some(&format!(
"Clash Verge {version}\n{}: {}\n{}: {}\n{}: {}",
t("SysProxy"),
@@ -371,6 +371,10 @@ impl Tray {
t("Profile"),
current_profile_name
)));
} else {
log::warn!(target: "app", "更新托盘提示失败: 托盘不存在");
}
Ok(())
}
@@ -532,6 +536,57 @@ impl Tray {
drop(tx);
}
}
pub fn create_tray_from_handle(&self, app_handle: &AppHandle) -> Result<()> {
log::info!(target: "app", "正在从AppHandle创建系统托盘");
// 获取图标
let icon_bytes = TrayState::get_common_tray_icon().1;
let icon = tauri::image::Image::from_bytes(&icon_bytes)?;
let mut builder = TrayIconBuilder::with_id("main")
.icon(icon)
.icon_as_template(false);
#[cfg(any(target_os = "macos", target_os = "windows"))]
{
let tray_event = { Config::verge().latest().tray_event.clone() };
let tray_event: String = tray_event.unwrap_or("main_window".into());
if tray_event.as_str() != "tray_menu" {
builder = builder.show_menu_on_left_click(false);
}
}
let tray = builder.build(app_handle)?;
tray.on_tray_icon_event(|_, event| {
let tray_event = { Config::verge().latest().tray_event.clone() };
let tray_event: String = tray_event.unwrap_or("main_window".into());
log::debug!(target: "app","tray event: {:?}", tray_event);
if let TrayIconEvent::Click {
button: MouseButton::Left,
button_state: MouseButtonState::Down,
..
} = event
{
match tray_event.as_str() {
"system_proxy" => feat::toggle_system_proxy(),
"tun_mode" => feat::toggle_tun_mode(None),
"main_window" => {
if crate::module::lightweight::is_in_lightweight_mode() {
crate::module::lightweight::exit_lightweight_mode();
}
let _ = resolve::create_window(true);
}
_ => {}
}
}
});
tray.on_menu_event(on_menu_event);
log::info!(target: "app", "系统托盘创建成功");
Ok(())
}
}
fn create_tray_menu(
@@ -543,7 +598,10 @@ fn create_tray_menu(
is_lightweight_mode: bool,
) -> Result<tauri::menu::Menu<Wry>> {
let mode = mode.unwrap_or("");
let version = VERSION.get().unwrap();
let unknown_version = String::from("unknown");
let version = VERSION.get().unwrap_or(&unknown_version);
let hotkeys = Config::verge()
.latest()
.hotkeys
@@ -779,14 +837,20 @@ fn on_menu_event(_: &AppHandle, event: MenuEvent) {
crate::module::lightweight::exit_lightweight_mode();
}
// 然后创建窗口
resolve::create_window(true)
let _ = resolve::create_window(true);
}
"system_proxy" => feat::toggle_system_proxy(),
"tun_mode" => feat::toggle_tun_mode(None),
"copy_env" => feat::copy_clash_env(),
"open_app_dir" => crate::logging_error!(Type::Cmd, true, cmd::open_app_dir()),
"open_core_dir" => crate::logging_error!(Type::Cmd, true, cmd::open_core_dir()),
"open_logs_dir" => crate::logging_error!(Type::Cmd, true, cmd::open_logs_dir()),
"open_app_dir" => {
let _ = cmd::open_app_dir();
}
"open_core_dir" => {
let _ = cmd::open_core_dir();
}
"open_logs_dir" => {
let _ = cmd::open_logs_dir();
}
"restart_clash" => feat::restart_clash_core(),
"restart_app" => feat::restart_app(),
"entry_lightweight_mode" => entry_lightweight_mode(),

View File

@@ -86,23 +86,30 @@ impl AppHandleManager {
#[allow(clippy::panic)]
pub fn run() {
// 初始化网络管理器
utils::network::NetworkManager::global().init();
// 单例检测 - 使用超时机制防止阻塞
let _ = utils::dirs::init_portable_flag();
// 单例检测
let app_exists: bool = AsyncHandler::block_on(move || async move {
logging!(info, Type::Setup, true, "开始检查单例实例...");
match timeout(Duration::from_secs(3), server::check_singleton()).await {
Ok(result) => {
if result.is_err() {
println!("app exists");
logging!(info, Type::Setup, true, "检测到已有应用实例运行");
true
} else {
logging!(info, Type::Setup, true, "未检测到其他应用实例");
false
}
}
Err(_) => {
// 超时处理
println!("singleton check timeout, assuming app doesn't exist");
logging!(
warn,
Type::Setup,
true,
"单例检查超时,假定没有其他实例运行"
);
false
}
}
@@ -136,9 +143,11 @@ pub fn run() {
.build(),
)
.setup(|app| {
logging!(info, Type::Setup, true, "开始应用初始化...");
#[cfg(any(target_os = "linux", all(debug_assertions, windows)))]
{
use tauri_plugin_deep_link::DeepLinkExt;
logging!(info, Type::Setup, true, "注册深层链接...");
logging_error!(Type::System, true, app.deep_link().register_all());
}
app.deep_link().on_open_url(|event| {
@@ -152,23 +161,49 @@ pub fn run() {
});
});
// 使用 block_on 但增加超时保护
AsyncHandler::block_on(|| async {
match timeout(Duration::from_secs(30), resolve::resolve_setup(app)).await {
// 异步处理
let app_handle = app.handle().clone();
AsyncHandler::spawn(move || async move {
logging!(info, Type::Setup, true, "异步执行应用设置...");
match timeout(
Duration::from_secs(30),
resolve::resolve_setup_async(&app_handle),
)
.await
{
Ok(_) => {
logging!(info, Type::Setup, true, "App setup completed successfully");
logging!(info, Type::Setup, true, "应用设置成功完成");
}
Err(_) => {
logging!(
error,
Type::Setup,
true,
"App setup timed out, proceeding anyway"
"应用设置超时(30秒),继续执行后续流程"
);
}
}
});
logging!(info, Type::Setup, true, "执行主要设置操作...");
logging!(info, Type::Setup, true, "初始化AppHandleManager...");
AppHandleManager::global().init(app.handle().clone());
logging!(info, Type::Setup, true, "初始化核心句柄...");
core::handle::Handle::global().init(app.handle());
logging!(info, Type::Setup, true, "初始化配置...");
if let Err(e) = utils::init::init_config() {
logging!(error, Type::Setup, true, "初始化配置失败: {}", e);
}
logging!(info, Type::Setup, true, "初始化资源...");
if let Err(e) = utils::init::init_resources() {
logging!(error, Type::Setup, true, "初始化资源失败: {}", e);
}
logging!(info, Type::Setup, true, "初始化完成,继续执行");
Ok(())
})
.invoke_handler(tauri::generate_handler![
@@ -184,8 +219,9 @@ pub fn run() {
cmd::get_system_hostname,
cmd::restart_core,
cmd::restart_app,
// 添加新的命令
// 启动命令
cmd::notify_ui_ready,
cmd::update_ui_stage,
cmd::reset_ui_ready_state,
cmd::get_running_mode,
cmd::get_app_uptime,
@@ -279,6 +315,7 @@ pub fn run() {
app.run(|app_handle, e| match e {
tauri::RunEvent::Ready | tauri::RunEvent::Resumed => {
logging!(info, Type::System, true, "应用就绪或恢复");
AppHandleManager::global().init(app_handle.clone());
#[cfg(target_os = "macos")]
{
@@ -286,6 +323,7 @@ pub fn run() {
.get_handle()
.get_webview_window("main")
{
logging!(info, Type::Window, true, "设置macOS窗口标题");
let _ = window.set_title("Clash Verge");
}
}
@@ -323,8 +361,11 @@ pub fn run() {
}
println!("closing window...");
api.prevent_close();
let window = core::handle::Handle::global().get_window().unwrap();
if let Some(window) = core::handle::Handle::global().get_window() {
let _ = window.hide();
} else {
logging!(warn, Type::Window, true, "尝试隐藏窗口但窗口不存在");
}
}
tauri::WindowEvent::Focused(true) => {
#[cfg(target_os = "macos")]

View File

@@ -16,8 +16,6 @@ use std::{
};
use tauri::{Listener, Manager};
pub static AUTO_LIGHT_WEIGHT_MODE_INIT: OnceCell<()> = OnceCell::new();
const LIGHT_WEIGHT_TASK_UID: &str = "light_weight_task";
// 轻量模式状态标志
@@ -217,19 +215,3 @@ fn cancel_light_weight_timer() -> Result<()> {
Ok(())
}
pub fn run_once_auto_lightweight() {
AUTO_LIGHT_WEIGHT_MODE_INIT.get_or_init(|| {
let is_silent_start = { Config::verge().data().enable_silent_start }.unwrap_or(false);
let enable_auto = { Config::verge().data().enable_auto_light_weight_mode }.unwrap_or(false);
if enable_auto && is_silent_start {
logging!(
info,
Type::Lightweight,
true,
"Add timer listener when creating window in silent start mode"
);
enable_auto_light_weight_mode();
}
});
}

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@@ -49,7 +49,55 @@ pub fn app_home_dir() -> Result<PathBuf> {
.ok_or(anyhow::anyhow!("failed to get the portable app dir"))?;
return Ok(PathBuf::from(app_dir).join(".config").join(APP_ID));
}
let app_handle = handle::Handle::global().app_handle().unwrap();
// 避免在Handle未初始化时崩溃
let app_handle = match handle::Handle::global().app_handle() {
Some(handle) => handle,
None => {
log::warn!(target: "app", "app_handle not initialized, using default path");
// 使用可执行文件目录作为备用
let exe_path = tauri::utils::platform::current_exe()?;
let exe_dir = exe_path
.parent()
.ok_or(anyhow::anyhow!("failed to get executable directory"))?;
// 使用系统临时目录 + 应用ID
#[cfg(target_os = "windows")]
{
if let Some(local_app_data) = std::env::var_os("LOCALAPPDATA") {
let path = PathBuf::from(local_app_data).join(APP_ID);
return Ok(path);
}
}
#[cfg(target_os = "macos")]
{
if let Some(home) = std::env::var_os("HOME") {
let path = PathBuf::from(home)
.join("Library")
.join("Application Support")
.join(APP_ID);
return Ok(path);
}
}
#[cfg(target_os = "linux")]
{
if let Some(home) = std::env::var_os("HOME") {
let path = PathBuf::from(home)
.join(".local")
.join("share")
.join(APP_ID);
return Ok(path);
}
}
// 如果无法获取系统目录,则回退到可执行文件目录
let fallback_dir = PathBuf::from(exe_dir).join(".config").join(APP_ID);
log::warn!(target: "app", "Using fallback data directory: {:?}", fallback_dir);
return Ok(fallback_dir);
}
};
match app_handle.path().data_dir() {
Ok(dir) => Ok(dir.join(APP_ID)),
@@ -62,7 +110,20 @@ pub fn app_home_dir() -> Result<PathBuf> {
/// get the resources dir
pub fn app_resources_dir() -> Result<PathBuf> {
let app_handle = handle::Handle::global().app_handle().unwrap();
// 避免在Handle未初始化时崩溃
let app_handle = match handle::Handle::global().app_handle() {
Some(handle) => handle,
None => {
log::warn!(target: "app", "app_handle not initialized in app_resources_dir, using fallback");
// 使用可执行文件目录作为备用
let exe_dir = tauri::utils::platform::current_exe()?
.parent()
.ok_or(anyhow::anyhow!("failed to get executable directory"))?
.to_path_buf();
return Ok(exe_dir.join("resources"));
}
};
match app_handle.path().resource_dir() {
Ok(dir) => Ok(dir.join("resources")),
Err(e) => {
@@ -126,12 +187,14 @@ pub fn profiles_path() -> Result<PathBuf> {
#[cfg(target_os = "macos")]
pub fn service_path() -> Result<PathBuf> {
Ok(app_resources_dir()?.join("clash-verge-service"))
let res_dir = app_resources_dir()?;
Ok(res_dir.join("clash-verge-service"))
}
#[cfg(windows)]
pub fn service_path() -> Result<PathBuf> {
Ok(app_resources_dir()?.join("clash-verge-service.exe"))
let res_dir = app_resources_dir()?;
Ok(res_dir.join("clash-verge-service.exe"))
}
pub fn service_log_file() -> Result<PathBuf> {

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@@ -1,40 +0,0 @@
use crate::log_err;
use anyhow;
use std::{
backtrace::{Backtrace, BacktraceStatus},
thread,
};
pub fn redirect_panic_to_log() {
std::panic::set_hook(Box::new(move |panic_info| {
let thread = thread::current();
let thread_name = thread.name().unwrap_or("<unnamed>");
let payload = panic_info.payload();
let payload = if let Some(s) = payload.downcast_ref::<&str>() {
&**s
} else if let Some(s) = payload.downcast_ref::<String>() {
s
} else {
&format!("{:?}", payload)
};
let location = panic_info
.location()
.map(|l| l.to_string())
.unwrap_or("unknown location".to_string());
let backtrace = Backtrace::capture();
let backtrace = if backtrace.status() == BacktraceStatus::Captured {
&format!("stack backtrace:\n{}", backtrace)
} else {
"note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace"
};
let err: Result<(), anyhow::Error> = Err(anyhow::anyhow!(format!(
"thread '{}' panicked at {}:\n{}\n{}",
thread_name, location, payload, backtrace
)));
log_err!(err);
}));
}

View File

@@ -1,6 +1,5 @@
pub mod autostart;
pub mod dirs;
pub mod error;
pub mod help;
pub mod i18n;
pub mod init;

View File

@@ -128,7 +128,7 @@ impl NetworkManager {
*error_count = 0;
}
}
/*
/// 获取或创建自代理客户端
fn get_or_create_self_proxy_client(&self) -> Client {
if self.should_reset_clients() {
@@ -239,7 +239,7 @@ impl NetworkManager {
ProxyType::SystemProxy => self.get_or_create_system_proxy_client(),
}
}
*/
/// 创建带有自定义选项的HTTP请求
pub fn create_request(
&self,
@@ -335,7 +335,7 @@ impl NetworkManager {
client.get(url)
}
/// 执行GET请求添加错误跟踪
/* /// 执行GET请求添加错误跟踪
pub async fn get(
&self,
url: &str,
@@ -370,7 +370,7 @@ impl NetworkManager {
))
}
}
}
} */
pub async fn get_with_interrupt(
&self,

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@@ -1,12 +1,10 @@
#[cfg(target_os = "macos")]
use crate::AppHandleManager;
use crate::{
config::{Config, IVerge, PrfItem},
core::*,
logging, logging_error,
module::lightweight,
process::AsyncHandler,
utils::{dirs, error, init, logging::Type, server},
utils::{init, logging::Type, server},
wrap_err,
};
use anyhow::{bail, Result};
@@ -14,14 +12,13 @@ use once_cell::sync::OnceCell;
use parking_lot::{Mutex, RwLock};
use percent_encoding::percent_decode_str;
use serde::{Deserialize, Serialize};
use serde_json;
use serde_yaml::Mapping;
use std::{
net::TcpListener,
sync::Arc,
time::{Duration, Instant},
};
use tauri::{App, Emitter, Manager};
use tauri::{AppHandle, Emitter, Manager};
use tauri::Url;
//#[cfg(not(target_os = "linux"))]
@@ -29,10 +26,6 @@ use tauri::Url;
pub static VERSION: OnceCell<String> = OnceCell::new();
// 窗口状态文件中的尺寸
static STATE_WIDTH: OnceCell<u32> = OnceCell::new();
static STATE_HEIGHT: OnceCell<u32> = OnceCell::new();
// 定义默认窗口尺寸常量
const DEFAULT_WIDTH: u32 = 900;
const DEFAULT_HEIGHT: u32 = 700;
@@ -43,6 +36,35 @@ static UI_READY: OnceCell<Arc<RwLock<bool>>> = OnceCell::new();
// 窗口创建锁,防止并发创建窗口
static WINDOW_CREATING: OnceCell<Mutex<(bool, Instant)>> = OnceCell::new();
// UI就绪阶段状态枚举
#[derive(Debug, Clone, Copy, PartialEq)]
pub enum UiReadyStage {
NotStarted,
Loading,
DomReady,
ResourcesLoaded,
Ready,
}
// UI就绪详细状态
#[derive(Debug)]
struct UiReadyState {
stage: RwLock<UiReadyStage>,
last_update: RwLock<Instant>,
}
impl Default for UiReadyState {
fn default() -> Self {
Self {
stage: RwLock::new(UiReadyStage::NotStarted),
last_update: RwLock::new(Instant::now()),
}
}
}
// 获取UI就绪状态细节
static UI_READY_STATE: OnceCell<Arc<UiReadyState>> = OnceCell::new();
// 定义窗口状态结构体
#[derive(Debug, Serialize, Deserialize)]
struct WindowState {
@@ -58,16 +80,54 @@ fn get_ui_ready() -> &'static Arc<RwLock<bool>> {
UI_READY.get_or_init(|| Arc::new(RwLock::new(false)))
}
fn get_ui_ready_state() -> &'static Arc<UiReadyState> {
UI_READY_STATE.get_or_init(|| Arc::new(UiReadyState::default()))
}
// 更新UI准备阶段
pub fn update_ui_ready_stage(stage: UiReadyStage) {
let state = get_ui_ready_state();
let mut stage_lock = state.stage.write();
let mut time_lock = state.last_update.write();
*stage_lock = stage;
*time_lock = Instant::now();
logging!(
info,
Type::Window,
true,
"UI准备阶段更新: {:?}, 耗时: {:?}ms",
stage,
time_lock.elapsed().as_millis()
);
// 如果是最终阶段标记UI完全就绪
if stage == UiReadyStage::Ready {
mark_ui_ready();
}
}
// 标记UI已准备就绪
pub fn mark_ui_ready() {
let mut ready = get_ui_ready().write();
*ready = true;
logging!(info, Type::Window, true, "UI已标记为完全就绪");
}
// 重置UI就绪状态
pub fn reset_ui_ready() {
{
let mut ready = get_ui_ready().write();
*ready = false;
}
{
let state = get_ui_ready_state();
let mut stage = state.stage.write();
let mut time = state.last_update.write();
*stage = UiReadyStage::NotStarted;
*time = Instant::now();
}
logging!(info, Type::Window, true, "UI就绪状态已重置");
}
@@ -88,54 +148,53 @@ pub fn find_unused_port() -> Result<u16> {
}
}
/// handle something when start app
pub async fn resolve_setup(app: &mut App) {
error::redirect_panic_to_log();
#[cfg(target_os = "macos")]
{
AppHandleManager::global().init(app.app_handle().clone());
AppHandleManager::global().set_activation_policy_accessory();
/// 异步方式处理启动后的额外任务
pub async fn resolve_setup_async(app_handle: &AppHandle) {
logging!(info, Type::Setup, true, "执行异步设置任务...");
if VERSION.get().is_none() {
let version = app_handle.package_info().version.to_string();
VERSION.get_or_init(|| {
logging!(info, Type::Setup, true, "初始化版本信息: {}", version);
version.clone()
});
}
let version = app.package_info().version.to_string();
handle::Handle::global().init(app.app_handle());
VERSION.get_or_init(|| version.clone());
logging_error!(Type::Config, true, init::init_config());
logging_error!(Type::Setup, true, init::init_resources());
logging_error!(Type::Setup, true, init::init_scheme());
logging_error!(Type::Setup, true, init::startup_script().await);
// 诊断服务状态
/* logging!(info, Type::Service, true, "执行服务状态诊断");
{
match crate::core::service::diagnose_service().await {
Ok(_) => {
logging!(info, Type::Service, true, "服务诊断完成");
},
Err(e) => {
logging!(error, Type::Service, true, "服务诊断出错: {}", e);
},
}
} */
// 处理随机端口
logging_error!(Type::System, true, resolve_random_port_config());
// 启动核心
logging!(trace, Type::Config, true, "Initial config");
logging!(trace, Type::Config, true, "初始化配置...");
logging_error!(Type::Config, true, Config::init_config().await);
logging!(trace, Type::Core, "Starting CoreManager");
logging!(trace, Type::Core, true, "启动核心管理器...");
logging_error!(Type::Core, true, CoreManager::global().init().await);
// setup a simple http server for singleton
log::trace!(target: "app", "launch embed server");
log::trace!(target: "app", "启动内嵌服务器...");
server::embed_server();
log::trace!(target: "app", "Initial system tray");
logging_error!(Type::Tray, true, tray::Tray::global().init());
logging_error!(Type::Tray, true, tray::Tray::global().create_systray(app));
if let Some(app_handle) = handle::Handle::global().app_handle() {
logging!(info, Type::Tray, true, "创建系统托盘...");
let result = tray::Tray::global().create_tray_from_handle(&app_handle);
if result.is_ok() {
logging!(info, Type::Tray, true, "系统托盘创建成功");
} else if let Err(e) = result {
logging!(error, Type::Tray, true, "系统托盘创建失败: {}", e);
}
} else {
logging!(
error,
Type::Tray,
true,
"无法创建系统托盘: app_handle不存在"
);
}
// 更新系统代理
logging_error!(
Type::System,
true,
@@ -147,11 +206,14 @@ pub async fn resolve_setup(app: &mut App) {
sysopt::Sysopt::global().init_guard_sysproxy()
);
// 创建窗口
let is_silent_start = { Config::verge().data().enable_silent_start }.unwrap_or(false);
create_window(!is_silent_start);
// 初始化定时器
logging_error!(Type::System, true, timer::Timer::global().init());
// 自动进入轻量模式
let enable_auto_light_weight_mode =
{ Config::verge().data().enable_auto_light_weight_mode }.unwrap_or(false);
if enable_auto_light_weight_mode && !is_silent_start {
@@ -160,12 +222,13 @@ pub async fn resolve_setup(app: &mut App) {
logging_error!(Type::Tray, true, tray::Tray::global().update_part());
// 初始化热键
logging!(trace, Type::System, true, "Initial hotkeys");
logging!(trace, Type::System, true, "初始化热键...");
logging_error!(Type::System, true, hotkey::Hotkey::global().init());
logging!(info, Type::Setup, true, "异步设置任务完成");
}
/// reset system proxy (异步)
/// reset system proxy (异步)
pub async fn resolve_reset_async() {
#[cfg(target_os = "macos")]
logging!(info, Type::Tray, true, "Unsubscribing from traffic updates");
@@ -185,293 +248,105 @@ pub async fn resolve_reset_async() {
}
}
/// 窗口创建锁守卫
struct WindowCreateGuard;
impl Drop for WindowCreateGuard {
fn drop(&mut self) {
let mut lock = get_window_creating_lock().lock();
lock.0 = false;
logging!(info, Type::Window, true, "窗口创建过程已完成,释放锁");
}
}
/// create main window
pub fn create_window(is_showup: bool) {
// 尝试获取窗口创建锁
let mut creating_lock = get_window_creating_lock().lock();
let (is_creating, last_create_time) = *creating_lock;
let now = Instant::now();
// 检查是否有其他线程正在创建窗口,防止短时间内多次创建窗口导致竞态条件
if is_creating && now.duration_since(last_create_time) < Duration::from_secs(2) {
logging!(
warn,
Type::Window,
true,
"另一个窗口创建过程正在进行中,跳过本次创建请求"
);
return;
}
*creating_lock = (true, now);
drop(creating_lock);
// 创建窗口锁守卫结束时自动释放锁
let _guard = WindowCreateGuard;
// 打印 .window-state.json 文件路径
let window_state_file = dirs::app_home_dir()
.ok()
.map(|dir| dir.join(".window-state.json"));
/// Create the main window
pub fn create_window(is_show: bool) -> bool {
logging!(
info,
Type::Window,
true,
"窗口状态文件路径: {:?}",
window_state_file
"开始创建主窗口, is_show={}",
is_show
);
// 从文件加载窗口状态
if let Some(window_state_file_path) = window_state_file {
if window_state_file_path.exists() {
match std::fs::read_to_string(&window_state_file_path) {
Ok(content) => {
logging!(
debug,
Type::Window,
true,
"读取窗口状态文件内容成功: {} 字节",
content.len()
);
let creating_lock = get_window_creating_lock();
let mut creating = creating_lock.lock();
match serde_json::from_str::<WindowState>(&content) {
Ok(window_state) => {
let (is_creating, last_time) = *creating;
let elapsed = last_time.elapsed();
if is_creating && elapsed < Duration::from_secs(2) {
logging!(
info,
Type::Window,
true,
"成功解析窗口状态: width={:?}, height={:?}",
window_state.width,
window_state.height
"窗口创建请求被忽略,因为最近创建过 ({:?}ms)",
elapsed.as_millis()
);
// 存储窗口状态以供后续使用
if let Some(width) = window_state.width {
STATE_WIDTH.set(width).ok();
}
if let Some(height) = window_state.height {
STATE_HEIGHT.set(height).ok();
}
}
Err(e) => {
logging!(error, Type::Window, true, "解析窗口状态文件失败: {:?}", e);
}
}
}
Err(e) => {
logging!(error, Type::Window, true, "读取窗口状态文件失败: {:?}", e);
}
}
} else {
logging!(
info,
Type::Window,
true,
"窗口状态文件不存在,将使用默认设置"
);
}
return false;
}
if !is_showup {
logging!(info, Type::Window, "Not to display create window");
return;
}
*creating = (true, Instant::now());
logging!(info, Type::Window, true, "Creating window");
let app_handle = handle::Handle::global().app_handle().unwrap();
#[cfg(target_os = "macos")]
AppHandleManager::global().set_activation_policy_regular();
// 检查是否从轻量模式恢复
let from_lightweight = crate::module::lightweight::is_in_lightweight_mode();
if from_lightweight {
logging!(info, Type::Window, true, "从轻量模式恢复窗口");
crate::module::lightweight::exit_lightweight_mode();
}
if let Some(window) = handle::Handle::global().get_window() {
logging!(info, Type::Window, true, "Found existing window");
if window.is_minimized().unwrap_or(false) {
let _ = window.unminimize();
}
if from_lightweight {
// 从轻量模式恢复需要销毁旧窗口以重建
logging!(info, Type::Window, true, "销毁旧窗口以重建新窗口");
let _ = window.close();
// 添加短暂延迟确保窗口正确关闭
std::thread::sleep(std::time::Duration::from_millis(100));
} else {
// 普通情况直接显示窗口
let _ = window.show();
let _ = window.set_focus();
return;
}
}
let width = STATE_WIDTH.get().copied().unwrap_or(DEFAULT_WIDTH);
let height = STATE_HEIGHT.get().copied().unwrap_or(DEFAULT_HEIGHT);
logging!(
info,
Type::Window,
true,
"Initializing new window with size: {}x{}",
width,
height
);
// 根据不同平台创建不同配置的窗口
#[cfg(target_os = "macos")]
let win_builder = {
// 基本配置
let builder = tauri::WebviewWindowBuilder::new(
&app_handle,
"main",
match tauri::WebviewWindowBuilder::new(
&handle::Handle::global().app_handle().unwrap(),
"main", /* the unique window label */
tauri::WebviewUrl::App("index.html".into()),
)
.title("Clash Verge")
.center()
.decorations(true)
.hidden_title(true) // 隐藏标题文本
.fullscreen(false)
.inner_size(width as f64, height as f64)
.min_inner_size(520.0, 520.0)
.visible(false);
// 尝试设置标题栏样式
// 注意根据Tauri版本不同此API可能有变化
// 如果编译出错,请注释掉下面这行
let builder = builder.title_bar_style(tauri::TitleBarStyle::Overlay);
builder
};
#[cfg(not(target_os = "macos"))]
let win_builder = tauri::WebviewWindowBuilder::new(
&app_handle,
"main",
tauri::WebviewUrl::App("index.html".into()),
)
.title("Clash Verge")
.center()
.fullscreen(false)
.inner_size(width as f64, height as f64)
.inner_size(DEFAULT_WIDTH as f64, DEFAULT_HEIGHT as f64)
.min_inner_size(520.0, 520.0)
.visible(false)
.decorations(false);
.build()
{
Ok(_) => {
logging!(info, Type::Window, true, "主窗口创建成功");
let window = win_builder.build();
*creating = (false, Instant::now());
match window {
Ok(window) => {
logging!(info, Type::Window, true, "Window created successfully");
// 静默启动模式等窗口初始化再启动自动进入轻量模式的计时监听器,防止初始化的时候找不到窗口对象导致监听器挂载失败
lightweight::run_once_auto_lightweight();
// 标记前端UI已准备就绪向前端发送启动完成事件
let app_handle_clone = app_handle.clone();
// 获取窗口创建后的初始大小
if let Ok(size) = window.inner_size() {
let state_width = STATE_WIDTH.get().copied().unwrap_or(DEFAULT_WIDTH);
let state_height = STATE_HEIGHT.get().copied().unwrap_or(DEFAULT_HEIGHT);
// 输出所有尺寸信息
logging!(
info,
Type::Window,
true,
"API报告的窗口尺寸: {}x{}, 状态文件尺寸: {}x{}, 默认尺寸: {}x{}",
size.width,
size.height,
state_width,
state_height,
DEFAULT_WIDTH,
DEFAULT_HEIGHT
);
// 优化窗口大小设置
if size.width < state_width || size.height < state_height {
logging!(
info,
Type::Window,
true,
"强制设置窗口尺寸: {}x{}",
state_width,
state_height
);
// 尝试不同的方式设置窗口大小
let _ = window.set_size(tauri::PhysicalSize {
width: state_width,
height: state_height,
});
// 关键:等待短暂时间让窗口尺寸生效
std::thread::sleep(std::time::Duration::from_millis(50));
// 再次检查窗口尺寸
if let Ok(new_size) = window.inner_size() {
logging!(
info,
Type::Window,
true,
"设置后API报告的窗口尺寸: {}x{}",
new_size.width,
new_size.height
);
}
}
}
// 标记此窗口是否从轻量模式恢复
let was_from_lightweight = from_lightweight;
update_ui_ready_stage(UiReadyStage::NotStarted);
AsyncHandler::spawn(move || async move {
// 处理启动完成
handle::Handle::global().mark_startup_completed();
logging!(info, Type::Window, true, "标记启动完成");
if let Some(window) = app_handle_clone.get_webview_window("main") {
// 发送启动完成事件
if let Some(app_handle) = handle::Handle::global().app_handle() {
if let Some(window) = app_handle.get_webview_window("main") {
let _ = window.emit("verge://startup-completed", ());
logging!(info, Type::Window, true, "已发送启动完成事件");
if is_showup {
if is_show {
let window_clone = window.clone();
// 从轻量模式恢复时使用较短的超时,避免卡死
let timeout_seconds = if was_from_lightweight {
// 从轻量模式恢复只等待2秒确保不会卡死
let timeout_seconds =
if crate::module::lightweight::is_in_lightweight_mode() {
2
} else {
5
};
// 使用普通的等待方式替代事件监听,简化实现
logging!(
info,
Type::Window,
true,
"等待UI就绪最多{}秒",
timeout_seconds
);
let wait_result =
tokio::time::timeout(Duration::from_secs(timeout_seconds), async {
let mut check_count = 0;
while !*get_ui_ready().read() {
check_count += 1;
if check_count % 10 == 0 {
let state = get_ui_ready_state();
let stage = *state.stage.read();
logging!(
info,
Type::Window,
true,
"等待UI就绪中... 当前阶段: {:?}, 已等待: {}ms",
stage,
check_count * 100
);
}
tokio::time::sleep(Duration::from_millis(100)).await;
}
})
.await;
// 根据结果处理
match wait_result {
Ok(_) => {
logging!(info, Type::Window, true, "UI就绪显示窗口");
@@ -484,22 +359,24 @@ pub fn create_window(is_showup: bool) {
"等待UI就绪超时({}秒),强制显示窗口",
timeout_seconds
);
// 强制设置UI就绪状态
*get_ui_ready().write() = true;
}
}
// 显示窗口
let _ = window_clone.show();
let _ = window_clone.set_focus();
logging!(info, Type::Window, true, "窗口创建和显示流程已完成");
}
}
}
});
true
}
Err(e) => {
logging!(error, Type::Window, true, "Failed to create window: {}", e);
false
}
}
}
@@ -529,7 +406,6 @@ pub async fn resolve_scheme(param: String) -> Result<()> {
.find(|(key, _)| key == "name")
.map(|(_, value)| value.into_owned());
// 通过直接获取查询部分并解析特定参数来避免 URL 转义问题
let url_param = if let Some(query) = link_parsed.query() {
let prefix = "url=";
if let Some(pos) = query.find(prefix) {

View File

@@ -165,7 +165,6 @@ const Layout = () => {
useEffect(() => {
if (clashInfo) {
const { server = "", secret = "" } = clashInfo;
// 使用本地存储中的enableLog值初始化全局日志服务
initGlobalLogService(server, secret, enableLog, "info");
}
}, [clashInfo, enableLog]);
@@ -173,7 +172,6 @@ const Layout = () => {
// 设置监听器
useEffect(() => {
const listeners = [
// 配置更新监听
addListener("verge://refresh-clash-config", async () => {
await getAxios(true);
mutate("getProxies");
@@ -182,21 +180,17 @@ const Layout = () => {
mutate("getProxyProviders");
}),
// verge 配置更新监听
addListener("verge://refresh-verge-config", () => {
mutate("getVergeConfig");
// 添加对系统代理状态的刷新
mutate("getSystemProxy");
mutate("getAutotemProxy");
}),
// 通知消息监听
addListener("verge://notice-message", ({ payload }) =>
handleNotice(payload as [string, string]),
),
];
// 设置窗口显示/隐藏监听
const setupWindowListeners = async () => {
const [hideUnlisten, showUnlisten] = await Promise.all([
listen("verge://hide-window", () => appWindow.hide()),
@@ -209,29 +203,51 @@ const Layout = () => {
};
};
// 初始化
setupCloseListener();
const cleanupWindow = setupWindowListeners();
// 清理函数
return () => {
// 清理主要监听器
listeners.forEach((listener) => {
if (typeof listener.then === "function") {
listener.then((unlisten) => unlisten());
}
});
// 清理窗口监听器
cleanupWindow.then((cleanup) => cleanup());
};
}, [handleNotice]);
// 监听启动完成事件并通知UI已加载
useEffect(() => {
const notifyUiStage = async (stage: string) => {
try {
console.log(`UI加载阶段: ${stage}`);
await invoke("update_ui_stage", { stage });
} catch (err) {
console.error(`通知UI加载阶段(${stage})失败:`, err);
}
};
const notifyUiCoreReady = async () => {
try {
console.log("核心组件已加载,通知后端");
await invoke("update_ui_stage", { stage: "DomReady" });
} catch (err) {
console.error("通知核心组件加载完成失败:", err);
}
};
const notifyUiResourcesLoaded = async () => {
try {
console.log("所有资源已加载,通知后端");
await invoke("update_ui_stage", { stage: "ResourcesLoaded" });
} catch (err) {
console.error("通知资源加载完成失败:", err);
}
};
const notifyUiReady = async () => {
try {
console.log("UI完全准备就绪通知后端");
await invoke("notify_ui_ready");
console.log("已通知后端UI准备就绪");
} catch (err) {
console.error("通知UI准备就绪失败:", err);
}
@@ -240,6 +256,7 @@ const Layout = () => {
// 监听后端发送的启动完成事件
const listenStartupCompleted = async () => {
try {
console.log("开始监听启动完成事件");
const unlisten = await listen("verge://startup-completed", () => {
console.log("收到启动完成事件开始通知UI就绪");
notifyUiReady();
@@ -251,9 +268,21 @@ const Layout = () => {
}
};
// 初始加载时也通知一次
console.log("页面初始加载通知UI就绪");
// 初始阶段 - 开始加载
notifyUiStage("Loading");
setTimeout(() => {
notifyUiCoreReady();
setTimeout(() => {
notifyUiResourcesLoaded();
setTimeout(() => {
notifyUiReady();
}, 100);
}, 100);
}, 100);
// 启动监听器
const unlistenPromise = listenStartupCompleted();
return () => {

View File

@@ -106,7 +106,7 @@ endef
define Build/append-squashfs-fakeroot-be
rm -rf $@.fakefs $@.fakesquashfs
mkdir $@.fakefs
$(STAGING_DIR_HOST)/bin/mksquashfs-lzma \
$(STAGING_DIR_HOST)/bin/mksquashfs3-lzma \
$@.fakefs $@.fakesquashfs \
-noappend -root-owned -be -nopad -b 65536 \
$(if $(SOURCE_DATE_EPOCH),-fixed-time $(SOURCE_DATE_EPOCH))

View File

@@ -1,2 +1,2 @@
LINUX_VERSION-5.15 = .181
LINUX_KERNEL_HASH-5.15.181 = 3346436d9efae810195b40922c6b73001d1a4dd7e5eeb5a7e8ed85e63960da38
LINUX_VERSION-5.15 = .182
LINUX_KERNEL_HASH-5.15.182 = b6abfa53315a04e459070b927c58beb41f085433117d58756504d68b67f6a31e

View File

@@ -1,2 +1,2 @@
LINUX_VERSION-6.1 = .137
LINUX_KERNEL_HASH-6.1.137 = 59ac8fce0c12706b225eda7c838c41f4637d4fd3317b90a2b9d266b4a8711041
LINUX_VERSION-6.1 = .138
LINUX_KERNEL_HASH-6.1.138 = e319a5bb9049ba9fb8cbc08cba4874716e8985bd10f7971f2573ea802c257911

View File

@@ -1,2 +1,2 @@
LINUX_VERSION-6.12 = .27
LINUX_KERNEL_HASH-6.12.27 = 8f4655a4cc7f93d72f515bbca54756de26ddaf5949790da6a17f766e3c33dc79
LINUX_VERSION-6.12 = .28
LINUX_KERNEL_HASH-6.12.28 = e8a099182562aecff781de72ce769461e706d97af42d740dff20eb450dd5771e

View File

@@ -1,2 +1,2 @@
LINUX_VERSION-6.6 = .89
LINUX_KERNEL_HASH-6.6.89 = c21af7d36068e4ac0704c242eac8459212e6bf4a5d09df941b9b4d17dc1eba00
LINUX_VERSION-6.6 = .90
LINUX_KERNEL_HASH-6.6.90 = ff856748671629c1fefef219099e0b4b81131c2d325e768cb0806e204157014e

View File

@@ -1439,11 +1439,11 @@ $(eval $(call KernelPackage,usb-net-rtl8150))
define KernelPackage/usb-net-rtl8152
TITLE:=Kernel module for USB-to-Ethernet Realtek convertors
DEPENDS:=+r8152-firmware +kmod-crypto-sha256 +kmod-mii
DEPENDS:=+r8152-firmware +kmod-crypto-sha256 +kmod-mii +kmod-usb-net-cdc-ncm
KCONFIG:=CONFIG_USB_RTL8152
FILES:=$(LINUX_DIR)/drivers/$(USBNET_DIR)/r8152.ko
AUTOLOAD:=$(call AutoProbe,r8152)
$(call AddDepends/usb, +LINUX_5_10:kmod-crypto-hash)
$(call AddDepends/usb-net, +LINUX_5_10:kmod-crypto-hash)
endef
define KernelPackage/usb-net-rtl8152/description

View File

@@ -8,15 +8,16 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=iw
PKG_VERSION:=5.19
PKG_RELEASE:=1
PKG_VERSION:=6.9
PKG_RELEASE:=4
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@KERNEL/software/network/iw
PKG_HASH:=f167bbe947dd53bb9ebc0c1dcef5db6ad73ac1d6084f2c6f9376c5c360cc4d4e
PKG_HASH:=3f2db22ad41c675242b98ae3942dbf3112548c60a42ff739210f2de4e98e4894
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=GPL-2.0
PKG_CPE_ID:=cpe:/a:kernel:iw
PKG_BUILD_FLAGS:=gc-sections lto

View File

@@ -1,259 +1,98 @@
--- a/nl80211.h
+++ b/nl80211.h
@@ -324,6 +324,17 @@
*/
/**
+ * DOC: Multi-Link Operation
@@ -2061,6 +2061,10 @@ enum nl80211_commands {
* @NL80211_ATTR_INTERFACE_COMBINATIONS: Nested attribute listing the supported
* interface combinations. In each nested item, it contains attributes
* defined in &enum nl80211_if_combination_attrs.
+ * If the wiphy uses multiple radios (@NL80211_ATTR_WIPHY_RADIOS is set),
+ * this attribute contains the interface combinations of the first radio.
+ * See @NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS for the global wiphy
+ * combinations for the sum of all radios.
* @NL80211_ATTR_SOFTWARE_IFTYPES: Nested attribute (just like
* %NL80211_ATTR_SUPPORTED_IFTYPES) containing the interface types that
* are managed in software: interfaces of these types aren't subject to
@@ -2856,6 +2860,17 @@ enum nl80211_commands {
* %NL80211_CMD_ASSOCIATE indicating the SPP A-MSDUs
* are used on this connection
*
+ * @NL80211_ATTR_WIPHY_RADIOS: Nested attribute describing physical radios
+ * belonging to this wiphy. See &enum nl80211_wiphy_radio_attrs.
+ *
+ * In Multi-Link Operation, a connection between to MLDs utilizes multiple
+ * links. To use this in nl80211, various commands and responses now need
+ * to or will include the new %NL80211_ATTR_MLO_LINKS attribute.
+ * Additionally, various commands that need to operate on a specific link
+ * now need to be given the %NL80211_ATTR_MLO_LINK_ID attribute, e.g. to
+ * use %NL80211_CMD_START_AP or similar functions.
+ */
+
+/**
* enum nl80211_commands - supported nl80211 commands
*
* @NL80211_CMD_UNSPEC: unspecified command to catch errors
@@ -366,14 +377,22 @@
* the non-transmitting interfaces are deleted as well.
*
* @NL80211_CMD_GET_KEY: Get sequence counter information for a key specified
- * by %NL80211_ATTR_KEY_IDX and/or %NL80211_ATTR_MAC.
+ * by %NL80211_ATTR_KEY_IDX and/or %NL80211_ATTR_MAC. %NL80211_ATTR_MAC
+ * represents peer's MLD address for MLO pairwise key. For MLO group key,
+ * the link is identified by %NL80211_ATTR_MLO_LINK_ID.
* @NL80211_CMD_SET_KEY: Set key attributes %NL80211_ATTR_KEY_DEFAULT,
* %NL80211_ATTR_KEY_DEFAULT_MGMT, or %NL80211_ATTR_KEY_THRESHOLD.
+ * For MLO connection, the link to set default key is identified by
+ * %NL80211_ATTR_MLO_LINK_ID.
* @NL80211_CMD_NEW_KEY: add a key with given %NL80211_ATTR_KEY_DATA,
* %NL80211_ATTR_KEY_IDX, %NL80211_ATTR_MAC, %NL80211_ATTR_KEY_CIPHER,
- * and %NL80211_ATTR_KEY_SEQ attributes.
+ * and %NL80211_ATTR_KEY_SEQ attributes. %NL80211_ATTR_MAC represents
+ * peer's MLD address for MLO pairwise key. The link to add MLO
+ * group key is identified by %NL80211_ATTR_MLO_LINK_ID.
* @NL80211_CMD_DEL_KEY: delete a key identified by %NL80211_ATTR_KEY_IDX
- * or %NL80211_ATTR_MAC.
+ * or %NL80211_ATTR_MAC. %NL80211_ATTR_MAC represents peer's MLD address
+ * for MLO pairwise key. The link to delete group key is identified by
+ * %NL80211_ATTR_MLO_LINK_ID.
*
* @NL80211_CMD_GET_BEACON: (not used)
* @NL80211_CMD_SET_BEACON: change the beacon on an access point interface
@@ -753,6 +772,13 @@
* %NL80211_ATTR_CSA_C_OFFSETS_TX is an array of offsets to CSA
* counters which will be updated to the current value. This attribute
* is used during CSA period.
+ * For TX on an MLD, the frequency can be omitted and the link ID be
+ * specified, or if transmitting to a known peer MLD (with MLD addresses
+ * in the frame) both can be omitted and the link will be selected by
+ * lower layers.
+ * For RX notification, %NL80211_ATTR_RX_HW_TIMESTAMP may be included to
+ * indicate the frame RX timestamp and %NL80211_ATTR_TX_HW_TIMESTAMP may
+ * be included to indicate the ack TX timestamp.
* @NL80211_CMD_FRAME_WAIT_CANCEL: When an off-channel TX was requested, this
* command may be used with the corresponding cookie to cancel the wait
* time if it is known that it is no longer necessary. This command is
@@ -763,7 +789,9 @@
* transmitted with %NL80211_CMD_FRAME. %NL80211_ATTR_COOKIE identifies
* the TX command and %NL80211_ATTR_FRAME includes the contents of the
* frame. %NL80211_ATTR_ACK flag is included if the recipient acknowledged
- * the frame.
+ * the frame. %NL80211_ATTR_TX_HW_TIMESTAMP may be included to indicate the
+ * tx timestamp and %NL80211_ATTR_RX_HW_TIMESTAMP may be included to
+ * indicate the ack RX timestamp.
* @NL80211_CMD_ACTION_TX_STATUS: Alias for @NL80211_CMD_FRAME_TX_STATUS for
* backward compatibility.
*
@@ -1108,6 +1136,12 @@
* has been received. %NL80211_ATTR_FRAME is used to specify the
* frame contents. The frame is the raw EAPoL data, without ethernet or
* 802.11 headers.
+ * For an MLD transmitter, the %NL80211_ATTR_MLO_LINK_ID may be given and
+ * its effect will depend on the destination: If the destination is known
+ * to be an MLD, this will be used as a hint to select the link to transmit
+ * the frame on. If the destination is not an MLD, this will select both
+ * the link to transmit on and the source address will be set to the link
+ * address of that link.
* When used as an event indication %NL80211_ATTR_CONTROL_PORT_ETHERTYPE,
* %NL80211_ATTR_CONTROL_PORT_NO_ENCRYPT and %NL80211_ATTR_MAC are added
* indicating the protocol type of the received frame; whether the frame
@@ -1237,6 +1271,16 @@
* to describe the BSSID address of the AP and %NL80211_ATTR_TIMEOUT to
* specify the timeout value.
*
+ * @NL80211_CMD_ADD_LINK: Add a new link to an interface. The
+ * %NL80211_ATTR_MLO_LINK_ID attribute is used for the new link.
+ * @NL80211_CMD_REMOVE_LINK: Remove a link from an interface. This may come
+ * without %NL80211_ATTR_MLO_LINK_ID as an easy way to remove all links
+ * in preparation for e.g. roaming to a regular (non-MLO) AP.
+ * @NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS: Nested attribute listing the
+ * supported interface combinations for all radios combined. In each
+ * nested item, it contains attributes defined in
+ * &enum nl80211_if_combination_attrs.
+ *
+ * @NL80211_CMD_ADD_LINK_STA: Add a link to an MLD station
+ * @NL80211_CMD_MODIFY_LINK_STA: Modify a link of an MLD station
+ * @NL80211_CMD_REMOVE_LINK_STA: Remove a link of an MLD station
+ *
* @NL80211_CMD_MAX: highest used command number
* @__NL80211_CMD_AFTER_LAST: internal use
*/
@@ -1481,6 +1525,13 @@ enum nl80211_commands {
NL80211_CMD_ASSOC_COMEBACK,
+ NL80211_CMD_ADD_LINK,
+ NL80211_CMD_REMOVE_LINK,
+
+ NL80211_CMD_ADD_LINK_STA,
+ NL80211_CMD_MODIFY_LINK_STA,
+ NL80211_CMD_REMOVE_LINK_STA,
+
/* add new commands above here */
/* used to define NL80211_CMD_MAX below */
@@ -2340,8 +2391,10 @@ enum nl80211_commands {
*
* @NL80211_ATTR_IFTYPE_EXT_CAPA: Nested attribute of the following attributes:
* %NL80211_ATTR_IFTYPE, %NL80211_ATTR_EXT_CAPA,
- * %NL80211_ATTR_EXT_CAPA_MASK, to specify the extended capabilities per
- * interface type.
+ * %NL80211_ATTR_EXT_CAPA_MASK, to specify the extended capabilities and
+ * other interface-type specific capabilities per interface type. For MLO,
+ * %NL80211_ATTR_EML_CAPABILITY and %NL80211_ATTR_MLD_CAPA_AND_OPS are
+ * present.
*
* @NL80211_ATTR_MU_MIMO_GROUP_DATA: array of 24 bytes that defines a MU-MIMO
* groupID for monitor mode.
@@ -2663,6 +2716,44 @@ enum nl80211_commands {
* association request when used with NL80211_CMD_NEW_STATION). Can be set
* only if %NL80211_STA_FLAG_WME is set.
*
+ * @NL80211_ATTR_MLO_LINK_ID: A (u8) link ID for use with MLO, to be used with
+ * various commands that need a link ID to operate.
+ * @NL80211_ATTR_MLO_LINKS: A nested array of links, each containing some
+ * per-link information and a link ID.
+ * @NL80211_ATTR_MLD_ADDR: An MLD address, used with various commands such as
+ * authenticate/associate.
+ *
+ * @NL80211_ATTR_MLO_SUPPORT: Flag attribute to indicate user space supports MLO
+ * connection. Used with %NL80211_CMD_CONNECT. If this attribute is not
+ * included in NL80211_CMD_CONNECT drivers must not perform MLO connection.
+ *
+ * @NL80211_ATTR_MAX_NUM_AKM_SUITES: U16 attribute. Indicates maximum number of
+ * AKM suites allowed for %NL80211_CMD_CONNECT, %NL80211_CMD_ASSOCIATE and
+ * %NL80211_CMD_START_AP in %NL80211_CMD_GET_WIPHY response. If this
+ * attribute is not present userspace shall consider maximum number of AKM
+ * suites allowed as %NL80211_MAX_NR_AKM_SUITES which is the legacy maximum
+ * number prior to the introduction of this attribute.
+ *
+ * @NL80211_ATTR_EML_CAPABILITY: EML Capability information (u16)
+ * @NL80211_ATTR_MLD_CAPA_AND_OPS: MLD Capabilities and Operations (u16)
+ *
+ * @NL80211_ATTR_TX_HW_TIMESTAMP: Hardware timestamp for TX operation in
+ * nanoseconds (u64). This is the device clock timestamp so it will
+ * probably reset when the device is stopped or the firmware is reset.
+ * When used with %NL80211_CMD_FRAME_TX_STATUS, indicates the frame TX
+ * timestamp. When used with %NL80211_CMD_FRAME RX notification, indicates
+ * the ack TX timestamp.
+ * @NL80211_ATTR_RX_HW_TIMESTAMP: Hardware timestamp for RX operation in
+ * nanoseconds (u64). This is the device clock timestamp so it will
+ * probably reset when the device is stopped or the firmware is reset.
+ * When used with %NL80211_CMD_FRAME_TX_STATUS, indicates the ack RX
+ * timestamp. When used with %NL80211_CMD_FRAME RX notification, indicates
+ * the incoming frame RX timestamp.
+ * @NL80211_ATTR_TD_BITMAP: Transition Disable bitmap, for subsequent
+ * (re)associations.
+ * @NL80211_ATTR_WIPHY_ANTENNA_GAIN: Configured antenna gain. Used to reduce
+ * transmit power to stay within regulatory limits. u32, dBi.
+ * @NL80211_ATTR_VIF_RADIO_MASK: Bitmask of allowed radios (u32).
+ * A value of 0 means all radios.
+ *
* @NUM_NL80211_ATTR: total number of nl80211_attrs available
* @NL80211_ATTR_MAX: highest attribute number currently defined
* @__NL80211_ATTR_AFTER_LAST: internal use
@@ -3177,6 +3268,23 @@ enum nl80211_attrs {
@@ -3401,6 +3416,11 @@ enum nl80211_attrs {
NL80211_ATTR_DISABLE_EHT,
NL80211_ATTR_ASSOC_SPP_AMSDU,
+ NL80211_ATTR_MLO_LINKS,
+ NL80211_ATTR_MLO_LINK_ID,
+ NL80211_ATTR_MLD_ADDR,
+ NL80211_ATTR_WIPHY_RADIOS,
+ NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS,
+
+ NL80211_ATTR_MLO_SUPPORT,
+
+ NL80211_ATTR_MAX_NUM_AKM_SUITES,
+
+ NL80211_ATTR_EML_CAPABILITY,
+ NL80211_ATTR_MLD_CAPA_AND_OPS,
+
+ NL80211_ATTR_TX_HW_TIMESTAMP,
+ NL80211_ATTR_RX_HW_TIMESTAMP,
+ NL80211_ATTR_TD_BITMAP,
+
+ NL80211_ATTR_WIPHY_ANTENNA_GAIN,
+ NL80211_ATTR_VIF_RADIO_MASK,
+
/* add attributes here, update the policy in nl80211.c */
__NL80211_ATTR_AFTER_LAST,
@@ -3231,6 +3339,11 @@ enum nl80211_attrs {
#define NL80211_HE_MIN_CAPABILITY_LEN 16
#define NL80211_HE_MAX_CAPABILITY_LEN 54
#define NL80211_MAX_NR_CIPHER_SUITES 5
+
+/*
+ * NL80211_MAX_NR_AKM_SUITES is obsolete when %NL80211_ATTR_MAX_NUM_AKM_SUITES
+ * present in %NL80211_CMD_GET_WIPHY response.
+ */
#define NL80211_MAX_NR_AKM_SUITES 2
#define NL80211_EHT_MIN_CAPABILITY_LEN 13
#define NL80211_EHT_MAX_CAPABILITY_LEN 51
@@ -4853,6 +4966,8 @@ enum nl80211_bss_scan_width {
* Contains a nested array of signal strength attributes (u8, dBm),
* using the nesting index as the antenna number.
* @NL80211_BSS_FREQUENCY_OFFSET: frequency offset in KHz
+ * @NL80211_BSS_MLO_LINK_ID: MLO link ID of the BSS (u8).
+ * @NL80211_BSS_MLD_ADDR: MLD address of this BSS if connected to it.
* @__NL80211_BSS_AFTER_LAST: internal
* @NL80211_BSS_MAX: highest BSS attribute
*/
@@ -4878,6 +4993,8 @@ enum nl80211_bss {
NL80211_BSS_PARENT_BSSID,
NL80211_BSS_CHAIN_SIGNAL,
NL80211_BSS_FREQUENCY_OFFSET,
+ NL80211_BSS_MLO_LINK_ID,
+ NL80211_BSS_MLD_ADDR,
@@ -7987,4 +8007,54 @@ enum nl80211_ap_settings_flags {
NL80211_AP_SETTINGS_SA_QUERY_OFFLOAD_SUPPORT = 1 << 1,
};
/* keep last */
__NL80211_BSS_AFTER_LAST,
@@ -5874,7 +5991,7 @@ enum nl80211_ap_sme_features {
* @NL80211_FEATURE_INACTIVITY_TIMER: This driver takes care of freeing up
* the connected inactive stations in AP mode.
* @NL80211_FEATURE_CELL_BASE_REG_HINTS: This driver has been tested
- * to work properly to suppport receiving regulatory hints from
+ * to work properly to support receiving regulatory hints from
* cellular base stations.
* @NL80211_FEATURE_P2P_DEVICE_NEEDS_CHANNEL: (no longer available, only
* here to reserve the value for API/ABI compatibility)
@@ -6174,6 +6291,14 @@ enum nl80211_feature_flags {
* @NL80211_EXT_FEATURE_RADAR_BACKGROUND: Device supports background radar/CAC
* detection.
*
+ * @NL80211_EXT_FEATURE_POWERED_ADDR_CHANGE: Device can perform a MAC address
+ * change without having to bring the underlying network device down
+ * first. For example, in station mode this can be used to vary the
+ * origin MAC address prior to a connection to a new AP for privacy
+ * or other reasons. Note that certain driver specific restrictions
+ * might apply, e.g. no scans in progress, no offchannel operations
+ * in progress, and no active connections.
+/**
+ * enum nl80211_wiphy_radio_attrs - wiphy radio attributes
+ *
* @NUM_NL80211_EXT_FEATURES: number of extended features.
* @MAX_NL80211_EXT_FEATURES: highest extended feature index.
*/
@@ -6241,6 +6366,7 @@ enum nl80211_ext_feature_index {
NL80211_EXT_FEATURE_BSS_COLOR,
NL80211_EXT_FEATURE_FILS_CRYPTO_OFFLOAD,
NL80211_EXT_FEATURE_RADAR_BACKGROUND,
+ NL80211_EXT_FEATURE_POWERED_ADDR_CHANGE,
/* add new features before the definition below */
NUM_NL80211_EXT_FEATURES,
+ * @__NL80211_WIPHY_RADIO_ATTR_INVALID: Invalid
+ *
+ * @NL80211_WIPHY_RADIO_ATTR_INDEX: Index of this radio (u32)
+ * @NL80211_WIPHY_RADIO_ATTR_FREQ_RANGE: Frequency range supported by this
+ * radio. Attribute may be present multiple times.
+ * @NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION: Supported interface
+ * combination for this radio. Attribute may be present multiple times
+ * and contains attributes defined in &enum nl80211_if_combination_attrs.
+ *
+ * @__NL80211_WIPHY_RADIO_ATTR_LAST: Internal
+ * @NL80211_WIPHY_RADIO_ATTR_MAX: Highest attribute
+ */
+enum nl80211_wiphy_radio_attrs {
+ __NL80211_WIPHY_RADIO_ATTR_INVALID,
+
+ NL80211_WIPHY_RADIO_ATTR_INDEX,
+ NL80211_WIPHY_RADIO_ATTR_FREQ_RANGE,
+ NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION,
+
+ /* keep last */
+ __NL80211_WIPHY_RADIO_ATTR_LAST,
+ NL80211_WIPHY_RADIO_ATTR_MAX = __NL80211_WIPHY_RADIO_ATTR_LAST - 1,
+};
+
+/**
+ * enum nl80211_wiphy_radio_freq_range - wiphy radio frequency range
+ *
+ * @__NL80211_WIPHY_RADIO_FREQ_ATTR_INVALID: Invalid
+ *
+ * @NL80211_WIPHY_RADIO_FREQ_ATTR_START: Frequency range start (u32).
+ * The unit is kHz.
+ * @NL80211_WIPHY_RADIO_FREQ_ATTR_END: Frequency range end (u32).
+ * The unit is kHz.
+ *
+ * @__NL80211_WIPHY_RADIO_FREQ_ATTR_LAST: Internal
+ * @NL80211_WIPHY_RADIO_FREQ_ATTR_MAX: Highest attribute
+ */
+enum nl80211_wiphy_radio_freq_range {
+ __NL80211_WIPHY_RADIO_FREQ_ATTR_INVALID,
+
+ NL80211_WIPHY_RADIO_FREQ_ATTR_START,
+ NL80211_WIPHY_RADIO_FREQ_ATTR_END,
+
+ __NL80211_WIPHY_RADIO_FREQ_ATTR_LAST,
+ NL80211_WIPHY_RADIO_FREQ_ATTR_MAX = __NL80211_WIPHY_RADIO_FREQ_ATTR_LAST - 1,
+};
+
#endif /* __LINUX_NL80211_H */

View File

@@ -16,7 +16,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
--- a/Makefile
+++ b/Makefile
@@ -45,30 +45,30 @@ NLLIBNAME = libnl-1
@@ -46,30 +46,30 @@ NLLIBNAME = libnl-1
endif
ifeq ($(NL2FOUND),Y)
@@ -55,7 +55,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
NLLIBNAME = libnl-3.1
endif
@@ -76,8 +76,8 @@ ifeq ($(NLLIBNAME),)
@@ -77,8 +77,8 @@ ifeq ($(NLLIBNAME),)
$(error Cannot find development files for any supported version of libnl)
endif

View File

@@ -0,0 +1,153 @@
From 422419e06d55a7c852d1f6f054a094e285ebaa27 Mon Sep 17 00:00:00 2001
From: Christopher A Wills <christopher.a.wills@intel.com>
Date: Tue, 30 Jul 2024 16:27:36 -0700
Subject: [PATCH] scan: Add printing of HE Operation Element
Signed-off-by: Christopher A Wills <christopher.a.wills@intel.com>
---
iw.h | 1 +
scan.c | 8 +++++
util.c | 103 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 112 insertions(+)
--- a/iw.h
+++ b/iw.h
@@ -222,6 +222,7 @@ void print_ampdu_spacing(__u8 spacing);
void print_ht_capability(__u16 cap);
void print_vht_info(__u32 capa, const __u8 *mcs);
void print_he_capability(const uint8_t *ie, int len);
+void print_he_operation(const uint8_t *ie, int len);
void print_he_info(struct nlattr *nl_iftype);
void print_eht_info(struct nlattr *nl_iftype, int band);
void print_s1g_capability(const uint8_t *caps);
--- a/scan.c
+++ b/scan.c
@@ -2384,8 +2384,16 @@ static void print_he_capa(const uint8_t
print_he_capability(data, len);
}
+static void print_he_oper(const uint8_t type, uint8_t len, const uint8_t *data,
+ const struct print_ies_data *ie_buffer)
+{
+ printf("\n");
+ print_he_operation(data, len);
+}
+
static const struct ie_print ext_printers[] = {
[35] = { "HE capabilities", print_he_capa, 21, 54, BIT(PRINT_SCAN), },
+ [36] = { "HE Operation", print_he_oper, 6, 15, BIT(PRINT_SCAN), },
};
static void print_extension(unsigned char len, unsigned char *ie,
--- a/util.c
+++ b/util.c
@@ -1733,6 +1733,109 @@ void print_he_capability(const uint8_t *
__print_he_capa(mac_cap, phy_cap - 1, mcs_set, mcs_len, NULL, 0, false);
}
+void print_he_operation(const uint8_t *ie, int len)
+{
+ uint8_t oper_parameters[3] = {ie[0], ie[1], ie[2] };
+ uint8_t bss_color = ie[3];
+ uint16_t nss_mcs_set = *(uint16_t*)(&ie[4]);
+ uint8_t vht_oper_present = oper_parameters[1] & 0x40;
+ uint8_t co_hosted_bss_present = oper_parameters[1] & 0x80;
+ uint8_t uhb_operation_info_present = oper_parameters[2] & 0x02;
+ uint8_t offset = 6;
+
+ printf("\t\tHE Operation Parameters: (0x%02x%02x%02x)\n",
+ oper_parameters[2], oper_parameters[1], oper_parameters[0]);
+ printf("\t\t\tDefault PE Duration: %hhu\n", oper_parameters[0] & 0x07);
+ if (oper_parameters[0] & 0x08)
+ printf("\t\t\tTWT Required\n");
+
+ printf("\t\t\tTXOP Duration RTS Threshold: %hu\n",
+ (*(uint16_t*)(oper_parameters)) >> 4 & 0x03ff);
+ if (oper_parameters[1] & 0x40)
+ printf("\t\t\tVHT Operation Information Present\n");
+
+ if (oper_parameters[1] & 0x80)
+ printf("\t\t\tCo-Hosted BSS\n");
+
+ if (oper_parameters[2] & 0x01)
+ printf("\t\t\tER SU Disable\n");
+
+ if (oper_parameters[2] & 0x02)
+ printf("\t\t\t6 GHz Operation Information Present\n");
+
+ printf("\t\tBSS Color: %hhu\n", bss_color & 0x3F);
+ if (bss_color & 0x40)
+ printf("\t\tPartial BSS Color\n");
+
+ if (bss_color & 0x80)
+ printf("\t\tBSS Color Disabled\n");
+
+ printf("\t\tBasic HE-MCS NSS Set: 0x%04x\n", nss_mcs_set);
+ for (int k = 0; k < 8; k++) {
+ __u16 mcs = nss_mcs_set;
+
+ mcs >>= k * 2;
+ mcs &= 0x3;
+ printf("\t\t\t%d streams: ", k + 1);
+ if (mcs == 3)
+ printf("not supported\n");
+ else
+ printf("MCS 0-%d\n", 7 + (mcs * 2));
+ }
+
+ if (vht_oper_present) {
+ if (len - offset < 3) {
+ printf("\t\tVHT Operation Info: Invalid\n");
+ return;
+ }
+
+ printf("\t\tVHT Operation Info: 0x%02x%02x%02x\n",
+ ie[offset + 2], ie[offset + 1], ie[offset + 0]);
+ offset += 3;
+ }
+
+ if (co_hosted_bss_present) {
+ if (len - offset < 1) {
+ printf("\t\tMax Co-Hosted BSSID: Invalid\n");
+ return;
+ }
+
+ printf("\t\tMax Co-Hosted BSSID: %hhu\n", ie[offset]);
+ offset += 1;
+ }
+
+ if (uhb_operation_info_present) {
+ if (len - offset < 5) {
+ printf("\t\t6 GHz Operation Info: Invalid\n");
+ return;
+ } else {
+ const uint8_t control = ie[offset + 1];
+
+ printf("\t\t6 Ghz Operation Information: 0x");
+ for (uint8_t i = 0; i < 5; i++)
+ printf("%02x", ie[offset + i]);
+
+ printf("\n");
+ printf("\t\t\tPrimary Channel: %hhu\n", ie[offset]);
+ printf("\t\t\tChannel Width: ");
+ switch (control & 0x3) {
+ case 0: printf("20 MHz\n"); break;
+ case 1: printf("40 MHz\n"); break;
+ case 2: printf("80 MHz\n"); break;
+ case 3: printf("80+80 or 160 MHz\n"); break;
+ }
+
+ if (control & 0x4)
+ printf("\t\t\tDuplicate Beacon: True\n");
+
+ printf("\t\t\tRegulatory Info: %hhu\n", (control >> 3) & 0xf);
+ printf("\t\t\tCenter Frequency Segment 0: %hhu\n", ie[offset+2]);
+ printf("\t\t\tCenter Frequency Segment 1: %hhu\n", ie[offset+3]);
+ printf("\t\t\tMinimum Rate: %hhu\n", ie[offset+4]);
+ }
+ }
+}
+
void iw_hexdump(const char *prefix, const __u8 *buf, size_t size)
{
size_t i;

View File

@@ -0,0 +1,77 @@
From c41971e27a8359f88122593a2700f270f58cb2fa Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sat, 5 Apr 2025 20:48:05 +0200
Subject: [PATCH 1/2] iw: fix HE capabilities on Big Endian platforms
IE fields are encoded in Little Endian and are not correctly
printed on Big Endian platforms.
Fixes: c741be9f6ca3 ("iw: print HE capabilities")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://patch.msgid.link/20250405184807.701728-2-olek2@wp.pl
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
util.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
--- a/util.c
+++ b/util.c
@@ -1245,14 +1245,15 @@ static void __print_he_capa(const __u16
#define PRINT_HE_CAP(_var, _idx, _bit, _str) \
do { \
- if (_var[_idx] & BIT(_bit)) \
+ if (le16toh(_var[_idx]) & BIT(_bit)) \
printf("%s\t\t\t" _str "\n", pre); \
} while (0)
#define PRINT_HE_CAP_MASK(_var, _idx, _shift, _mask, _str) \
do { \
- if ((_var[_idx] >> _shift) & _mask) \
- printf("%s\t\t\t" _str ": %d\n", pre, (_var[_idx] >> _shift) & _mask); \
+ if ((le16toh(_var[_idx]) >> _shift) & _mask) \
+ printf("%s\t\t\t" _str ": %d\n", pre, \
+ (le16toh(_var[_idx]) >> _shift) & _mask); \
} while (0)
#define PRINT_HE_MAC_CAP(...) PRINT_HE_CAP(mac_cap, __VA_ARGS__)
@@ -1263,7 +1264,7 @@ static void __print_he_capa(const __u16
printf("%s\t\tHE MAC Capabilities (0x", pre);
for (i = 0; i < 3; i++)
- printf("%04x", mac_cap[i]);
+ printf("%04x", le16toh(mac_cap[i]));
printf("):\n");
PRINT_HE_MAC_CAP(0, 0, "+HTC HE Supported");
@@ -1377,18 +1378,18 @@ static void __print_he_capa(const __u16
char *bw[] = { "<= 80", "160", "80+80" };
int j;
- if ((phy_cap[0] & (phy_cap_support[i] << 8)) == 0)
+ if ((le16toh(phy_cap[0]) & (phy_cap_support[i] << 8)) == 0)
continue;
/* Supports more, but overflow? Abort. */
- if ((i * 2 + 2) * sizeof(mcs_set[0]) >= mcs_len)
+ if ((i * 2 + 2) * sizeof(le16toh(mcs_set[0])) >= mcs_len)
return;
for (j = 0; j < 2; j++) {
int k;
printf("%s\t\tHE %s MCS and NSS set %s MHz\n", pre, j ? "TX" : "RX", bw[i]);
for (k = 0; k < 8; k++) {
- __u16 mcs = mcs_set[(i * 2) + j];
+ __u16 mcs = le16toh(mcs_set[(i * 2) + j]);
mcs >>= k * 2;
mcs &= 0x3;
printf("%s\t\t\t%d streams: ", pre, k + 1);
@@ -1411,7 +1412,7 @@ static void __print_he_capa(const __u16
ppet_len = 0;
}
- if (ppet_len && (phy_cap[3] & BIT(15))) {
+ if (ppet_len && (le16toh(phy_cap[3]) & BIT(15))) {
printf("%s\t\tPPE Threshold ", pre);
for (i = 0; i < ppet_len; i++)
if (ppet[i])

View File

@@ -0,0 +1,36 @@
From 41a07a818090da424ddd24bf07f468cf5725cdc6 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sat, 5 Apr 2025 20:48:06 +0200
Subject: [PATCH 2/2] iw: fix HE operation on Big Endian platforms
IE fields are encoded in Little Endian and are not correctly
printed on Big Endian platforms.
Fixes: 422419e06d55 ("scan: Add printing of HE Operation Element")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://patch.msgid.link/20250405184807.701728-3-olek2@wp.pl
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
util.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/util.c
+++ b/util.c
@@ -1738,7 +1738,7 @@ void print_he_operation(const uint8_t *i
{
uint8_t oper_parameters[3] = {ie[0], ie[1], ie[2] };
uint8_t bss_color = ie[3];
- uint16_t nss_mcs_set = *(uint16_t*)(&ie[4]);
+ uint16_t nss_mcs_set = le16toh(*(uint16_t *)(&ie[4]));
uint8_t vht_oper_present = oper_parameters[1] & 0x40;
uint8_t co_hosted_bss_present = oper_parameters[1] & 0x80;
uint8_t uhb_operation_info_present = oper_parameters[2] & 0x02;
@@ -1751,7 +1751,7 @@ void print_he_operation(const uint8_t *i
printf("\t\t\tTWT Required\n");
printf("\t\t\tTXOP Duration RTS Threshold: %hu\n",
- (*(uint16_t*)(oper_parameters)) >> 4 & 0x03ff);
+ le16toh((*(uint16_t *)(oper_parameters))) >> 4 & 0x03ff);
if (oper_parameters[1] & 0x40)
printf("\t\t\tVHT Operation Information Present\n");

View File

@@ -0,0 +1,170 @@
From 966c590bc4dcbd9a69fdf8fe9f41cec00e72e376 Mon Sep 17 00:00:00 2001
From: Dylan Eskew <dylan.eskew@candelatech.com>
Date: Mon, 30 Sep 2024 11:11:43 -0700
Subject: [PATCH] iw: scan: add enum for element IDs
Formerly, element IDs were hardcoded. Improve readability by using
element ID names.
Signed-off-by: Dylan Eskew <dylan.eskew@candelatech.com>
Link: https://patch.msgid.link/20240930181145.1043048-2-dylan.eskew@candelatech.com
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
ieee80211.h | 43 +++++++++++++++++++++++++++
scan.c | 86 +++++++++++++++++++++++++++++++----------------------
2 files changed, 93 insertions(+), 36 deletions(-)
--- a/ieee80211.h
+++ b/ieee80211.h
@@ -58,6 +58,49 @@ struct ieee80211_vht_cap {
struct ieee80211_vht_mcs_info mcs;
} __attribute__ ((packed));
+enum elem_id {
+ EID_SSID = 0,
+ EID_SUPP_RATES = 1,
+ EID_DS_PARAMS = 3,
+ EID_TIM = 5,
+ EID_IBSS_TIM_PARAMS = 6,
+ EID_COUNTRY = 7,
+ EID_BSS_LOAD = 11,
+ EID_POWER_CONSTRAINT = 32,
+ EID_TPC_REPORT = 35,
+ EID_ERP_INFO = 42,
+ EID_HT_CAPABILITY = 45,
+ EID_ERP_D4_0 = 47,
+ EID_RSN = 48,
+ EID_EXT_SUPP_RATES = 50,
+ EID_AP_CHAN_REPORT = 51,
+ EID_SUPP_OP_CLASSES = 59,
+ EID_HT_OPERATION = 61,
+ EID_SECONDARY_CH_OFFSET = 62,
+ EID_MEASUREMENT_PILOT_TX = 66,
+ EID_RM_ENABLED_CAPABILITIES = 70,
+ EID_OVERLAP_BSS_SCAN_PARAM = 74,
+ EID_INTERWORKING = 107,
+ EID_ADVERTISEMENT = 108,
+ EID_ROAMING_CONSORTIUM = 111,
+ EID_MESH_CONFIG = 113,
+ EID_MESH_ID = 114,
+ EID_EXT_CAPABILITY = 127,
+ EID_VHT_CAPABILITY = 191,
+ EID_VHT_OPERATION = 192,
+ EID_TRANSMIT_POWER_ENVELOPE = 195,
+ EID_SHORT_BEACON_INTERVAL = 214,
+ EID_S1G_CAPABILITY = 217,
+ EID_VENDOR = 221,
+ EID_S1G_OPERATION = 232,
+ EID_EXTENSION = 255,
+};
+
+enum elem_id_ext {
+ EID_EXT_HE_CAPABILITY = 35,
+ EID_EXT_HE_OPERATION = 36,
+};
+
#define SUITE(oui, id) (((oui) << 8) | (id))
/* cipher suite selectors */
--- a/scan.c
+++ b/scan.c
@@ -1816,40 +1816,54 @@ static void print_ie(const struct ie_pri
}
static const struct ie_print ieprinters[] = {
- [0] = { "SSID", print_ssid, 0, 32,
- BIT(PRINT_SCAN) | BIT(PRINT_LINK) | BIT(PRINT_LINK_MLO_MLD), },
- [1] = { "Supported rates", print_supprates, 0, 255, BIT(PRINT_SCAN), },
- [3] = { "DS Parameter set", print_ds, 1, 1, BIT(PRINT_SCAN), },
- [5] = { "TIM", print_tim, 4, 255, BIT(PRINT_SCAN), },
- [6] = { "IBSS ATIM window", print_ibssatim, 2, 2, BIT(PRINT_SCAN), },
- [7] = { "Country", print_country, 3, 255, BIT(PRINT_SCAN), },
- [11] = { "BSS Load", print_bss_load, 5, 5, BIT(PRINT_SCAN), },
- [32] = { "Power constraint", print_powerconstraint, 1, 1, BIT(PRINT_SCAN), },
- [35] = { "TPC report", print_tpcreport, 2, 2, BIT(PRINT_SCAN), },
- [42] = { "ERP", print_erp, 1, 255, BIT(PRINT_SCAN), },
- [45] = { "HT capabilities", print_ht_capa, 26, 26, BIT(PRINT_SCAN), },
- [47] = { "ERP D4.0", print_erp, 1, 255, BIT(PRINT_SCAN), },
- [51] = { "AP Channel Report", print_ap_channel_report, 1, 255, BIT(PRINT_SCAN), },
- [59] = { "Supported operating classes", print_supp_op_classes, 1, 255, BIT(PRINT_SCAN), },
- [66] = { "Measurement Pilot Transmission", print_measurement_pilot_tx, 1, 255, BIT(PRINT_SCAN), },
- [74] = { "Overlapping BSS scan params", print_obss_scan_params, 14, 255, BIT(PRINT_SCAN), },
- [61] = { "HT operation", print_ht_op, 22, 22, BIT(PRINT_SCAN), },
- [62] = { "Secondary Channel Offset", print_secchan_offs, 1, 1, BIT(PRINT_SCAN), },
- [191] = { "VHT capabilities", print_vht_capa, 12, 255, BIT(PRINT_SCAN), },
- [192] = { "VHT operation", print_vht_oper, 5, 255, BIT(PRINT_SCAN), },
- [48] = { "RSN", print_rsn, 2, 255, BIT(PRINT_SCAN), },
- [50] = { "Extended supported rates", print_supprates, 0, 255, BIT(PRINT_SCAN), },
- [70] = { "RM enabled capabilities", print_rm_enabled_capabilities, 5, 5, BIT(PRINT_SCAN), },
- [113] = { "MESH Configuration", print_mesh_conf, 7, 7, BIT(PRINT_SCAN), },
- [114] = { "MESH ID", print_ssid, 0, 32, BIT(PRINT_SCAN) | BIT(PRINT_LINK), },
- [127] = { "Extended capabilities", print_capabilities, 0, 255, BIT(PRINT_SCAN), },
- [107] = { "802.11u Interworking", print_interworking, 0, 255, BIT(PRINT_SCAN), },
- [108] = { "802.11u Advertisement", print_11u_advert, 0, 255, BIT(PRINT_SCAN), },
- [111] = { "802.11u Roaming Consortium", print_11u_rcon, 2, 255, BIT(PRINT_SCAN), },
- [195] = { "Transmit Power Envelope", print_tx_power_envelope, 2, 5, BIT(PRINT_SCAN), },
- [214] = { "Short beacon interval", print_short_beacon_int, 2, 2, BIT(PRINT_SCAN), },
- [217] = { "S1G capabilities", print_s1g_capa, 15, 15, BIT(PRINT_SCAN), },
- [232] = { "S1G operation", print_s1g_oper, 6, 6, BIT(PRINT_SCAN), },
+ [EID_SSID] = { "SSID", print_ssid, 0, 32,
+ BIT(PRINT_SCAN) | BIT(PRINT_LINK) | BIT(PRINT_LINK_MLO_MLD), },
+ [EID_SUPP_RATES] = { "Supported rates", print_supprates, 0, 255, BIT(PRINT_SCAN), },
+ [EID_DS_PARAMS] = { "DS Parameter set", print_ds, 1, 1, BIT(PRINT_SCAN), },
+ [EID_TIM] = { "TIM", print_tim, 4, 255, BIT(PRINT_SCAN), },
+ [EID_IBSS_TIM_PARAMS] = { "IBSS ATIM window", print_ibssatim, 2, 2, BIT(PRINT_SCAN), },
+ [EID_COUNTRY] = { "Country", print_country, 3, 255, BIT(PRINT_SCAN), },
+ [EID_BSS_LOAD] = { "BSS Load", print_bss_load, 5, 5, BIT(PRINT_SCAN), },
+ [EID_POWER_CONSTRAINT] = { "Power constraint", print_powerconstraint,
+ 1, 1, BIT(PRINT_SCAN), },
+ [EID_TPC_REPORT] = { "TPC report", print_tpcreport, 2, 2, BIT(PRINT_SCAN), },
+ [EID_ERP_INFO] = { "ERP", print_erp, 1, 255, BIT(PRINT_SCAN), },
+ [EID_HT_CAPABILITY] = { "HT capabilities", print_ht_capa, 26, 26, BIT(PRINT_SCAN), },
+ [EID_ERP_D4_0] = { "ERP D4.0", print_erp, 1, 255, BIT(PRINT_SCAN), },
+ [EID_AP_CHAN_REPORT] = { "AP Channel Report", print_ap_channel_report,
+ 1, 255, BIT(PRINT_SCAN), },
+ [EID_SUPP_OP_CLASSES] = { "Supported operating classes",
+ print_supp_op_classes, 1, 255, BIT(PRINT_SCAN), },
+ [EID_MEASUREMENT_PILOT_TX] = { "Measurement Pilot Transmission",
+ print_measurement_pilot_tx, 1, 255, BIT(PRINT_SCAN), },
+ [EID_OVERLAP_BSS_SCAN_PARAM] = { "Overlapping BSS scan params",
+ print_obss_scan_params, 14, 255, BIT(PRINT_SCAN), },
+ [EID_HT_OPERATION] = { "HT operation", print_ht_op, 22, 22, BIT(PRINT_SCAN), },
+ [EID_SECONDARY_CH_OFFSET] = { "Secondary Channel Offset",
+ print_secchan_offs, 1, 1, BIT(PRINT_SCAN), },
+ [EID_VHT_CAPABILITY] = { "VHT capabilities", print_vht_capa, 12, 255, BIT(PRINT_SCAN), },
+ [EID_VHT_OPERATION] = { "VHT operation", print_vht_oper, 5, 255, BIT(PRINT_SCAN), },
+ [EID_RSN] = { "RSN", print_rsn, 2, 255, BIT(PRINT_SCAN), },
+ [EID_EXT_SUPP_RATES] = { "Extended supported rates", print_supprates,
+ 0, 255, BIT(PRINT_SCAN), },
+ [EID_RM_ENABLED_CAPABILITIES] = { "RM enabled capabilities",
+ print_rm_enabled_capabilities, 5, 5, BIT(PRINT_SCAN), },
+ [EID_MESH_CONFIG] = { "MESH Configuration", print_mesh_conf, 7, 7, BIT(PRINT_SCAN), },
+ [EID_MESH_ID] = { "MESH ID", print_ssid, 0, 32, BIT(PRINT_SCAN) | BIT(PRINT_LINK), },
+ [EID_EXT_CAPABILITY] = { "Extended capabilities", print_capabilities,
+ 0, 255, BIT(PRINT_SCAN), },
+ [EID_INTERWORKING] = { "802.11u Interworking", print_interworking,
+ 0, 255, BIT(PRINT_SCAN), },
+ [EID_ADVERTISEMENT] = { "802.11u Advertisement", print_11u_advert,
+ 0, 255, BIT(PRINT_SCAN), },
+ [EID_ROAMING_CONSORTIUM] = { "802.11u Roaming Consortium",
+ print_11u_rcon, 2, 255, BIT(PRINT_SCAN), },
+ [EID_TRANSMIT_POWER_ENVELOPE] = { "Transmit Power Envelope",
+ print_tx_power_envelope, 2, 5, BIT(PRINT_SCAN), },
+ [EID_SHORT_BEACON_INTERVAL] = { "Short beacon interval",
+ print_short_beacon_int, 2, 2, BIT(PRINT_SCAN), },
+ [EID_S1G_CAPABILITY] = { "S1G capabilities", print_s1g_capa, 15, 15, BIT(PRINT_SCAN), },
+ [EID_S1G_OPERATION] = { "S1G operation", print_s1g_oper, 6, 6, BIT(PRINT_SCAN), },
};
static void print_wifi_wpa(const uint8_t type, uint8_t len, const uint8_t *data,
@@ -2392,8 +2406,8 @@ static void print_he_oper(const uint8_t
}
static const struct ie_print ext_printers[] = {
- [35] = { "HE capabilities", print_he_capa, 21, 54, BIT(PRINT_SCAN), },
- [36] = { "HE Operation", print_he_oper, 6, 15, BIT(PRINT_SCAN), },
+ [EID_EXT_HE_CAPABILITY] = { "HE capabilities", print_he_capa, 21, 54, BIT(PRINT_SCAN), },
+ [EID_EXT_HE_OPERATION] = { "HE Operation", print_he_oper, 6, 15, BIT(PRINT_SCAN), },
};
static void print_extension(unsigned char len, unsigned char *ie,

View File

@@ -0,0 +1,482 @@
From a0a7ddef29fc412cee7e3ca027905218b145a40f Mon Sep 17 00:00:00 2001
From: Dylan Eskew <dylan.eskew@candelatech.com>
Date: Fri, 22 Nov 2024 08:18:51 -0800
Subject: [PATCH] iw: scan: replace passed ie buffer with ie context
Since some ies require references to other ies, parse
the ie list once before to create a context and prevent
parsing more than the two times required.
Signed-off-by: Dylan Eskew <dylan.eskew@candelatech.com>
Link: https://patch.msgid.link/20241122161851.647214-1-dylan.eskew@candelatech.com
[cleanups]
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
scan.c | 141 +++++++++++++++++++++++++++++++--------------------------
1 file changed, 76 insertions(+), 65 deletions(-)
--- a/scan.c
+++ b/scan.c
@@ -554,13 +554,12 @@ static void tab_on_first(bool *first)
*first = false;
}
-struct print_ies_data {
- unsigned char *ie;
- int ielen;
+struct ie_context {
+ bool is_vht_cap;
};
static void print_ssid(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf(" ");
print_ssid_escaped(len, data);
@@ -572,7 +571,7 @@ static void print_ssid(const uint8_t typ
static void print_supprates(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
int i;
@@ -595,7 +594,7 @@ static void print_supprates(const uint8_
static void print_rm_enabled_capabilities(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
__u64 capa = ((__u64) data[0]) |
((__u64) data[1]) << 8 |
@@ -649,7 +648,7 @@ static void print_rm_enabled_capabilitie
}
static void print_ds(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf(" channel %d\n", data[0]);
}
@@ -669,7 +668,7 @@ static const char *country_env_str(char
}
static void print_country(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf(" %.*s", 2, data);
@@ -716,21 +715,21 @@ static void print_country(const uint8_t
static void print_powerconstraint(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf(" %d dB\n", data[0]);
}
static void print_tpcreport(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf(" TX power: %d dBm\n", data[0]);
/* printf(" Link Margin (%d dB) is reserved in Beacons\n", data[1]); */
}
static void print_erp(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
if (data[0] == 0x00)
printf(" <no flags>");
@@ -744,7 +743,7 @@ static void print_erp(const uint8_t type
}
static void print_ap_channel_report(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
uint8_t oper_class = data[0];
int i;
@@ -1084,13 +1083,13 @@ static void print_osen_ie(const char *de
}
static void print_rsn(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
print_rsn_ie("CCMP", "IEEE 802.1X", len, data);
}
static void print_ht_capa(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf("\n");
print_ht_capability(data[0] | (data[1] << 8));
@@ -1135,7 +1134,7 @@ static const char* vgroup_11u(uint8_t t)
static void print_interworking(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
/* See Section 7.3.2.92 in the 802.11u spec. */
printf("\n");
@@ -1168,7 +1167,7 @@ static void print_interworking(const uin
static void print_11u_advert(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
/* See Section 7.3.2.93 in the 802.11u spec. */
/* TODO: This code below does not decode private protocol IDs */
@@ -1201,7 +1200,7 @@ static void print_11u_advert(const uint8
}
static void print_11u_rcon(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
/* See Section 7.3.2.96 in the 802.11u spec. */
int idx = 0;
@@ -1254,7 +1253,7 @@ static void print_11u_rcon(const uint8_t
static void print_tx_power_envelope(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
const uint8_t local_max_tx_power_count = data[0] & 7;
const uint8_t local_max_tx_power_unit_interp = (data[0] >> 3) & 7;
@@ -1290,7 +1289,7 @@ static const char *ht_secondary_offset[4
};
static void print_ht_op(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
static const char *protection[4] = {
"no",
@@ -1322,21 +1321,10 @@ static void print_ht_op(const uint8_t ty
static void print_capabilities(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
int i, base, bit, si_duration = 0, max_amsdu = 0;
- bool s_psmp_support = false, is_vht_cap = false;
- unsigned char *ie = ie_buffer->ie;
- int ielen = ie_buffer->ielen;
-
- while (ielen >= 2 && ielen >= ie[1]) {
- if (ie[0] == 191) {
- is_vht_cap = true;
- break;
- }
- ielen -= ie[1] + 2;
- ie += ie[1] + 2;
- }
+ bool s_psmp_support = false;
for (i = 0; i < len; i++) {
base = i * 8;
@@ -1432,8 +1420,8 @@ static void print_capabilities(const uin
CAPA(61, "TDLS Wider Bandwidth");
CAPA(62, "Operating Mode Notification");
- ADD_BIT_VAL(63, is_vht_cap, max_amsdu, 1);
- ADD_BIT_VAL(64, is_vht_cap, max_amsdu, 2);
+ ADD_BIT_VAL(63, ctx->is_vht_cap, max_amsdu, 1);
+ ADD_BIT_VAL(64, ctx->is_vht_cap, max_amsdu, 2);
CAPA(65, "Channel Schedule Management");
CAPA(66, "Geodatabase Inband Enabling Signal");
@@ -1462,7 +1450,7 @@ static void print_capabilities(const uin
printf("\n\t\t * Service Interval Granularity is %d ms",
(si_duration + 1) * 5);
- if (is_vht_cap) {
+ if (ctx->is_vht_cap) {
printf("\n\t\t * Max Number Of MSDUs In A-MSDU is ");
switch (max_amsdu) {
case 0:
@@ -1486,7 +1474,7 @@ static void print_capabilities(const uin
}
static void print_tim(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf(" DTIM Count %u DTIM Period %u Bitmap Control 0x%x "
"Bitmap[0] 0x%x",
@@ -1497,13 +1485,13 @@ static void print_tim(const uint8_t type
}
static void print_ibssatim(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf(" %d TUs\n", (data[1] << 8) + data[0]);
}
static void print_vht_capa(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf("\n");
print_vht_info((__u32) data[0] | ((__u32)data[1] << 8) |
@@ -1512,7 +1500,7 @@ static void print_vht_capa(const uint8_t
}
static void print_vht_oper(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
const char *chandwidths[] = {
[0] = "20 or 40 MHz",
@@ -1531,7 +1519,7 @@ static void print_vht_oper(const uint8_t
static void print_supp_op_classes(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
uint8_t *p = (uint8_t*) data;
const uint8_t *next_data = p + len;
@@ -1565,7 +1553,7 @@ static void print_supp_op_classes(const
static void print_measurement_pilot_tx(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
uint8_t *p, len_remaining;
@@ -1614,7 +1602,7 @@ static void print_measurement_pilot_tx(c
static void print_obss_scan_params(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf("\n");
printf("\t\t * passive dwell: %d TUs\n", (data[1] << 8) | data[0]);
@@ -1629,7 +1617,7 @@ static void print_obss_scan_params(const
static void print_secchan_offs(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
if (data[0] < ARRAY_SIZE(ht_secondary_offset))
printf(" %s (%d)\n", ht_secondary_offset[data[0]], data[0]);
@@ -1638,7 +1626,7 @@ static void print_secchan_offs(const uin
}
static void print_bss_load(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf("\n");
printf("\t\t * station count: %d\n", (data[1] << 8) | data[0]);
@@ -1648,7 +1636,7 @@ static void print_bss_load(const uint8_t
static void print_mesh_conf(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf("\n");
printf("\t\t * Active Path Selection Protocol ID: %d\n", data[0]);
@@ -1681,7 +1669,7 @@ static void print_mesh_conf(const uint8_
static void print_s1g_capa(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf("\n");
print_s1g_capability(data);
@@ -1689,14 +1677,14 @@ static void print_s1g_capa(const uint8_t
static void print_short_beacon_int(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf(" %d\n", (data[1] << 8) | data[0]);
}
static void print_s1g_oper(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
int oper_ch_width, prim_ch_width;
int prim_ch_width_subfield = data[0] & 0x1;
@@ -1777,14 +1765,14 @@ static void print_s1g_oper(const uint8_t
struct ie_print {
const char *name;
void (*print)(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer);
+ const struct ie_context *ctx);
uint8_t minlen, maxlen;
uint8_t flags;
};
static void print_ie(const struct ie_print *p, const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
int i;
@@ -1805,7 +1793,7 @@ static void print_ie(const struct ie_pri
return;
}
- p->print(type, len, data, ie_buffer);
+ p->print(type, len, data, ctx);
}
#define PRINT_IGN { \
@@ -1867,14 +1855,14 @@ static const struct ie_print ieprinters[
};
static void print_wifi_wpa(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
print_rsn_ie("TKIP", "IEEE 802.1X", len, data);
}
static void print_wifi_osen(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
print_osen_ie("OSEN", "OSEN", len, data);
}
@@ -1922,7 +1910,7 @@ static bool print_wifi_wmm_param(const u
}
static void print_wifi_wmm(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
int i;
@@ -1965,7 +1953,7 @@ static const char * wifi_wps_dev_passwd_
}
static void print_wifi_wps(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
bool first = true;
__u16 subtype, sublen;
@@ -2205,7 +2193,7 @@ static const struct ie_print wifiprinter
static inline void print_p2p(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
bool first = true;
__u8 subtype;
@@ -2287,7 +2275,7 @@ static inline void print_p2p(const uint8
static inline void print_hs20_ind(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
/* I can't find the spec for this...just going off what wireshark uses. */
printf("\n");
@@ -2299,7 +2287,7 @@ static inline void print_hs20_ind(const
static void print_wifi_owe_tarns(const uint8_t type, uint8_t len,
const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
char mac_addr[20];
int ssid_len;
@@ -2392,14 +2380,14 @@ static void print_vendor(unsigned char l
}
static void print_he_capa(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf("\n");
print_he_capability(data, len);
}
static void print_he_oper(const uint8_t type, uint8_t len, const uint8_t *data,
- const struct print_ies_data *ie_buffer)
+ const struct ie_context *ctx)
{
printf("\n");
print_he_operation(data, len);
@@ -2437,23 +2425,46 @@ static void print_extension(unsigned cha
}
}
+static void init_context(struct ie_context *ctx,
+ unsigned char *ie, int ielen)
+{
+ unsigned char *pos = ie;
+ int remaining = ielen;
+
+ memset(ctx, 0, sizeof(*ctx));
+
+ if (!ie || !ielen)
+ return;
+
+ while (remaining >= 2 && remaining - 2 >= pos[1]) {
+ switch (pos[0]) {
+ case EID_VHT_CAPABILITY:
+ ctx->is_vht_cap = true;
+ break;
+ }
+
+ remaining -= pos[1] + 2;
+ pos += pos[1] + 2;
+ }
+}
+
void print_ies(unsigned char *ie, int ielen, bool unknown,
enum print_ie_type ptype)
{
- struct print_ies_data ie_buffer = {
- .ie = ie,
- .ielen = ielen };
+ struct ie_context ctx;
- if (ie == NULL || ielen < 0)
+ if (!ie)
return;
+ init_context(&ctx, ie, ielen);
+
while (ielen >= 2 && ielen - 2 >= ie[1]) {
if (ie[0] < ARRAY_SIZE(ieprinters) &&
ieprinters[ie[0]].name &&
ieprinters[ie[0]].flags & BIT(ptype) &&
ie[1] > 0) {
print_ie(&ieprinters[ie[0]],
- ie[0], ie[1], ie + 2, &ie_buffer);
+ ie[0], ie[1], ie + 2, &ctx);
} else if (ie[0] == 221 /* vendor */) {
print_vendor(ie[1], ie + 2, unknown, ptype);
} else if (ie[0] == 255 /* extension */) {

View File

@@ -0,0 +1,207 @@
From 4c859917316b69e66ba241d85b4da6ee01292a11 Mon Sep 17 00:00:00 2001
From: Dylan Eskew <dylan.eskew@candelatech.com>
Date: Wed, 19 Mar 2025 11:39:17 -0700
Subject: [PATCH] iw: util: update and clean up eht capa printing
A number of fields were either missing or incorrect, so
update to more aligned with 802.11be spec. Also clean up
printout formatting.
Signed-off-by: Dylan Eskew <dylan.eskew@candelatech.com>
Link: https://patch.msgid.link/20250319183918.1215853-2-dylan.eskew@candelatech.com
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
iw.h | 2 +
util.c | 124 ++++++++++++++++++++++++++++++++++++++++++++-------------
2 files changed, 99 insertions(+), 27 deletions(-)
--- a/iw.h
+++ b/iw.h
@@ -224,6 +224,8 @@ void print_vht_info(__u32 capa, const __
void print_he_capability(const uint8_t *ie, int len);
void print_he_operation(const uint8_t *ie, int len);
void print_he_info(struct nlattr *nl_iftype);
+void print_eht_capability(const uint8_t *ie, int len, const uint8_t *he_cap,
+ bool from_ap);
void print_eht_info(struct nlattr *nl_iftype, int band);
void print_s1g_capability(const uint8_t *caps);
--- a/util.c
+++ b/util.c
@@ -1515,11 +1515,11 @@ static void __print_eht_capa(int band,
const __u8 *mcs_set, size_t mcs_len,
const __u8 *ppet, size_t ppet_len,
const __u16 *he_phy_cap,
+ bool from_ap,
bool indent)
{
unsigned int i;
const char *pre = indent ? "\t" : "";
- const char *mcs[] = { "0-7", "8-9", "10-11", "12-13"};
#define PRINT_EHT_CAP(_var, _idx, _bit, _str) \
do { \
@@ -1534,6 +1534,7 @@ static void __print_eht_capa(int band,
} while (0)
#define PRINT_EHT_MAC_CAP(...) PRINT_EHT_CAP(mac_cap, __VA_ARGS__)
+ #define PRINT_EHT_MAC_CAP_MASK(...) PRINT_EHT_CAP_MASK(mac_cap, __VA_ARGS__)
#define PRINT_EHT_PHY_CAP(...) PRINT_EHT_CAP(phy_cap, __VA_ARGS__)
#define PRINT_EHT_PHY_CAP_MASK(...) PRINT_EHT_CAP_MASK(phy_cap, __VA_ARGS__)
@@ -1542,13 +1543,22 @@ static void __print_eht_capa(int band,
printf("%02x", mac_cap[i]);
printf("):\n");
- PRINT_EHT_MAC_CAP(0, 0, "NSEP priority access Supported");
+ PRINT_EHT_MAC_CAP(0, 0, "EPCS Priority Access Supported");
PRINT_EHT_MAC_CAP(0, 1, "EHT OM Control Supported");
- PRINT_EHT_MAC_CAP(0, 2, "Triggered TXOP Sharing Supported");
- PRINT_EHT_MAC_CAP(0, 3, "ARR Supported");
+ PRINT_EHT_MAC_CAP(0, 2, "Triggered TXOP Sharing Mode 1 Supported");
+ PRINT_EHT_MAC_CAP(0, 3, "Triggered TXOP Sharing Mode 2 Supported");
+ PRINT_EHT_MAC_CAP(0, 4, "Restricted TWP Supported");
+ PRINT_EHT_MAC_CAP(0, 5, "SCS Traffic Description Supported");
+ PRINT_EHT_MAC_CAP_MASK(0, 6, 0x3, "Maximum MPDU Length");
+
+ PRINT_EHT_MAC_CAP(1, 1, "Maximum A_MPDU Length Exponent Extension");
+ PRINT_EHT_MAC_CAP(1, 2, "EHT TRS Supported");
+ PRINT_EHT_MAC_CAP(1, 3, "TXOP Return In TXOP Sharing Mode 2 Supported");
+ PRINT_EHT_MAC_CAP(1, 4, "Two BQRs Supported");
+ PRINT_EHT_MAC_CAP_MASK(1, 5, 0x3, "EHT Link Adaptation Supported");
- printf("%s\t\tEHT PHY Capabilities: (0x", pre);
- for (i = 0; i < 8; i++)
+ printf("%s\t\tEHT PHY Capabilities (0x", pre);
+ for (i = 0; i < 9; i++)
printf("%02x", ((__u8 *)phy_cap)[i]);
printf("):\n");
@@ -1594,39 +1604,77 @@ static void __print_eht_capa(int band,
PRINT_EHT_PHY_CAP(1, 28, "MU Beamformer (80MHz)");
PRINT_EHT_PHY_CAP(1, 29, "MU Beamformer (160MHz)");
PRINT_EHT_PHY_CAP(1, 30, "MU Beamformer (320MHz)");
+ PRINT_EHT_PHY_CAP(1, 31, "TB Sounding Feedback Rate Limit");
- printf("%s\t\tEHT MCS/NSS: (0x", pre);
- for (i = 0; i < mcs_len; i++)
- printf("%02x", ((__u8 *)mcs_set)[i]);
- printf("):\n");
+ PRINT_EHT_PHY_CAP(2, 0, "Rx 1024-QAM In Wider Bandwidth DL OFDMA Supported");
+ PRINT_EHT_PHY_CAP(2, 1, "Rx 4096-QAM In Wider Bandwidth DL OFDMA Supported");
- if (!(he_phy_cap[0] & ((BIT(2) | BIT(3) | BIT(4)) << 8))){
- for (i = 0; i < 4; i++)
- printf("%s\t\tEHT bw=20 MHz, max NSS for MCS %s: Rx=%u, Tx=%u\n",
- pre, mcs[i],
- mcs_set[i] & 0xf, mcs_set[i] >> 4);
+ if (!from_ap &&
+ !(he_phy_cap[0] & ((BIT(1) | BIT(2) | BIT(3) | BIT(4)) << 8))) {
+ static const char * const mcs[] = { "0-7", "8-9", "10-11", "12-13" };
+
+ printf("%s\t\tEHT-MCS Map (20 Mhz Non-AP STA) (0x", pre);
+ for (i = 0; i < mcs_len; i++)
+ printf("%02x", ((__u8 *)mcs_set)[i]);
+ printf("):\n");
+
+ for (i = 0; i < 4; i++) {
+ printf("%s\t\t\tRx Max NSS for MCS %s: %u\n",
+ pre, mcs[i], mcs_set[i] & 0xf);
+ printf("%s\t\t\tTx Max NSS for MCS %s: %u\n",
+ pre, mcs[i], mcs_set[i] >> 4);
+ }
} else {
- if (he_phy_cap[0] & (BIT(2) << 8)) {
+ static const char * const mcs[] = { "0-9", "10-11", "12-13"};
+
+ /* Bit 1 corresponds to 2.4Ghz 40Mhz support
+ * Bit 2 corresponds to 5/6Ghz 40 and 80Mhz support
+ * If no Channel Width bits are set, but we are an AP, we use
+ * this MCS logic also.
+ */
+ if (he_phy_cap[0] & ((BIT(1) | BIT(2)) << 8) ||
+ (from_ap && !(he_phy_cap[0] & ((BIT(1) | BIT(2) | BIT(3) | BIT(4)) << 8)))) {
+ printf("%s\t\tEHT-MCS Map (BW <= 80) (0x", pre);
for (i = 0; i < 3; i++)
- printf("%s\t\tEHT bw <= 80 MHz, max NSS for MCS %s: Rx=%u, Tx=%u\n",
- pre, mcs[i + 1],
- mcs_set[i] & 0xf, mcs_set[i] >> 4);
+ printf("%02x", ((__u8 *)mcs_set)[i]);
+ printf("):\n");
+
+ for (i = 0; i < 3; i++) {
+ printf("%s\t\t\tRx Max NSS for MCS %s: %u\n",
+ pre, mcs[i], mcs_set[i] & 0xf);
+ printf("%s\t\t\tTx Max NSS for MCS %s: %u\n",
+ pre, mcs[i], mcs_set[i] >> 4);
+ }
}
mcs_set += 3;
if (he_phy_cap[0] & (BIT(3) << 8)) {
+ printf("%s\t\tEHT-MCS Map (BW = 160) (0x", pre);
for (i = 0; i < 3; i++)
- printf("%s\t\tEHT bw=160 MHz, max NSS for MCS %s: Rx=%u, Tx=%u\n",
- pre, mcs[i + 1],
- mcs_set[i] & 0xf, mcs_set[i] >> 4);
+ printf("%02x", ((__u8 *)mcs_set)[i]);
+ printf("):\n");
+
+ for (i = 0; i < 3; i++) {
+ printf("%s\t\t\tRx Max NSS for MCS %s: %u\n",
+ pre, mcs[i], mcs_set[i] & 0xf);
+ printf("%s\t\t\tTx Max NSS for MCS %s: %u\n",
+ pre, mcs[i], mcs_set[i] >> 4);
+ }
}
mcs_set += 3;
if (band == NL80211_BAND_6GHZ && (phy_cap[0] & BIT(1))) {
+ printf("%s\t\tEHT-MCS Map (BW = 320) (0x", pre);
for (i = 0; i < 3; i++)
- printf("%s\t\tEHT bw=320 MHz, max NSS for MCS %s: Rx=%u, Tx=%u\n",
- pre, mcs[i + 1],
- mcs_set[i] & 0xf, mcs_set[i] >> 4);
+ printf("%02x", ((__u8 *)mcs_set)[i]);
+ printf("):\n");
+
+ for (i = 0; i < 3; i++) {
+ printf("%s\t\t\tRx Max NSS for MCS %s: %u\n",
+ pre, mcs[i], mcs_set[i] & 0xf);
+ printf("%s\t\t\tTx Max NSS for MCS %s: %u\n",
+ pre, mcs[i], mcs_set[i] >> 4);
+ }
}
}
@@ -1713,7 +1761,29 @@ void print_eht_info(struct nlattr *nl_if
}
__print_eht_capa(band, mac_cap, phy_cap, mcs_set, mcs_len, ppet, ppet_len,
- he_phy_cap, true);
+ he_phy_cap, false, true);
+}
+
+void print_eht_capability(const uint8_t *ie, int len, const uint8_t *he_cap,
+ bool from_ap)
+{
+ const void *mac_cap, *phy_cap, *mcs_set, *he_phy_cap;
+ int mcs_len;
+ int i = 0;
+
+ mac_cap = &ie[i];
+ i += 2;
+
+ phy_cap = &ie[i];
+ i += 9;
+
+ mcs_set = &ie[i];
+ mcs_len = len - i;
+
+ he_phy_cap = &he_cap[6];
+
+ __print_eht_capa(NL80211_BAND_6GHZ, mac_cap, phy_cap, mcs_set, mcs_len,
+ NULL, 0, he_phy_cap - 1, from_ap, false);
}
void print_he_capability(const uint8_t *ie, int len)

View File

@@ -0,0 +1,175 @@
From a6ad3f11ead18d1812c7d3759991dc22b20d90da Mon Sep 17 00:00:00 2001
From: Dylan Eskew <dylan.eskew@candelatech.com>
Date: Wed, 19 Mar 2025 11:39:18 -0700
Subject: [PATCH] iw: scan: add eht capability parsing
Add ability to print out EHT capabilities from
AP beacons.
Signed-off-by: Dylan Eskew <dylan.eskew@candelatech.com>
Link: https://patch.msgid.link/20250319183918.1215853-3-dylan.eskew@candelatech.com
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
ieee80211.h | 1 +
iw.h | 2 +-
link.c | 5 +++--
scan.c | 34 +++++++++++++++++++++++++++-------
4 files changed, 32 insertions(+), 10 deletions(-)
--- a/ieee80211.h
+++ b/ieee80211.h
@@ -99,6 +99,7 @@ enum elem_id {
enum elem_id_ext {
EID_EXT_HE_CAPABILITY = 35,
EID_EXT_HE_OPERATION = 36,
+ EID_EXT_EHT_CAPABILITY = 108,
};
#define SUITE(oui, id) (((oui) << 8) | (id))
--- a/iw.h
+++ b/iw.h
@@ -256,7 +256,7 @@ enum print_ie_type {
#define BIT(x) (1ULL<<(x))
void print_ies(unsigned char *ie, int ielen, bool unknown,
- enum print_ie_type ptype);
+ enum print_ie_type ptype, bool from_ap);
void parse_bitrate(struct nlattr *bitrate_attr, char *buf, int buflen);
void iw_hexdump(const char *prefix, const __u8 *data, size_t len);
--- a/link.c
+++ b/link.c
@@ -93,7 +93,7 @@ static int link_bss_handler(struct nl_ms
if (bss[NL80211_BSS_INFORMATION_ELEMENTS])
print_ies(nla_data(bss[NL80211_BSS_INFORMATION_ELEMENTS]),
nla_len(bss[NL80211_BSS_INFORMATION_ELEMENTS]),
- false, PRINT_LINK_MLO_MLD);
+ false, PRINT_LINK_MLO_MLD, false);
}
} else {
memcpy(result->sta_addr, nla_data(bss[NL80211_BSS_BSSID]), 6);
@@ -121,7 +121,8 @@ static int link_bss_handler(struct nl_ms
if (bss[NL80211_BSS_INFORMATION_ELEMENTS])
print_ies(nla_data(bss[NL80211_BSS_INFORMATION_ELEMENTS]),
nla_len(bss[NL80211_BSS_INFORMATION_ELEMENTS]),
- false, result->mld ? PRINT_LINK_MLO_LINK : PRINT_LINK);
+ false, result->mld ? PRINT_LINK_MLO_LINK : PRINT_LINK,
+ false);
if (bss[NL80211_BSS_FREQUENCY_OFFSET])
freq_offset = nla_get_u32(bss[NL80211_BSS_FREQUENCY_OFFSET]);
--- a/scan.c
+++ b/scan.c
@@ -555,7 +555,9 @@ static void tab_on_first(bool *first)
}
struct ie_context {
+ bool from_ap;
bool is_vht_cap;
+ const uint8_t *he_cap;
};
static void print_ssid(const uint8_t type, uint8_t len, const uint8_t *data,
@@ -2393,12 +2395,21 @@ static void print_he_oper(const uint8_t
print_he_operation(data, len);
}
+static void print_eht_capa(const uint8_t type, uint8_t len,
+ const uint8_t *data, const struct ie_context *ctx)
+{
+ printf("\n");
+ print_eht_capability(data, len, ctx->he_cap, ctx->from_ap);
+}
+
static const struct ie_print ext_printers[] = {
[EID_EXT_HE_CAPABILITY] = { "HE capabilities", print_he_capa, 21, 54, BIT(PRINT_SCAN), },
[EID_EXT_HE_OPERATION] = { "HE Operation", print_he_oper, 6, 15, BIT(PRINT_SCAN), },
+ [EID_EXT_EHT_CAPABILITY] = { "EHT capabilities", print_eht_capa, 13, 30, BIT(PRINT_SCAN), },
};
static void print_extension(unsigned char len, unsigned char *ie,
+ const struct ie_context *ctx,
bool unknown, enum print_ie_type ptype)
{
unsigned char tag;
@@ -2411,7 +2422,7 @@ static void print_extension(unsigned cha
tag = ie[0];
if (tag < ARRAY_SIZE(ext_printers) && ext_printers[tag].name &&
ext_printers[tag].flags & BIT(ptype)) {
- print_ie(&ext_printers[tag], tag, len - 1, ie + 1, NULL);
+ print_ie(&ext_printers[tag], tag, len - 1, ie + 1, ctx);
return;
}
@@ -2426,7 +2437,7 @@ static void print_extension(unsigned cha
}
static void init_context(struct ie_context *ctx,
- unsigned char *ie, int ielen)
+ unsigned char *ie, int ielen, bool from_ap)
{
unsigned char *pos = ie;
int remaining = ielen;
@@ -2436,11 +2447,20 @@ static void init_context(struct ie_conte
if (!ie || !ielen)
return;
+ ctx->from_ap = from_ap;
+
while (remaining >= 2 && remaining - 2 >= pos[1]) {
switch (pos[0]) {
case EID_VHT_CAPABILITY:
ctx->is_vht_cap = true;
break;
+ case EID_EXTENSION:
+ switch (pos[2]) {
+ case EID_EXT_HE_CAPABILITY:
+ ctx->he_cap = pos + 3;
+ break;
+ }
+ break;
}
remaining -= pos[1] + 2;
@@ -2449,14 +2469,14 @@ static void init_context(struct ie_conte
}
void print_ies(unsigned char *ie, int ielen, bool unknown,
- enum print_ie_type ptype)
+ enum print_ie_type ptype, bool from_ap)
{
struct ie_context ctx;
if (!ie)
return;
- init_context(&ctx, ie, ielen);
+ init_context(&ctx, ie, ielen, from_ap);
while (ielen >= 2 && ielen - 2 >= ie[1]) {
if (ie[0] < ARRAY_SIZE(ieprinters) &&
@@ -2468,7 +2488,7 @@ void print_ies(unsigned char *ie, int ie
} else if (ie[0] == 221 /* vendor */) {
print_vendor(ie[1], ie + 2, unknown, ptype);
} else if (ie[0] == 255 /* extension */) {
- print_extension(ie[1], ie + 2, unknown, ptype);
+ print_extension(ie[1], ie + 2, &ctx, unknown, ptype);
} else if (unknown) {
int i;
@@ -2673,13 +2693,13 @@ static int print_bss_handler(struct nl_m
printf("\tInformation elements from Probe Response "
"frame:\n");
print_ies(nla_data(ies), nla_len(ies),
- params->unknown, params->type);
+ params->unknown, params->type, true);
}
if (bss[NL80211_BSS_BEACON_IES] && show--) {
printf("\tInformation elements from Beacon frame:\n");
print_ies(nla_data(bss[NL80211_BSS_BEACON_IES]),
nla_len(bss[NL80211_BSS_BEACON_IES]),
- params->unknown, params->type);
+ params->unknown, params->type, true);
}
return NL_SKIP;

View File

@@ -0,0 +1,107 @@
From 59660a349cf35903e951f99bdd8a74df063c912e Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Fri, 2 May 2025 21:44:05 +0200
Subject: [PATCH] iw: fix EHT capabilities on Big Endian platforms
IE fields are encoded in Little Endian and are not correctly
printed on Big Endian platforms.
Fixes: 5a71b722270c ("iw: Print local EHT capabilities")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://patch.msgid.link/20250502194405.3489240-1-olek2@wp.pl
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
util.c | 40 +++++++++++++++++++++++++---------------
1 file changed, 25 insertions(+), 15 deletions(-)
--- a/util.c
+++ b/util.c
@@ -1521,22 +1521,31 @@ static void __print_eht_capa(int band,
unsigned int i;
const char *pre = indent ? "\t" : "";
- #define PRINT_EHT_CAP(_var, _idx, _bit, _str) \
+ #define PRINT_EHT_MAC_CAP(_idx, _bit, _str) \
do { \
- if (_var[_idx] & BIT(_bit)) \
+ if (mac_cap[_idx] & BIT(_bit)) \
printf("%s\t\t\t" _str "\n", pre); \
} while (0)
- #define PRINT_EHT_CAP_MASK(_var, _idx, _shift, _mask, _str) \
+ #define PRINT_EHT_MAC_CAP_MASK(_idx, _shift, _mask, _str) \
do { \
- if ((_var[_idx] >> _shift) & _mask) \
- printf("%s\t\t\t" _str ": %d\n", pre, (_var[_idx] >> _shift) & _mask); \
+ if ((mac_cap[_idx] >> _shift) & _mask) \
+ printf("%s\t\t\t" _str ": %d\n", pre, \
+ (mac_cap[_idx] >> _shift) & _mask); \
} while (0)
- #define PRINT_EHT_MAC_CAP(...) PRINT_EHT_CAP(mac_cap, __VA_ARGS__)
- #define PRINT_EHT_MAC_CAP_MASK(...) PRINT_EHT_CAP_MASK(mac_cap, __VA_ARGS__)
- #define PRINT_EHT_PHY_CAP(...) PRINT_EHT_CAP(phy_cap, __VA_ARGS__)
- #define PRINT_EHT_PHY_CAP_MASK(...) PRINT_EHT_CAP_MASK(phy_cap, __VA_ARGS__)
+ #define PRINT_EHT_PHY_CAP(_idx, _bit, _str) \
+ do { \
+ if (le32toh(phy_cap[_idx]) & BIT(_bit)) \
+ printf("%s\t\t\t" _str "\n", pre); \
+ } while (0)
+
+ #define PRINT_EHT_PHY_CAP_MASK(_idx, _shift, _mask, _str) \
+ do { \
+ if ((le32toh(phy_cap[_idx]) >> _shift) & _mask) \
+ printf("%s\t\t\t" _str ": %d\n", pre, \
+ (le32toh(phy_cap[_idx]) >> _shift) & _mask); \
+ } while (0)
printf("%s\t\tEHT MAC Capabilities (0x", pre);
for (i = 0; i < 2; i++)
@@ -1610,7 +1619,7 @@ static void __print_eht_capa(int band,
PRINT_EHT_PHY_CAP(2, 1, "Rx 4096-QAM In Wider Bandwidth DL OFDMA Supported");
if (!from_ap &&
- !(he_phy_cap[0] & ((BIT(1) | BIT(2) | BIT(3) | BIT(4)) << 8))) {
+ !(le16toh(he_phy_cap[0]) & ((BIT(1) | BIT(2) | BIT(3) | BIT(4)) << 8))) {
static const char * const mcs[] = { "0-7", "8-9", "10-11", "12-13" };
printf("%s\t\tEHT-MCS Map (20 Mhz Non-AP STA) (0x", pre);
@@ -1632,8 +1641,9 @@ static void __print_eht_capa(int band,
* If no Channel Width bits are set, but we are an AP, we use
* this MCS logic also.
*/
- if (he_phy_cap[0] & ((BIT(1) | BIT(2)) << 8) ||
- (from_ap && !(he_phy_cap[0] & ((BIT(1) | BIT(2) | BIT(3) | BIT(4)) << 8)))) {
+ if (le16toh(he_phy_cap[0]) & ((BIT(1) | BIT(2)) << 8) ||
+ (from_ap && !(le16toh(he_phy_cap[0]) &
+ ((BIT(1) | BIT(2) | BIT(3) | BIT(4)) << 8)))) {
printf("%s\t\tEHT-MCS Map (BW <= 80) (0x", pre);
for (i = 0; i < 3; i++)
printf("%02x", ((__u8 *)mcs_set)[i]);
@@ -1648,7 +1658,7 @@ static void __print_eht_capa(int band,
}
mcs_set += 3;
- if (he_phy_cap[0] & (BIT(3) << 8)) {
+ if (le16toh(he_phy_cap[0]) & (BIT(3) << 8)) {
printf("%s\t\tEHT-MCS Map (BW = 160) (0x", pre);
for (i = 0; i < 3; i++)
printf("%02x", ((__u8 *)mcs_set)[i]);
@@ -1663,7 +1673,7 @@ static void __print_eht_capa(int band,
}
mcs_set += 3;
- if (band == NL80211_BAND_6GHZ && (phy_cap[0] & BIT(1))) {
+ if (band == NL80211_BAND_6GHZ && (le32toh(phy_cap[0]) & BIT(1))) {
printf("%s\t\tEHT-MCS Map (BW = 320) (0x", pre);
for (i = 0; i < 3; i++)
printf("%02x", ((__u8 *)mcs_set)[i]);
@@ -1678,7 +1688,7 @@ static void __print_eht_capa(int band,
}
}
- if (ppet && ppet_len && (phy_cap[1] & BIT(11))) {
+ if (ppet && ppet_len && (le32toh(phy_cap[1]) & BIT(11))) {
printf("%s\t\tEHT PPE Thresholds ", pre);
for (i = 0; i < ppet_len; i++)
if (ppet[i])

View File

@@ -0,0 +1,131 @@
From 8ea80d378ce5f727e69493533a666278c6a568a7 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Fri, 2 May 2025 12:03:53 +0200
Subject: [PATCH] iw: scan: Add printing of EHT Operation Element
Add ability to print out EHT capabilities from AP beacons.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://patch.msgid.link/20250502100353.3149470-1-olek2@wp.pl
[add default case to bandwidth switch]
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
ieee80211.h | 1 +
iw.h | 1 +
scan.c | 8 +++++++
util.c | 63 +++++++++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 73 insertions(+)
--- a/ieee80211.h
+++ b/ieee80211.h
@@ -99,6 +99,7 @@ enum elem_id {
enum elem_id_ext {
EID_EXT_HE_CAPABILITY = 35,
EID_EXT_HE_OPERATION = 36,
+ EID_EXT_EHT_OPERATION = 106,
EID_EXT_EHT_CAPABILITY = 108,
};
--- a/iw.h
+++ b/iw.h
@@ -226,6 +226,7 @@ void print_he_operation(const uint8_t *i
void print_he_info(struct nlattr *nl_iftype);
void print_eht_capability(const uint8_t *ie, int len, const uint8_t *he_cap,
bool from_ap);
+void print_eht_operation(const uint8_t *ie, int len);
void print_eht_info(struct nlattr *nl_iftype, int band);
void print_s1g_capability(const uint8_t *caps);
--- a/scan.c
+++ b/scan.c
@@ -2402,10 +2402,18 @@ static void print_eht_capa(const uint8_t
print_eht_capability(data, len, ctx->he_cap, ctx->from_ap);
}
+static void print_eht_oper(const uint8_t type, uint8_t len, const uint8_t *data,
+ const struct ie_context *ctx)
+{
+ printf("\n");
+ print_eht_operation(data, len);
+}
+
static const struct ie_print ext_printers[] = {
[EID_EXT_HE_CAPABILITY] = { "HE capabilities", print_he_capa, 21, 54, BIT(PRINT_SCAN), },
[EID_EXT_HE_OPERATION] = { "HE Operation", print_he_oper, 6, 15, BIT(PRINT_SCAN), },
[EID_EXT_EHT_CAPABILITY] = { "EHT capabilities", print_eht_capa, 13, 30, BIT(PRINT_SCAN), },
+ [EID_EXT_EHT_OPERATION] = { "EHT Operation", print_eht_oper, 5, 10, BIT(PRINT_SCAN), },
};
static void print_extension(unsigned char len, unsigned char *ie,
--- a/util.c
+++ b/util.c
@@ -1917,6 +1917,69 @@ void print_he_operation(const uint8_t *i
}
}
+void print_eht_operation(const uint8_t *ie, int len)
+{
+ uint8_t oper_parameters = ie[0];
+ uint8_t disabled_subchannel_info_present = oper_parameters & 0x02;
+ uint8_t eht_operation_info_present = oper_parameters & 0x01;
+
+ printf("\t\tEHT Operation Parameters: (0x%02x)\n",
+ oper_parameters);
+
+ if (oper_parameters & 0x04)
+ printf("\t\t\tEHT Default PE Duration\n");
+
+ if (oper_parameters & 0x08)
+ printf("\t\t\tGroup Addressed BU Indication Limit\n");
+
+ printf("\t\t\tGroup Addressed BU Indication Exponent: 0x%01x\n",
+ (oper_parameters >> 4 & 3));
+
+ printf("\t\tBasic EHT-MCS And Nss Set: 0x");
+ for (uint8_t i = 0; i < 4; i++)
+ printf("%02x", ie[1 + i]);
+
+ printf("\n");
+
+ if (eht_operation_info_present) {
+ uint8_t offset = 5;
+ const uint8_t control = ie[offset];
+ uint8_t eht_operation_info_len = 3;
+
+ if (disabled_subchannel_info_present)
+ eht_operation_info_len += 2;
+
+ if (len - offset < eht_operation_info_len) {
+ printf("\t\tEHT Operation Info: Invalid\n");
+ return;
+ }
+
+ printf("\t\tEHT Operation Info: 0x");
+ for (uint8_t i = 0; i < eht_operation_info_len; i++)
+ printf("%02x", ie[offset + i]);
+
+ printf("\n");
+ printf("\t\t\tChannel Width: ");
+ switch (control & 0x7) {
+ case 0: printf("20 MHz\n"); break;
+ case 1: printf("40 MHz\n"); break;
+ case 2: printf("80 MHz\n"); break;
+ case 3: printf("160 MHz\n"); break;
+ case 4: printf("320 MHz\n"); break;
+ default: printf("invalid bandwidth (%d)\n", control & 0x7); break;
+ }
+
+ printf("\t\t\tCenter Frequency Segment 0: %hhu\n",
+ ie[offset + 1]);
+ printf("\t\t\tCenter Frequency Segment 1: %hhu\n",
+ ie[offset + 2]);
+
+ if (disabled_subchannel_info_present)
+ printf("\t\t\tDisabled Subchannel Bitmap: 0x%02x%02x\n",
+ ie[offset + 3], ie[offset + 4]);
+ }
+}
+
void iw_hexdump(const char *prefix, const __u8 *buf, size_t size)
{
size_t i;

View File

@@ -1,33 +0,0 @@
--- a/phy.c
+++ b/phy.c
@@ -855,3 +855,30 @@ static int handle_get_txq(struct nl80211
COMMAND(get, txq, "",
NL80211_CMD_GET_WIPHY, 0, CIB_PHY, handle_get_txq,
"Get TXQ parameters.");
+
+static int handle_antenna_gain(struct nl80211_state *state,
+ struct nl_msg *msg,
+ int argc, char **argv,
+ enum id_input id)
+{
+ char *endptr;
+ int dbm;
+
+ /* get the required args */
+ if (argc != 1)
+ return 1;
+
+ dbm = strtol(argv[0], &endptr, 10);
+ if (*endptr)
+ return 2;
+
+ NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_ANTENNA_GAIN, dbm);
+
+ return 0;
+
+ nla_put_failure:
+ return -ENOBUFS;
+}
+COMMAND(set, antenna_gain, "<antenna gain in dBm>",
+ NL80211_CMD_SET_WIPHY, 0, CIB_PHY, handle_antenna_gain,
+ "Specify antenna gain.");

View File

@@ -1,6 +1,6 @@
--- a/event.c
+++ b/event.c
@@ -971,6 +971,7 @@ static int print_event(struct nl_msg *ms
@@ -973,6 +973,7 @@ static int print_event(struct nl_msg *ms
}
switch (gnlh->cmd) {
@@ -8,7 +8,7 @@
case NL80211_CMD_NEW_WIPHY:
printf("renamed to %s\n", nla_get_string(tb[NL80211_ATTR_WIPHY_NAME]));
break;
@@ -1006,6 +1007,7 @@ static int print_event(struct nl_msg *ms
@@ -1008,6 +1009,7 @@ static int print_event(struct nl_msg *ms
case NL80211_CMD_SCHED_SCAN_RESULTS:
printf("got scheduled scan results\n");
break;
@@ -16,7 +16,7 @@
case NL80211_CMD_WIPHY_REG_CHANGE:
case NL80211_CMD_REG_CHANGE:
if (gnlh->cmd == NL80211_CMD_WIPHY_REG_CHANGE)
@@ -1088,6 +1090,7 @@ static int print_event(struct nl_msg *ms
@@ -1090,6 +1092,7 @@ static int print_event(struct nl_msg *ms
mac_addr_n2a(macbuf, nla_data(tb[NL80211_ATTR_MAC]));
printf("del station %s\n", macbuf);
break;
@@ -24,7 +24,7 @@
case NL80211_CMD_JOIN_IBSS:
mac_addr_n2a(macbuf, nla_data(tb[NL80211_ATTR_MAC]));
printf("IBSS %s joined\n", macbuf);
@@ -1295,9 +1298,9 @@ static int print_event(struct nl_msg *ms
@@ -1297,9 +1300,9 @@ static int print_event(struct nl_msg *ms
case NL80211_CMD_ASSOC_COMEBACK: /* 147 */
parse_assoc_comeback(tb, gnlh->cmd);
break;
@@ -38,7 +38,7 @@
--- a/info.c
+++ b/info.c
@@ -309,6 +309,7 @@ next:
@@ -446,6 +446,7 @@ next:
}
}
@@ -46,7 +46,7 @@
if (tb_band[NL80211_BAND_ATTR_RATES]) {
printf("\t\tBitrates (non-HT):\n");
nla_for_each_nested(nl_rate, tb_band[NL80211_BAND_ATTR_RATES], rem_rate) {
@@ -325,6 +326,7 @@ next:
@@ -462,6 +463,7 @@ next:
printf("\n");
}
}
@@ -54,7 +54,7 @@
}
}
@@ -390,6 +392,7 @@ next:
@@ -527,6 +529,7 @@ next:
printf("\tCoverage class: %d (up to %dm)\n", coverage, 450 * coverage);
}
@@ -62,7 +62,7 @@
if (tb_msg[NL80211_ATTR_CIPHER_SUITES]) {
int num = nla_len(tb_msg[NL80211_ATTR_CIPHER_SUITES]) / sizeof(__u32);
int i;
@@ -401,6 +404,7 @@ next:
@@ -538,6 +541,7 @@ next:
cipher_name(ciphers[i]));
}
}
@@ -70,7 +70,7 @@
if (tb_msg[NL80211_ATTR_WIPHY_ANTENNA_AVAIL_TX] &&
tb_msg[NL80211_ATTR_WIPHY_ANTENNA_AVAIL_RX])
@@ -418,9 +422,11 @@ next:
@@ -555,9 +559,11 @@ next:
print_iftype_list("\tSupported interface modes", "\t\t",
tb_msg[NL80211_ATTR_SUPPORTED_IFTYPES]);
@@ -82,7 +82,7 @@
if (tb_msg[NL80211_ATTR_INTERFACE_COMBINATIONS]) {
struct nlattr *nl_combi;
@@ -510,6 +516,7 @@ broken_combination:
@@ -647,6 +653,7 @@ broken_combination:
printf("\tinterface combinations are not supported\n");
}
@@ -90,7 +90,7 @@
if (tb_msg[NL80211_ATTR_SUPPORTED_COMMANDS]) {
printf("\tSupported commands:\n");
nla_for_each_nested(nl_cmd, tb_msg[NL80211_ATTR_SUPPORTED_COMMANDS], rem_cmd)
@@ -607,6 +614,7 @@ broken_combination:
@@ -744,6 +751,7 @@ broken_combination:
printf("\t\t * wake up on TCP connection\n");
}
}
@@ -98,7 +98,7 @@
if (tb_msg[NL80211_ATTR_ROAM_SUPPORT])
printf("\tDevice supports roaming.\n");
@@ -645,6 +653,7 @@ broken_combination:
@@ -782,6 +790,7 @@ broken_combination:
}
}
@@ -106,7 +106,7 @@
if (tb_msg[NL80211_ATTR_FEATURE_FLAGS]) {
unsigned int features = nla_get_u32(tb_msg[NL80211_ATTR_FEATURE_FLAGS]);
@@ -709,6 +718,7 @@ broken_combination:
@@ -846,6 +855,7 @@ broken_combination:
if (features & NL80211_FEATURE_ND_RANDOM_MAC_ADDR)
printf("\tDevice supports randomizing MAC-addr in net-detect scans.\n");
}
@@ -114,7 +114,7 @@
if (tb_msg[NL80211_ATTR_TDLS_SUPPORT])
printf("\tDevice supports T-DLS.\n");
@@ -774,6 +784,7 @@ TOPLEVEL(list, NULL, NL80211_CMD_GET_WIP
@@ -914,6 +924,7 @@ TOPLEVEL(list, NULL, NL80211_CMD_GET_WIP
"List all wireless devices and their capabilities.");
TOPLEVEL(phy, NULL, NL80211_CMD_GET_WIPHY, NLM_F_DUMP, CIB_NONE, handle_info, NULL);
@@ -122,7 +122,7 @@
static int handle_commands(struct nl80211_state *state, struct nl_msg *msg,
int argc, char **argv, enum id_input id)
{
@@ -785,6 +796,7 @@ static int handle_commands(struct nl8021
@@ -925,6 +936,7 @@ static int handle_commands(struct nl8021
}
TOPLEVEL(commands, NULL, NL80211_CMD_GET_WIPHY, 0, CIB_NONE, handle_commands,
"list all known commands and their decimal & hex value");
@@ -132,7 +132,7 @@
{
--- a/scan.c
+++ b/scan.c
@@ -1306,6 +1306,9 @@ static void print_ht_op(const uint8_t ty
@@ -1309,6 +1309,9 @@ static void print_ht_op(const uint8_t ty
printf("\t\t * secondary channel offset: %s\n",
ht_secondary_offset[data[1] & 0x3]);
printf("\t\t * STA channel width: %s\n", sta_chan_width[(data[1] & 0x4)>>2]);
@@ -142,50 +142,62 @@
printf("\t\t * RIFS: %d\n", (data[1] & 0x8)>>3);
printf("\t\t * HT protection: %s\n", protection[data[2] & 0x3]);
printf("\t\t * non-GF present: %d\n", (data[2] & 0x4) >> 2);
@@ -1716,6 +1719,14 @@ static void print_ie(const struct ie_pri
@@ -1808,17 +1811,25 @@ static void print_ie(const struct ie_pri
static const struct ie_print ieprinters[] = {
[0] = { "SSID", print_ssid, 0, 32, BIT(PRINT_SCAN) | BIT(PRINT_LINK), },
+ [45] = { "HT capabilities", print_ht_capa, 26, 26, BIT(PRINT_SCAN), },
+ [48] = { "RSN", print_rsn, 2, 255, BIT(PRINT_SCAN), },
+ [61] = { "HT operation", print_ht_op, 22, 22, BIT(PRINT_SCAN), },
+ [62] = { "Secondary Channel Offset", print_secchan_offs, 1, 1, BIT(PRINT_SCAN), },
+ [114] = { "MESH ID", print_ssid, 0, 32, BIT(PRINT_SCAN) | BIT(PRINT_LINK), },
+ [191] = { "VHT capabilities", print_vht_capa, 12, 255, BIT(PRINT_SCAN), },
+ [192] = { "VHT operation", print_vht_oper, 5, 255, BIT(PRINT_SCAN), },
[EID_SSID] = { "SSID", print_ssid, 0, 32,
BIT(PRINT_SCAN) | BIT(PRINT_LINK) | BIT(PRINT_LINK_MLO_MLD), },
+ [EID_BSS_LOAD] = { "BSS Load", print_bss_load, 5, 5, BIT(PRINT_SCAN), },
+ [EID_HT_CAPABILITY] = { "HT capabilities", print_ht_capa, 26, 26, BIT(PRINT_SCAN), },
+ [EID_RSN] = { "RSN", print_rsn, 2, 255, BIT(PRINT_SCAN), },
+ [EID_HT_OPERATION] = { "HT operation", print_ht_op, 22, 22, BIT(PRINT_SCAN), },
+ [EID_SECONDARY_CH_OFFSET] = { "Secondary Channel Offset",
+ print_secchan_offs, 1, 1, BIT(PRINT_SCAN), },
+ [EID_MESH_ID] = { "MESH ID", print_ssid, 0, 32, BIT(PRINT_SCAN) | BIT(PRINT_LINK), },
+ [EID_VHT_CAPABILITY] = { "VHT capabilities", print_vht_capa, 12, 255, BIT(PRINT_SCAN), },
+ [EID_VHT_OPERATION] = { "VHT operation", print_vht_oper, 5, 255, BIT(PRINT_SCAN), },
+#ifdef IW_FULL
[1] = { "Supported rates", print_supprates, 0, 255, BIT(PRINT_SCAN), },
[3] = { "DS Parameter set", print_ds, 1, 1, BIT(PRINT_SCAN), },
[5] = { "TIM", print_tim, 4, 255, BIT(PRINT_SCAN), },
@@ -1725,26 +1736,20 @@ static const struct ie_print ieprinters[
[32] = { "Power constraint", print_powerconstraint, 1, 1, BIT(PRINT_SCAN), },
[35] = { "TPC report", print_tpcreport, 2, 2, BIT(PRINT_SCAN), },
[42] = { "ERP", print_erp, 1, 255, BIT(PRINT_SCAN), },
- [45] = { "HT capabilities", print_ht_capa, 26, 26, BIT(PRINT_SCAN), },
[47] = { "ERP D4.0", print_erp, 1, 255, BIT(PRINT_SCAN), },
[51] = { "AP Channel Report", print_ap_channel_report, 1, 255, BIT(PRINT_SCAN), },
[59] = { "Supported operating classes", print_supp_op_classes, 1, 255, BIT(PRINT_SCAN), },
[66] = { "Measurement Pilot Transmission", print_measurement_pilot_tx, 1, 255, BIT(PRINT_SCAN), },
[74] = { "Overlapping BSS scan params", print_obss_scan_params, 14, 255, BIT(PRINT_SCAN), },
- [61] = { "HT operation", print_ht_op, 22, 22, BIT(PRINT_SCAN), },
- [62] = { "Secondary Channel Offset", print_secchan_offs, 1, 1, BIT(PRINT_SCAN), },
- [191] = { "VHT capabilities", print_vht_capa, 12, 255, BIT(PRINT_SCAN), },
- [192] = { "VHT operation", print_vht_oper, 5, 255, BIT(PRINT_SCAN), },
- [48] = { "RSN", print_rsn, 2, 255, BIT(PRINT_SCAN), },
[50] = { "Extended supported rates", print_supprates, 0, 255, BIT(PRINT_SCAN), },
[70] = { "RM enabled capabilities", print_rm_enabled_capabilities, 5, 5, BIT(PRINT_SCAN), },
[113] = { "MESH Configuration", print_mesh_conf, 7, 7, BIT(PRINT_SCAN), },
- [114] = { "MESH ID", print_ssid, 0, 32, BIT(PRINT_SCAN) | BIT(PRINT_LINK), },
[127] = { "Extended capabilities", print_capabilities, 0, 255, BIT(PRINT_SCAN), },
[107] = { "802.11u Interworking", print_interworking, 0, 255, BIT(PRINT_SCAN), },
[108] = { "802.11u Advertisement", print_11u_advert, 0, 255, BIT(PRINT_SCAN), },
[111] = { "802.11u Roaming Consortium", print_11u_rcon, 2, 255, BIT(PRINT_SCAN), },
[195] = { "Transmit Power Envelope", print_tx_power_envelope, 2, 5, BIT(PRINT_SCAN), },
[EID_SUPP_RATES] = { "Supported rates", print_supprates, 0, 255, BIT(PRINT_SCAN), },
[EID_DS_PARAMS] = { "DS Parameter set", print_ds, 1, 1, BIT(PRINT_SCAN), },
[EID_TIM] = { "TIM", print_tim, 4, 255, BIT(PRINT_SCAN), },
[EID_IBSS_TIM_PARAMS] = { "IBSS ATIM window", print_ibssatim, 2, 2, BIT(PRINT_SCAN), },
[EID_COUNTRY] = { "Country", print_country, 3, 255, BIT(PRINT_SCAN), },
- [EID_BSS_LOAD] = { "BSS Load", print_bss_load, 5, 5, BIT(PRINT_SCAN), },
[EID_POWER_CONSTRAINT] = { "Power constraint", print_powerconstraint,
1, 1, BIT(PRINT_SCAN), },
[EID_TPC_REPORT] = { "TPC report", print_tpcreport, 2, 2, BIT(PRINT_SCAN), },
[EID_ERP_INFO] = { "ERP", print_erp, 1, 255, BIT(PRINT_SCAN), },
- [EID_HT_CAPABILITY] = { "HT capabilities", print_ht_capa, 26, 26, BIT(PRINT_SCAN), },
[EID_ERP_D4_0] = { "ERP D4.0", print_erp, 1, 255, BIT(PRINT_SCAN), },
[EID_AP_CHAN_REPORT] = { "AP Channel Report", print_ap_channel_report,
1, 255, BIT(PRINT_SCAN), },
@@ -1828,18 +1839,11 @@ static const struct ie_print ieprinters[
print_measurement_pilot_tx, 1, 255, BIT(PRINT_SCAN), },
[EID_OVERLAP_BSS_SCAN_PARAM] = { "Overlapping BSS scan params",
print_obss_scan_params, 14, 255, BIT(PRINT_SCAN), },
- [EID_HT_OPERATION] = { "HT operation", print_ht_op, 22, 22, BIT(PRINT_SCAN), },
- [EID_SECONDARY_CH_OFFSET] = { "Secondary Channel Offset",
- print_secchan_offs, 1, 1, BIT(PRINT_SCAN), },
- [EID_VHT_CAPABILITY] = { "VHT capabilities", print_vht_capa, 12, 255, BIT(PRINT_SCAN), },
- [EID_VHT_OPERATION] = { "VHT operation", print_vht_oper, 5, 255, BIT(PRINT_SCAN), },
- [EID_RSN] = { "RSN", print_rsn, 2, 255, BIT(PRINT_SCAN), },
[EID_EXT_SUPP_RATES] = { "Extended supported rates", print_supprates,
0, 255, BIT(PRINT_SCAN), },
[EID_RM_ENABLED_CAPABILITIES] = { "RM enabled capabilities",
print_rm_enabled_capabilities, 5, 5, BIT(PRINT_SCAN), },
[EID_MESH_CONFIG] = { "MESH Configuration", print_mesh_conf, 7, 7, BIT(PRINT_SCAN), },
- [EID_MESH_ID] = { "MESH ID", print_ssid, 0, 32, BIT(PRINT_SCAN) | BIT(PRINT_LINK), },
[EID_EXT_CAPABILITY] = { "Extended capabilities", print_capabilities,
0, 255, BIT(PRINT_SCAN), },
[EID_INTERWORKING] = { "802.11u Interworking", print_interworking,
@@ -1854,6 +1858,7 @@ static const struct ie_print ieprinters[
print_short_beacon_int, 2, 2, BIT(PRINT_SCAN), },
[EID_S1G_CAPABILITY] = { "S1G capabilities", print_s1g_capa, 15, 15, BIT(PRINT_SCAN), },
[EID_S1G_OPERATION] = { "S1G operation", print_s1g_oper, 6, 6, BIT(PRINT_SCAN), },
+#endif
};
static void print_wifi_wpa(const uint8_t type, uint8_t len, const uint8_t *data,
@@ -2080,8 +2085,10 @@ static void print_wifi_wps(const uint8_t
@@ -2189,8 +2194,10 @@ static void print_wifi_wps(const uint8_t
static const struct ie_print wifiprinters[] = {
[1] = { "WPA", print_wifi_wpa, 2, 255, BIT(PRINT_SCAN), },
@@ -196,7 +208,7 @@
};
static inline void print_p2p(const uint8_t type, uint8_t len,
@@ -2244,6 +2251,10 @@ static void print_vendor(unsigned char l
@@ -2353,6 +2360,10 @@ static void print_vendor(unsigned char l
return;
}
@@ -207,7 +219,7 @@
if (len >= 4 && memcmp(data, wfa_oui, 3) == 0) {
if (data[3] < ARRAY_SIZE(wfa_printers) &&
wfa_printers[data[3]].name &&
@@ -2377,6 +2388,7 @@ static void print_capa_non_dmg(__u16 cap
@@ -2544,6 +2555,7 @@ static void print_capa_non_dmg(__u16 cap
printf(" ESS");
if (capa & WLAN_CAPABILITY_IBSS)
printf(" IBSS");
@@ -215,7 +227,7 @@
if (capa & WLAN_CAPABILITY_CF_POLLABLE)
printf(" CfPollable");
if (capa & WLAN_CAPABILITY_CF_POLL_REQUEST)
@@ -2405,6 +2417,7 @@ static void print_capa_non_dmg(__u16 cap
@@ -2572,6 +2584,7 @@ static void print_capa_non_dmg(__u16 cap
printf(" DelayedBACK");
if (capa & WLAN_CAPABILITY_IMM_BACK)
printf(" ImmediateBACK");
@@ -223,10 +235,10 @@
}
static int print_bss_handler(struct nl_msg *msg, void *arg)
@@ -2489,8 +2502,10 @@ static int print_bss_handler(struct nl_m
if (bss[NL80211_BSS_FREQUENCY]) {
int freq = nla_get_u32(bss[NL80211_BSS_FREQUENCY]);
@@ -2662,8 +2675,10 @@ static int print_bss_handler(struct nl_m
else
printf("\tfreq: %d\n", freq);
+#ifdef IW_FULL
if (freq > 45000)
is_dmg = true;
@@ -234,7 +246,7 @@
}
if (bss[NL80211_BSS_BEACON_INTERVAL])
printf("\tbeacon interval: %d TUs\n",
@@ -2684,6 +2699,7 @@ static int handle_stop_sched_scan(struct
@@ -2857,6 +2872,7 @@ static int handle_stop_sched_scan(struct
return 0;
}
@@ -242,7 +254,7 @@
COMMAND(scan, sched_start,
SCHED_SCAN_OPTIONS,
NL80211_CMD_START_SCHED_SCAN, 0, CIB_NETDEV, handle_start_sched_scan,
@@ -2694,3 +2710,4 @@ COMMAND(scan, sched_start,
@@ -2867,3 +2883,4 @@ COMMAND(scan, sched_start,
COMMAND(scan, sched_stop, "",
NL80211_CMD_STOP_SCHED_SCAN, 0, CIB_NETDEV, handle_stop_sched_scan,
"Stop an ongoing scheduled scan.");
@@ -265,7 +277,7 @@
int ieee80211_channel_to_frequency(int chan, enum nl80211_band band)
{
@@ -311,6 +313,9 @@ int parse_keys(struct nl_msg *msg, char
@@ -313,6 +315,9 @@ int parse_keys(struct nl_msg *msg, char
char keybuf[13];
int pos = 0;
@@ -277,7 +289,7 @@
--- a/Makefile
+++ b/Makefile
@@ -23,6 +23,12 @@ _OBJS := $(sort $(patsubst %.c,%.o,$(wil
@@ -24,6 +24,12 @@ _OBJS := $(sort $(patsubst %.c,%.o,$(wil
VERSION_OBJS := $(filter-out version.o, $(_OBJS))
OBJS := $(VERSION_OBJS) version.o
@@ -292,7 +304,7 @@
ifeq ($(NO_PKG_CONFIG),)
--- a/station.c
+++ b/station.c
@@ -791,10 +791,12 @@ static int handle_station_set_plink(stru
@@ -801,10 +801,12 @@ static int handle_station_set_plink(stru
nla_put_failure:
return -ENOBUFS;
}
@@ -305,7 +317,7 @@
static int handle_station_set_vlan(struct nl80211_state *state,
struct nl_msg *msg,
@@ -889,11 +891,13 @@ static int handle_station_set_mesh_power
@@ -899,11 +901,13 @@ static int handle_station_set_mesh_power
nla_put_failure:
return -ENOBUFS;
}
@@ -321,7 +333,7 @@
struct nl_msg *msg,
--- a/interface.c
+++ b/interface.c
@@ -629,9 +629,11 @@ static int handle_interface_wds_peer(str
@@ -668,9 +668,11 @@ static int handle_interface_wds_peer(str
nla_put_failure:
return -ENOBUFS;
}
@@ -333,7 +345,7 @@
static int set_mcast_rate(struct nl80211_state *state,
struct nl_msg *msg,
@@ -721,6 +723,7 @@ static int handle_chan(struct nl80211_st
@@ -760,6 +762,7 @@ static int handle_chan(struct nl80211_st
return handle_chanfreq(state, msg, true, argc, argv, id);
}
@@ -341,14 +353,14 @@
SECTION(switch);
COMMAND(switch, freq,
"<freq> [NOHT|HT20|HT40+|HT40-|5MHz|10MHz|80MHz] [beacons <count>] [block-tx]\n"
@@ -992,3 +995,4 @@ COMMAND(set, tidconf, "[peer <MAC addres
@@ -1031,3 +1034,4 @@ COMMAND(set, tidconf, "[peer <MAC addres
" $ iw dev wlan0 set tidconf peer xx:xx:xx:xx:xx:xx tids 0x2 bitrates auto\n"
" $ iw dev wlan0 set tidconf peer xx:xx:xx:xx:xx:xx tids 0x2 bitrates limit vht-mcs-5 4:9\n"
);
+#endif
--- a/phy.c
+++ b/phy.c
@@ -369,6 +369,7 @@ err_out:
@@ -403,6 +403,7 @@ err_out:
free(cac_trigger_argv);
return err;
}
@@ -356,9 +368,9 @@
TOPLEVEL(cac, "channel <channel> [NOHT|HT20|HT40+|HT40-|5MHz|10MHz|80MHz]\n"
"freq <freq> [NOHT|HT20|HT40+|HT40-|5MHz|10MHz|80MHz]\n"
"freq <control freq> [5|10|20|40|80|80+80|160] [<center1_freq> [<center2_freq>]]",
@@ -380,6 +381,7 @@ COMMAND(cac, trigger,
NL80211_CMD_RADAR_DETECT, 0, CIB_NETDEV, handle_cac_trigger,
"Start or trigger a channel availability check (CAC) looking to look for\n"
@@ -422,6 +423,7 @@ COMMAND(cac, background,
NL80211_CMD_RADAR_DETECT, 0, CIB_NETDEV, handle_cac_background,
"Start background channel availability check (CAC) looking to look for\n"
"radars on the given channel.");
+#endif

View File

@@ -0,0 +1,252 @@
--- a/info.c
+++ b/info.c
@@ -295,6 +295,151 @@ static void print_pmsr_capabilities(stru
}
}
+static void print_interface_combinations(struct nlattr *ifcomb, bool radio)
+{
+ const char *indent = radio ? "\t" : "";
+ struct nlattr *nl_combi;
+ bool have_combinations = false;
+ int rem;
+
+ nla_for_each_nested(nl_combi, ifcomb, rem) {
+ static struct nla_policy iface_combination_policy[NUM_NL80211_IFACE_COMB] = {
+ [NL80211_IFACE_COMB_LIMITS] = { .type = NLA_NESTED },
+ [NL80211_IFACE_COMB_MAXNUM] = { .type = NLA_U32 },
+ [NL80211_IFACE_COMB_STA_AP_BI_MATCH] = { .type = NLA_FLAG },
+ [NL80211_IFACE_COMB_NUM_CHANNELS] = { .type = NLA_U32 },
+ [NL80211_IFACE_COMB_RADAR_DETECT_WIDTHS] = { .type = NLA_U32 },
+ };
+ struct nlattr *tb_comb[NUM_NL80211_IFACE_COMB];
+ static struct nla_policy iface_limit_policy[NUM_NL80211_IFACE_LIMIT] = {
+ [NL80211_IFACE_LIMIT_TYPES] = { .type = NLA_NESTED },
+ [NL80211_IFACE_LIMIT_MAX] = { .type = NLA_U32 },
+ };
+ struct nlattr *tb_limit[NUM_NL80211_IFACE_LIMIT];
+ struct nlattr *nl_limit;
+ int err, rem_limit;
+ bool comma = false;
+
+ if (radio && nla_type(nl_combi) !=
+ NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION)
+ continue;
+
+ if (!have_combinations) {
+ printf("\t%svalid interface combinations:\n", indent);
+ have_combinations = true;
+ }
+
+ printf("\t\t%s * ", indent);
+
+ err = nla_parse_nested(tb_comb, MAX_NL80211_IFACE_COMB,
+ nl_combi, iface_combination_policy);
+ if (err || !tb_comb[NL80211_IFACE_COMB_LIMITS] ||
+ !tb_comb[NL80211_IFACE_COMB_MAXNUM] ||
+ !tb_comb[NL80211_IFACE_COMB_NUM_CHANNELS]) {
+ printf(" <failed to parse>\n");
+ goto broken_combination;
+ }
+
+ nla_for_each_nested(nl_limit, tb_comb[NL80211_IFACE_COMB_LIMITS], rem_limit) {
+ err = nla_parse_nested(tb_limit, MAX_NL80211_IFACE_LIMIT,
+ nl_limit, iface_limit_policy);
+ if (err || !tb_limit[NL80211_IFACE_LIMIT_TYPES]) {
+ printf("<failed to parse>\n");
+ goto broken_combination;
+ }
+
+ if (comma)
+ printf(", ");
+ comma = true;
+ printf("#{ ");
+ print_iftype_line(tb_limit[NL80211_IFACE_LIMIT_TYPES]);
+ printf(" } <= %u", nla_get_u32(tb_limit[NL80211_IFACE_LIMIT_MAX]));
+ }
+ printf(",\n\t\t%s ", indent);
+
+ printf("total <= %d, #channels <= %d%s",
+ nla_get_u32(tb_comb[NL80211_IFACE_COMB_MAXNUM]),
+ nla_get_u32(tb_comb[NL80211_IFACE_COMB_NUM_CHANNELS]),
+ tb_comb[NL80211_IFACE_COMB_STA_AP_BI_MATCH] ?
+ ", STA/AP BI must match" : "");
+ if (tb_comb[NL80211_IFACE_COMB_RADAR_DETECT_WIDTHS]) {
+ unsigned long widths = nla_get_u32(tb_comb[NL80211_IFACE_COMB_RADAR_DETECT_WIDTHS]);
+
+ if (widths) {
+ int width;
+ bool first = true;
+
+ printf(", radar detect widths: {");
+ for (width = 0; width < 32; width++)
+ if (widths & (1 << width)) {
+ printf("%s %s",
+ first ? "":",",
+ channel_width_name(width));
+ first = false;
+ }
+ printf(" }\n");
+ }
+ }
+ printf("\n");
+broken_combination:
+ ;
+ }
+
+ if (!have_combinations)
+ printf("\t%sinterface combinations are not supported\n", indent);
+}
+
+static void print_radio_freq(struct nlattr *freqs)
+{
+ struct nlattr *freq;
+ int rem;
+
+ nla_for_each_nested(freq, freqs, rem) {
+ static struct nla_policy freq_policy[NL80211_WIPHY_RADIO_FREQ_ATTR_MAX + 1] = {
+ [NL80211_WIPHY_RADIO_FREQ_ATTR_START] = { .type = NLA_U32 },
+ [NL80211_WIPHY_RADIO_FREQ_ATTR_END] = { .type = NLA_U32 },
+ };
+ struct nlattr *tb[NL80211_WIPHY_RADIO_FREQ_ATTR_MAX + 1];
+ uint32_t start, end;
+
+ if (nla_type(freq) != NL80211_WIPHY_RADIO_ATTR_FREQ_RANGE)
+ continue;
+
+ if (nla_parse_nested(tb, NL80211_WIPHY_RADIO_ATTR_MAX + 1,
+ freq, freq_policy) ||
+ !tb[NL80211_WIPHY_RADIO_FREQ_ATTR_START] ||
+ !tb[NL80211_WIPHY_RADIO_FREQ_ATTR_END])
+ continue;
+
+ start = nla_get_u32(tb[NL80211_WIPHY_RADIO_FREQ_ATTR_START]);
+ end = nla_get_u32(tb[NL80211_WIPHY_RADIO_FREQ_ATTR_END]);
+
+ printf("\t\tfreq range: %.1f MHz - %.1f MHz\n", (float)start / 1000, (float)end / 1000);
+ }
+}
+
+static void print_radios(struct nlattr *radios)
+{
+ struct nlattr *radio;
+ int rem, idx = 0;
+
+ nla_for_each_nested(radio, radios, rem) {
+ static struct nla_policy radio_policy[NL80211_WIPHY_RADIO_ATTR_MAX + 1] = {
+ [NL80211_WIPHY_RADIO_ATTR_INDEX] = { .type = NLA_U32 },
+ };
+ struct nlattr *tb[NL80211_WIPHY_RADIO_ATTR_MAX + 1];
+
+ if (nla_parse_nested(tb, NL80211_WIPHY_RADIO_ATTR_MAX + 1,
+ radio, radio_policy) ||
+ !tb[NL80211_WIPHY_RADIO_ATTR_INDEX])
+ continue;
+
+ printf("\twiphy radio %d:\n", nla_get_u32(tb[NL80211_WIPHY_RADIO_ATTR_INDEX]));
+ print_radio_freq(radio);
+ print_interface_combinations(radio, true);
+ }
+}
+
static int print_phy_handler(struct nl_msg *msg, void *arg)
{
struct nlattr *tb_msg[NL80211_ATTR_MAX + 1];
@@ -565,93 +710,11 @@ next:
"\t\t", tb_msg[NL80211_ATTR_SOFTWARE_IFTYPES]);
#endif
- if (tb_msg[NL80211_ATTR_INTERFACE_COMBINATIONS]) {
- struct nlattr *nl_combi;
- int rem_combi;
- bool have_combinations = false;
-
- nla_for_each_nested(nl_combi, tb_msg[NL80211_ATTR_INTERFACE_COMBINATIONS], rem_combi) {
- static struct nla_policy iface_combination_policy[NUM_NL80211_IFACE_COMB] = {
- [NL80211_IFACE_COMB_LIMITS] = { .type = NLA_NESTED },
- [NL80211_IFACE_COMB_MAXNUM] = { .type = NLA_U32 },
- [NL80211_IFACE_COMB_STA_AP_BI_MATCH] = { .type = NLA_FLAG },
- [NL80211_IFACE_COMB_NUM_CHANNELS] = { .type = NLA_U32 },
- [NL80211_IFACE_COMB_RADAR_DETECT_WIDTHS] = { .type = NLA_U32 },
- };
- struct nlattr *tb_comb[NUM_NL80211_IFACE_COMB];
- static struct nla_policy iface_limit_policy[NUM_NL80211_IFACE_LIMIT] = {
- [NL80211_IFACE_LIMIT_TYPES] = { .type = NLA_NESTED },
- [NL80211_IFACE_LIMIT_MAX] = { .type = NLA_U32 },
- };
- struct nlattr *tb_limit[NUM_NL80211_IFACE_LIMIT];
- struct nlattr *nl_limit;
- int err, rem_limit;
- bool comma = false;
-
- if (!have_combinations) {
- printf("\tvalid interface combinations:\n");
- have_combinations = true;
- }
-
- printf("\t\t * ");
+ if (tb_msg[NL80211_ATTR_INTERFACE_COMBINATIONS])
+ print_interface_combinations(tb_msg[NL80211_ATTR_INTERFACE_COMBINATIONS], false);
- err = nla_parse_nested(tb_comb, MAX_NL80211_IFACE_COMB,
- nl_combi, iface_combination_policy);
- if (err || !tb_comb[NL80211_IFACE_COMB_LIMITS] ||
- !tb_comb[NL80211_IFACE_COMB_MAXNUM] ||
- !tb_comb[NL80211_IFACE_COMB_NUM_CHANNELS]) {
- printf(" <failed to parse>\n");
- goto broken_combination;
- }
-
- nla_for_each_nested(nl_limit, tb_comb[NL80211_IFACE_COMB_LIMITS], rem_limit) {
- err = nla_parse_nested(tb_limit, MAX_NL80211_IFACE_LIMIT,
- nl_limit, iface_limit_policy);
- if (err || !tb_limit[NL80211_IFACE_LIMIT_TYPES]) {
- printf("<failed to parse>\n");
- goto broken_combination;
- }
-
- if (comma)
- printf(", ");
- comma = true;
- printf("#{ ");
- print_iftype_line(tb_limit[NL80211_IFACE_LIMIT_TYPES]);
- printf(" } <= %u", nla_get_u32(tb_limit[NL80211_IFACE_LIMIT_MAX]));
- }
- printf(",\n\t\t ");
-
- printf("total <= %d, #channels <= %d%s",
- nla_get_u32(tb_comb[NL80211_IFACE_COMB_MAXNUM]),
- nla_get_u32(tb_comb[NL80211_IFACE_COMB_NUM_CHANNELS]),
- tb_comb[NL80211_IFACE_COMB_STA_AP_BI_MATCH] ?
- ", STA/AP BI must match" : "");
- if (tb_comb[NL80211_IFACE_COMB_RADAR_DETECT_WIDTHS]) {
- unsigned long widths = nla_get_u32(tb_comb[NL80211_IFACE_COMB_RADAR_DETECT_WIDTHS]);
-
- if (widths) {
- int width;
- bool first = true;
-
- printf(", radar detect widths: {");
- for (width = 0; width < 32; width++)
- if (widths & (1 << width)) {
- printf("%s %s",
- first ? "":",",
- channel_width_name(width));
- first = false;
- }
- printf(" }\n");
- }
- }
- printf("\n");
-broken_combination:
- ;
- }
-
- if (!have_combinations)
- printf("\tinterface combinations are not supported\n");
- }
+ if (tb_msg[NL80211_ATTR_WIPHY_RADIOS])
+ print_radios(tb_msg[NL80211_ATTR_WIPHY_RADIOS]);
#ifdef IW_FULL
if (tb_msg[NL80211_ATTR_SUPPORTED_COMMANDS]) {

View File

@@ -0,0 +1,99 @@
--- a/interface.c
+++ b/interface.c
@@ -226,6 +226,43 @@ nla_put_failure:
return 1;
}
+static int parse_radio_list(char *str, struct nl_msg *msg)
+{
+ unsigned int mask = 0;
+ unsigned long id;
+ char *end;
+
+ if (!str)
+ return 1;
+
+ if (!strcmp(str, "all"))
+ goto out;
+
+ while (1) {
+ if (!*str)
+ return 1;
+
+ id = strtoul(str, &end, 0);
+ if (id > 31)
+ return 1;
+
+ mask |= 1 << id;
+ if (!*end)
+ break;
+
+ if (end == str || *end != ',')
+ return 1;
+
+ str = end + 1;
+ }
+
+out:
+ NLA_PUT_U32(msg, NL80211_ATTR_VIF_RADIO_MASK, mask);
+ return 0;
+nla_put_failure:
+ return 1;
+}
+
static int handle_interface_add(struct nl80211_state *state,
struct nl_msg *msg,
int argc, char **argv,
@@ -287,6 +324,15 @@ try_another:
fprintf(stderr, "flags error\n");
return 2;
}
+ } else if (strcmp(argv[0], "radios") == 0) {
+ argc--;
+ argv++;
+ if (parse_radio_list(argv[0], msg)) {
+ fprintf(stderr, "Invalid radio list\n");
+ return 2;
+ }
+ argc--;
+ argv++;
} else {
return 1;
}
@@ -306,14 +352,14 @@ try_another:
nla_put_failure:
return -ENOBUFS;
}
-COMMAND(interface, add, "<name> type <type> [mesh_id <meshid>] [4addr on|off] [flags <flag>*] [addr <mac-addr>]",
+COMMAND(interface, add, "<name> type <type> [mesh_id <meshid>] [4addr on|off] [flags <flag>*] [addr <mac-addr>] [radios all|<id>[,<id>...]]",
NL80211_CMD_NEW_INTERFACE, 0, CIB_PHY, handle_interface_add,
"Add a new virtual interface with the given configuration.\n"
IFACE_TYPES "\n\n"
"The flags are only used for monitor interfaces, valid flags are:\n"
VALID_FLAGS "\n\n"
"The mesh_id is used only for mesh mode.");
-COMMAND(interface, add, "<name> type <type> [mesh_id <meshid>] [4addr on|off] [flags <flag>*] [addr <mac-addr>]",
+COMMAND(interface, add, "<name> type <type> [mesh_id <meshid>] [4addr on|off] [flags <flag>*] [addr <mac-addr>] [radios all|<id>[,<id>...]]",
NL80211_CMD_NEW_INTERFACE, 0, CIB_NETDEV, handle_interface_add, NULL);
static int handle_interface_del(struct nl80211_state *state,
@@ -493,6 +539,19 @@ static int print_iface_handler(struct nl
printf("\n");
}
}
+
+ if (tb_msg[NL80211_ATTR_VIF_RADIO_MASK]) {
+ uint32_t mask = nla_get_u32(tb_msg[NL80211_ATTR_VIF_RADIO_MASK]);
+ int i;
+
+ if (mask) {
+ printf("%s\tRadios:", indent);
+ for (i = 0; mask; i++, mask >>= 1)
+ if (mask & 1)
+ printf(" %d", i);
+ printf("\n");
+ }
+ }
return NL_SKIP;
}

View File

@@ -8,7 +8,8 @@ SUBTARGETS:=generic mikrotik nand tiny
FEATURES:=ramdisk squashfs usbgadget
KERNEL_PATCHVER:=5.10
KERNEL_PATCHVER:=6.6
KERNEL_TESTING_PATCHVER:=5.15
include $(INCLUDE_DIR)/target.mk

View File

@@ -0,0 +1,222 @@
# CONFIG_AG71XX is not set
CONFIG_AG71XX_LEGACY=y
# CONFIG_AG71XX_LEGACY_DEBUG is not set
CONFIG_AG71XX_LEGACY_DEBUG_FS=y
CONFIG_AR8216_PHY=y
CONFIG_AR8216_PHY_LEDS=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_AT803X_PHY=y
CONFIG_ATH79=y
CONFIG_ATH79_WDT=y
CONFIG_BLK_MQ_PCI=y
CONFIG_CEVT_R4K=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_COMMON_CLK=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FIXED_PHY=y
CONFIG_FORCE_NR_CPUS=y
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_74X164=y
CONFIG_GPIO_ATH79=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
# CONFIG_GPIO_LATCH_MIKROTIK is not set
# CONFIG_GPIO_RB91X_KEY is not set
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HZ_PERIODIC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_RESET is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_GPIO=y
# CONFIG_MFD_RB4XX_CPLD is not set
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CMDLINE_FROM_DTB=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I2 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
CONFIG_MTD_PARSER_CYBERTAN=y
# CONFIG_MTD_PARSER_TPLINK_SAFELOADER is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_ELF_FW=y
CONFIG_MTD_SPLIT_LZMA_FW=y
CONFIG_MTD_SPLIT_SEAMA_FW=y
CONFIG_MTD_SPLIT_TPLINK_FW=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_MTD_SPLIT_WRGG_FW=y
CONFIG_MTD_VIRT_CONCAT=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_EGRESS=y
CONFIG_NET_INGRESS=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI=y
CONFIG_PCI_AR71XX=y
CONFIG_PCI_AR724X=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
# CONFIG_PHY_AR7100_USB is not set
# CONFIG_PHY_AR7200_USB is not set
# CONFIG_PHY_ATH79_USB is not set
CONFIG_PINCTRL=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QCOM_NET_PHYLIB=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_RESET_ATH79=y
CONFIG_RESET_CONTROLLER=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
CONFIG_SERIAL_AR933X=y
CONFIG_SERIAL_AR933X_CONSOLE=y
CONFIG_SERIAL_AR933X_NR_UARTS=2
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SPI=y
CONFIG_SPI_AR934X=y
CONFIG_SPI_ATH79=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
# CONFIG_SPI_RB4XX is not set
# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set
CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y
CONFIG_SQUASHFS_DECOMP_SINGLE=y
CONFIG_SWCONFIG=y
CONFIG_SWCONFIG_LEDS=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y
CONFIG_TARGET_ISA_REV=2
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
CONFIG_ZBOOT_LOAD_ADDRESS=0x0

View File

@@ -12,7 +12,7 @@ define Build/netgear-squashfs
rm -rf $@.fs $@.squashfs
mkdir -p $@.fs/image
cp $@ $@.fs/image/uImage
$(STAGING_DIR_HOST)/bin/mksquashfs-lzma \
$(STAGING_DIR_HOST)/bin/mksquashfs3-lzma \
$@.fs $@.squashfs -be \
-noappend -root-owned -b 65536 \
$(if $(SOURCE_DATE_EPOCH),-fixed-time $(SOURCE_DATE_EPOCH))

View File

@@ -0,0 +1,32 @@
From 9a473c2a093e0d1c466bf86073230e2c8b658977 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Wed, 26 Jun 2024 08:33:18 +0800
Subject: gpio: ath79: convert to dynamic GPIO base allocation
ath79 target has already been converted to device tree based platform.
Use dynamic GPIO numberspace base to suppress the warning:
gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation.
Tested on Atheros AR7241 and AR9344.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Suggested-by: Jonas Gorski <jonas.gorski@gmail.com>
Link: https://lore.kernel.org/r/TYCP286MB089598EA71E964BD8AB9EFD3BCD62@TYCP286MB0895.JPNP286.PROD.OUTLOOK.COM
[Bartosz: tweaked the commit message]
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
drivers/gpio/gpio-ath79.c | 2 --
1 file changed, 2 deletions(-)
--- a/drivers/gpio/gpio-ath79.c
+++ b/drivers/gpio/gpio-ath79.c
@@ -273,8 +273,6 @@ static int ath79_gpio_probe(struct platf
dev_err(dev, "bgpio_init failed\n");
return err;
}
- /* Use base 0 to stay compatible with legacy platforms */
- ctrl->gc.base = 0;
/* Optional interrupt setup */
if (!np || of_property_read_bool(np, "interrupt-controller")) {

View File

@@ -0,0 +1,33 @@
From 661edfc3dab943a67c8821353b63cc23057f7ce9 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Tue, 9 Jan 2024 20:48:46 +0100
Subject: [PATCH] reset: ath79: read back reset register
Read back the reset register in order to flush the cache. This fixes
spurious reboot hangs on TP-Link TL-WDR3600 and TL-WDR4300 with Zentel
DRAM chips.
This issue was fixed in the past, but switching to the reset-driver
specific implementation removed the old fix.
Link: https://github.com/freifunk-gluon/gluon/issues/2904
Link: https://github.com/openwrt/openwrt/issues/13043
Link: https://dev.archive.openwrt.org/ticket/17839
Link: f8a7bfe1cb2c ("MIPS: ath79: fix system restart")
Signed-off-by: David Bauer <mail@david-bauer.net>
---
drivers/reset/reset-ath79.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/reset/reset-ath79.c
+++ b/drivers/reset/reset-ath79.c
@@ -37,6 +37,8 @@ static int ath79_reset_update(struct res
else
val &= ~BIT(id);
writel(val, ath79_reset->base);
+ /* Flush cache */
+ readl(ath79_reset->base);
spin_unlock_irqrestore(&ath79_reset->lock, flags);
return 0;

View File

@@ -0,0 +1,105 @@
From: David Bauer <mail@david-bauer.net>
Date: Tue, 2 Jan 2025 19:22:40 +0100
Subject: [PATCH] reset: ath79: reset ETH switch for AR9344
According to datasheet, on AR9344 the switch and switch analog need to
be reset first before initiating a full reset.
Resetting these systems fixes spurious reset hangs on Atheros AR9344
SoCs.
Link: https://github.com/freifunk-gluon/gluon/issues/2904
Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/drivers/reset/reset-ath79.c
+++ b/drivers/reset/reset-ath79.c
@@ -12,8 +12,11 @@
#include <linux/platform_device.h>
#include <linux/reset-controller.h>
#include <linux/reboot.h>
+#include <linux/delay.h>
+#include <linux/of.h>
struct ath79_reset {
+ struct platform_device *pdev;
struct reset_controller_dev rcdev;
struct notifier_block restart_nb;
void __iomem *base;
@@ -21,16 +24,13 @@ struct ath79_reset {
};
#define FULL_CHIP_RESET 24
+#define ETH_SWITCH_RESET 8
+#define ETH_SWITCH_ARESET 12
-static int ath79_reset_update(struct reset_controller_dev *rcdev,
+static void __ath79_reset_update_unlocked(struct ath79_reset *ath79_reset,
unsigned long id, bool assert)
{
- struct ath79_reset *ath79_reset =
- container_of(rcdev, struct ath79_reset, rcdev);
- unsigned long flags;
u32 val;
-
- spin_lock_irqsave(&ath79_reset->lock, flags);
val = readl(ath79_reset->base);
if (assert)
val |= BIT(id);
@@ -39,6 +39,17 @@ static int ath79_reset_update(struct res
writel(val, ath79_reset->base);
/* Flush cache */
readl(ath79_reset->base);
+}
+
+static int ath79_reset_update(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ struct ath79_reset *ath79_reset =
+ container_of(rcdev, struct ath79_reset, rcdev);
+ unsigned long flags;
+
+ spin_lock_irqsave(&ath79_reset->lock, flags);
+ __ath79_reset_update_unlocked(ath79_reset, id, assert);
spin_unlock_irqrestore(&ath79_reset->lock, flags);
return 0;
@@ -79,8 +90,28 @@ static int ath79_reset_restart_handler(s
{
struct ath79_reset *ath79_reset =
container_of(nb, struct ath79_reset, restart_nb);
+ unsigned long flags;
- ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
+ spin_lock_irqsave(&ath79_reset->lock, flags);
+
+ if (of_device_is_compatible(ath79_reset->pdev->dev.of_node, "qca,ar9340-reset")) {
+ /**
+ * AR9344 has been observed to hang on reboot in rare cases.
+ *
+ * Datasheet states to reset the ETH switch systems before asserting
+ * full chip reset. See page 111 of the AR9344 datasheet.
+ */
+ __ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_RESET, true);
+ mdelay(1);
+ __ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_ARESET, true);
+ mdelay(1);
+ __ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
+ mdelay(10);
+ } else {
+ __ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
+ }
+
+ spin_unlock_irqrestore(&ath79_reset->lock, flags);
return NOTIFY_DONE;
}
@@ -95,6 +126,8 @@ static int ath79_reset_probe(struct plat
if (!ath79_reset)
return -ENOMEM;
+ ath79_reset->pdev = pdev;
+
ath79_reset->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(ath79_reset->base))
return PTR_ERR(ath79_reset->base);

View File

@@ -0,0 +1,168 @@
From f3eacff2310a60348a755c50a8da6fc251fc8587 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 09:55:13 +0100
Subject: [PATCH 07/33] irqchip/irq-ath79-intc: add irq cascade driver for
QCA9556 SoCs
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ath79-intc.c | 142 +++++++++++++++++++++++++++++++++++++++
2 files changed, 143 insertions(+)
create mode 100644 drivers/irqchip/irq-ath79-intc.c
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -4,6 +4,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o
obj-$(CONFIG_AL_FIC) += irq-al-fic.o
obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
+obj-$(CONFIG_ATH79) += irq-ath79-intc.o
obj-$(CONFIG_ATH79) += irq-ath79-misc.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
--- /dev/null
+++ b/drivers/irqchip/irq-ath79-intc.c
@@ -0,0 +1,142 @@
+/*
+ * Atheros AR71xx/AR724x/AR913x specific interrupt handling
+ *
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/irqchip.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#define ATH79_MAX_INTC_CASCADE 3
+
+struct ath79_intc {
+ struct irq_chip chip;
+ u32 irq;
+ u32 pending_mask;
+ u32 int_status;
+ u32 irq_mask[ATH79_MAX_INTC_CASCADE];
+ u32 irq_wb_chan[ATH79_MAX_INTC_CASCADE];
+};
+
+static void ath79_intc_irq_handler(struct irq_desc *desc)
+{
+ struct irq_domain *domain = irq_desc_get_handler_data(desc);
+ struct ath79_intc *intc = domain->host_data;
+ u32 pending;
+
+ pending = ath79_reset_rr(intc->int_status);
+ pending &= intc->pending_mask;
+
+ if (pending) {
+ int i;
+
+ for (i = 0; i < domain->hwirq_max; i++)
+ if (pending & intc->irq_mask[i]) {
+ if (intc->irq_wb_chan[i] != 0xffffffff)
+ ath79_ddr_wb_flush(intc->irq_wb_chan[i]);
+ generic_handle_irq(irq_find_mapping(domain, i));
+ }
+ } else {
+ spurious_interrupt();
+ }
+}
+
+static void ath79_intc_irq_enable(struct irq_data *d)
+{
+ struct ath79_intc *intc = d->domain->host_data;
+ enable_irq(intc->irq);
+}
+
+static void ath79_intc_irq_disable(struct irq_data *d)
+{
+ struct ath79_intc *intc = d->domain->host_data;
+ disable_irq(intc->irq);
+}
+
+static int ath79_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
+{
+ struct ath79_intc *intc = d->host_data;
+
+ irq_set_chip_and_handler(irq, &intc->chip, handle_level_irq);
+
+ return 0;
+}
+
+static const struct irq_domain_ops ath79_irq_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = ath79_intc_map,
+};
+
+static int __init ath79_intc_of_init(
+ struct device_node *node, struct device_node *parent)
+{
+ struct irq_domain *domain;
+ struct ath79_intc *intc;
+ int cnt, cntwb, i, err;
+
+ cnt = of_property_count_u32_elems(node, "qca,pending-bits");
+ if (cnt > ATH79_MAX_INTC_CASCADE)
+ panic("Too many INTC pending bits\n");
+
+ intc = kzalloc(sizeof(*intc), GFP_KERNEL);
+ if (!intc)
+ panic("Failed to allocate INTC memory\n");
+ intc->chip = dummy_irq_chip;
+ intc->chip.name = "INTC";
+ intc->chip.irq_disable = ath79_intc_irq_disable;
+ intc->chip.irq_enable = ath79_intc_irq_enable;
+
+ if (of_property_read_u32(node, "qca,int-status-addr", &intc->int_status) < 0) {
+ panic("Missing address of interrupt status register\n");
+ }
+
+ of_property_read_u32_array(node, "qca,pending-bits", intc->irq_mask, cnt);
+ for (i = 0; i < cnt; i++) {
+ intc->pending_mask |= intc->irq_mask[i];
+ intc->irq_wb_chan[i] = 0xffffffff;
+ }
+
+ cntwb = of_count_phandle_with_args(
+ node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells");
+
+ for (i = 0; i < cntwb; i++) {
+ struct of_phandle_args args;
+ u32 irq = i;
+
+ of_property_read_u32_index(
+ node, "qca,ddr-wb-channel-interrupts", i, &irq);
+ if (irq >= ATH79_MAX_INTC_CASCADE)
+ continue;
+
+ err = of_parse_phandle_with_args(
+ node, "qca,ddr-wb-channels",
+ "#qca,ddr-wb-channel-cells",
+ i, &args);
+ if (err)
+ return err;
+
+ intc->irq_wb_chan[irq] = args.args[0];
+ }
+
+ intc->irq = irq_of_parse_and_map(node, 0);
+ if (!intc->irq)
+ panic("Failed to get INTC IRQ");
+
+ domain = irq_domain_add_linear(node, cnt, &ath79_irq_domain_ops, intc);
+ irq_set_chained_handler_and_data(intc->irq, ath79_intc_irq_handler, domain);
+
+ return 0;
+}
+IRQCHIP_DECLARE(ath79_intc, "qca,ar9340-intc",
+ ath79_intc_of_init);

View File

@@ -0,0 +1,23 @@
From e029f998594f151008ecbfa024e2957edd2a5189 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 09:58:19 +0100
Subject: [PATCH 08/33] irqchip/irq-ath79-cpu: drop !OF init helper
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/irqchip/irq-ath79-cpu.c | 7 -------
1 file changed, 7 deletions(-)
--- a/drivers/irqchip/irq-ath79-cpu.c
+++ b/drivers/irqchip/irq-ath79-cpu.c
@@ -85,10 +85,3 @@ static int __init ar79_cpu_intc_of_init(
}
IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar7100-cpu-intc",
ar79_cpu_intc_of_init);
-
-void __init ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3)
-{
- irq_wb_chan[2] = irq_wb_chan2;
- irq_wb_chan[3] = irq_wb_chan3;
- mips_cpu_irq_init();
-}

View File

@@ -0,0 +1,57 @@
From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Mon, 25 Jun 2018 15:52:10 +0200
Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc
With the driver being converted from platform_data to pure OF, we need to
also add some docs.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: John Crispin <john@phrozen.org>
---
.../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt
@@ -0,0 +1,38 @@
+* Qualcomm Atheros AR7100 PCI express root complex
+
+Required properties:
+- compatible: should contain "qcom,ar7100-pci" to identify the core.
+- reg: Should contain the register ranges as listed in the reg-names property.
+- reg-names: Definition: Must include the following entries
+ - "cfg_base" IO Memory
+- #address-cells: set to <3>
+- #size-cells: set to <2>
+- ranges: ranges for the PCI memory and I/O regions
+- interrupt-map-mask and interrupt-map: standard PCI
+ properties to define the mapping of the PCIe interface to interrupt
+ numbers.
+- #interrupt-cells: set to <1>
+- interrupt-controller: define to enable the builtin IRQ cascade.
+
+Optional properties:
+- interrupt-parent: phandle to the MIPS IRQ controller
+
+* Example for ar7100
+ pcie@180c0000 {
+ compatible = "qca,ar7100-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x17010000 0x100>;
+ reg-names = "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000
+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>;
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie0 0>;
+ };

View File

@@ -0,0 +1,206 @@
From 1855ab6b1d27f5b38a648baf57ff6a534afec26d Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sat, 23 Jun 2018 15:07:23 +0200
Subject: [PATCH 18/33] MIPS: pci-ar71xx: convert to OF
With the ath79 target getting converted to pure OF, we can drop all the
platform data code and add the missing OF bits to the driver. We also add
a irq domain for the PCI/e controllers cascade, thus making it usable from
dts files.
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/pci/pci-ar71xx.c | 82 +++++++++++++++++++++++-----------------------
1 file changed, 41 insertions(+), 41 deletions(-)
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -15,8 +15,11 @@
#include <linux/pci.h>
#include <linux/pci_regs.h>
#include <linux/interrupt.h>
+#include <linux/irqchip/chained_irq.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_pci.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
@@ -46,12 +49,13 @@
#define AR71XX_PCI_IRQ_COUNT 5
struct ar71xx_pci_controller {
+ struct device_node *np;
void __iomem *cfg_base;
int irq;
- int irq_base;
struct pci_controller pci_ctrl;
struct resource io_res;
struct resource mem_res;
+ struct irq_domain *domain;
};
/* Byte lane enable bits */
@@ -225,29 +229,30 @@ static struct pci_ops ar71xx_pci_ops = {
static void ar71xx_pci_irq_handler(struct irq_desc *desc)
{
- struct ar71xx_pci_controller *apc;
void __iomem *base = ath79_reset_base;
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc);
u32 pending;
- apc = irq_desc_get_handler_data(desc);
-
+ chained_irq_enter(chip, desc);
pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
__raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
if (pending & AR71XX_PCI_INT_DEV0)
- generic_handle_irq(apc->irq_base + 0);
+ generic_handle_irq(irq_linear_revmap(apc->domain, 1));
else if (pending & AR71XX_PCI_INT_DEV1)
- generic_handle_irq(apc->irq_base + 1);
+ generic_handle_irq(irq_linear_revmap(apc->domain, 2));
else if (pending & AR71XX_PCI_INT_DEV2)
- generic_handle_irq(apc->irq_base + 2);
+ generic_handle_irq(irq_linear_revmap(apc->domain, 3));
else if (pending & AR71XX_PCI_INT_CORE)
- generic_handle_irq(apc->irq_base + 4);
+ generic_handle_irq(irq_linear_revmap(apc->domain, 4));
else
spurious_interrupt();
+ chained_irq_exit(chip, desc);
}
static void ar71xx_pci_irq_unmask(struct irq_data *d)
@@ -258,7 +263,7 @@ static void ar71xx_pci_irq_unmask(struct
u32 t;
apc = irq_data_get_irq_chip_data(d);
- irq = d->irq - apc->irq_base;
+ irq = irq_linear_revmap(apc->domain, d->irq);
t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
@@ -275,7 +280,7 @@ static void ar71xx_pci_irq_mask(struct i
u32 t;
apc = irq_data_get_irq_chip_data(d);
- irq = d->irq - apc->irq_base;
+ irq = irq_linear_revmap(apc->domain, d->irq);
t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
@@ -291,24 +296,31 @@ static struct irq_chip ar71xx_pci_irq_ch
.irq_mask_ack = ar71xx_pci_irq_mask,
};
+static int ar71xx_pci_irq_map(struct irq_domain *d,
+ unsigned int irq, irq_hw_number_t hw)
+{
+ struct ar71xx_pci_controller *apc = d->host_data;
+
+ irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq);
+ irq_set_chip_data(irq, apc);
+
+ return 0;
+}
+
+static const struct irq_domain_ops ar71xx_pci_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = ar71xx_pci_irq_map,
+};
+
static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
{
void __iomem *base = ath79_reset_base;
- int i;
__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);
__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
- BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT);
-
- apc->irq_base = ATH79_PCI_IRQ_BASE;
- for (i = apc->irq_base;
- i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) {
- irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
- handle_level_irq);
- irq_set_chip_data(i, apc);
- }
-
+ apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT,
+ &ar71xx_pci_domain_ops, apc);
irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler,
apc);
}
@@ -325,10 +337,14 @@ static void ar71xx_pci_reset(void)
mdelay(100);
}
+static const struct of_device_id ar71xx_pci_ids[] = {
+ { .compatible = "qca,ar7100-pci" },
+ {},
+};
+
static int ar71xx_pci_probe(struct platform_device *pdev)
{
struct ar71xx_pci_controller *apc;
- struct resource *res;
u32 t;
apc = devm_kzalloc(&pdev->dev, sizeof(struct ar71xx_pci_controller),
@@ -345,26 +361,6 @@ static int ar71xx_pci_probe(struct platf
if (apc->irq < 0)
return -EINVAL;
- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
- if (!res)
- return -EINVAL;
-
- apc->io_res.parent = res;
- apc->io_res.name = "PCI IO space";
- apc->io_res.start = res->start;
- apc->io_res.end = res->end;
- apc->io_res.flags = IORESOURCE_IO;
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
- if (!res)
- return -EINVAL;
-
- apc->mem_res.parent = res;
- apc->mem_res.name = "PCI memory space";
- apc->mem_res.start = res->start;
- apc->mem_res.end = res->end;
- apc->mem_res.flags = IORESOURCE_MEM;
-
ar71xx_pci_reset();
/* setup COMMAND register */
@@ -377,9 +373,11 @@ static int ar71xx_pci_probe(struct platf
ar71xx_pci_irq_init(apc);
+ apc->np = pdev->dev.of_node;
apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
apc->pci_ctrl.mem_resource = &apc->mem_res;
apc->pci_ctrl.io_resource = &apc->io_res;
+ pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node);
register_pci_controller(&apc->pci_ctrl);
@@ -390,6 +388,7 @@ static struct platform_driver ar71xx_pci
.probe = ar71xx_pci_probe,
.driver = {
.name = "ar71xx-pci",
+ .of_match_table = of_match_ptr(ar71xx_pci_ids),
},
};

View File

@@ -0,0 +1,61 @@
From ea27764bc3ef2a05decf3ae05edffc289cd0d93c Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Mon, 25 Jun 2018 15:52:02 +0200
Subject: [PATCH 19/33] dt-bindings: PCI: qcom,ar7240: adds binding doc
With the driver being converted from platform_data to pure OF, we need to
also add some docs.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: John Crispin <john@phrozen.org>
---
.../devicetree/bindings/pci/qcom,ar7240-pci.txt | 42 ++++++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt
@@ -0,0 +1,42 @@
+* Qualcomm Atheros AR724X PCI express root complex
+
+Required properties:
+- compatible: should contain "qcom,ar7240-pci" to identify the core.
+- reg: Should contain the register ranges as listed in the reg-names property.
+- reg-names: Definition: Must include the following entries
+ - "crp_base" Configuration registers
+ - "ctrl_base" Control registers
+ - "cfg_base" IO Memory
+- #address-cells: set to <3>
+- #size-cells: set to <2>
+- ranges: ranges for the PCI memory and I/O regions
+- interrupt-map-mask and interrupt-map: standard PCI
+ properties to define the mapping of the PCIe interface to interrupt
+ numbers.
+- #interrupt-cells: set to <1>
+- interrupt-parent: phandle to the MIPS IRQ controller
+
+Optional properties:
+- interrupt-controller: define to enable the builtin IRQ cascade.
+
+* Example for qca9557
+ pcie@180c0000 {
+ compatible = "qcom,ar7240-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x180c0000 0x1000>,
+ <0x180f0000 0x100>,
+ <0x14000000 0x1000>;
+ reg-names = "crp_base", "ctrl_base", "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000
+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>;
+ interrupt-parent = <&intc2>;
+ interrupts = <1>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie0 0>;
+ };

View File

@@ -0,0 +1,213 @@
From a522ee0199d5d3ea114ca2e211f6ac398d3e8e0b Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sat, 23 Jun 2018 15:07:37 +0200
Subject: [PATCH 20/33] MIPS: pci-ar724x: convert to OF
With the ath79 target getting converted to pure OF, we can drop all the
platform data code and add the missing OF bits to the driver. We also add
a irq domain for the PCI/e controllers cascade, thus making it usable from
dts files.
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/pci/pci-ar724x.c | 88 ++++++++++++++++++++++------------------------
1 file changed, 42 insertions(+), 46 deletions(-)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -11,8 +11,11 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
+#include <linux/irqchip/chained_irq.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
+#include <linux/of_irq.h>
+#include <linux/of_pci.h>
#define AR724X_PCI_REG_APP 0x00
#define AR724X_PCI_REG_RESET 0x18
@@ -42,17 +45,20 @@ struct ar724x_pci_controller {
void __iomem *crp_base;
int irq;
- int irq_base;
bool link_up;
bool bar0_is_cached;
u32 bar0_value;
+ struct device_node *np;
struct pci_controller pci_controller;
+ struct irq_domain *domain;
struct resource io_res;
struct resource mem_res;
};
+static struct irq_chip ar724x_pci_irq_chip;
+
static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc)
{
u32 reset;
@@ -228,35 +234,31 @@ static struct pci_ops ar724x_pci_ops = {
static void ar724x_pci_irq_handler(struct irq_desc *desc)
{
- struct ar724x_pci_controller *apc;
- void __iomem *base;
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc);
u32 pending;
- apc = irq_desc_get_handler_data(desc);
- base = apc->ctrl_base;
-
- pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) &
- __raw_readl(base + AR724X_PCI_REG_INT_MASK);
+ chained_irq_enter(chip, desc);
+ pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) &
+ __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK);
if (pending & AR724X_PCI_INT_DEV0)
- generic_handle_irq(apc->irq_base + 0);
-
+ generic_handle_irq(irq_linear_revmap(apc->domain, 1));
else
spurious_interrupt();
+ chained_irq_exit(chip, desc);
}
static void ar724x_pci_irq_unmask(struct irq_data *d)
{
struct ar724x_pci_controller *apc;
void __iomem *base;
- int offset;
u32 t;
apc = irq_data_get_irq_chip_data(d);
base = apc->ctrl_base;
- offset = apc->irq_base - d->irq;
- switch (offset) {
+ switch (irq_linear_revmap(apc->domain, d->irq)) {
case 0:
t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
__raw_writel(t | AR724X_PCI_INT_DEV0,
@@ -270,14 +272,12 @@ static void ar724x_pci_irq_mask(struct i
{
struct ar724x_pci_controller *apc;
void __iomem *base;
- int offset;
u32 t;
apc = irq_data_get_irq_chip_data(d);
base = apc->ctrl_base;
- offset = apc->irq_base - d->irq;
- switch (offset) {
+ switch (irq_linear_revmap(apc->domain, d->irq)) {
case 0:
t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
__raw_writel(t & ~AR724X_PCI_INT_DEV0,
@@ -302,26 +302,34 @@ static struct irq_chip ar724x_pci_irq_ch
.irq_mask_ack = ar724x_pci_irq_mask,
};
+static int ar724x_pci_irq_map(struct irq_domain *d,
+ unsigned int irq, irq_hw_number_t hw)
+{
+ struct ar724x_pci_controller *apc = d->host_data;
+
+ irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq);
+ irq_set_chip_data(irq, apc);
+
+ return 0;
+}
+
+static const struct irq_domain_ops ar724x_pci_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = ar724x_pci_irq_map,
+};
+
static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
int id)
{
void __iomem *base;
- int i;
base = apc->ctrl_base;
__raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
__raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
- apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT);
-
- for (i = apc->irq_base;
- i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
- irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
- handle_level_irq);
- irq_set_chip_data(i, apc);
- }
-
+ apc->domain = irq_domain_add_linear(apc->np, 2,
+ &ar724x_pci_domain_ops, apc);
irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler,
apc);
}
@@ -360,7 +368,6 @@ static void ar724x_pci_hw_init(struct ar
static int ar724x_pci_probe(struct platform_device *pdev)
{
struct ar724x_pci_controller *apc;
- struct resource *res;
int id;
id = pdev->id;
@@ -388,29 +395,11 @@ static int ar724x_pci_probe(struct platf
if (apc->irq < 0)
return -EINVAL;
- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
- if (!res)
- return -EINVAL;
-
- apc->io_res.parent = res;
- apc->io_res.name = "PCI IO space";
- apc->io_res.start = res->start;
- apc->io_res.end = res->end;
- apc->io_res.flags = IORESOURCE_IO;
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
- if (!res)
- return -EINVAL;
-
- apc->mem_res.parent = res;
- apc->mem_res.name = "PCI memory space";
- apc->mem_res.start = res->start;
- apc->mem_res.end = res->end;
- apc->mem_res.flags = IORESOURCE_MEM;
-
+ apc->np = pdev->dev.of_node;
apc->pci_controller.pci_ops = &ar724x_pci_ops;
apc->pci_controller.io_resource = &apc->io_res;
apc->pci_controller.mem_resource = &apc->mem_res;
+ pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node);
/*
* Do the full PCIE Root Complex Initialization Sequence if the PCIe
@@ -432,10 +421,16 @@ static int ar724x_pci_probe(struct platf
return 0;
}
+static const struct of_device_id ar724x_pci_ids[] = {
+ { .compatible = "qcom,ar7240-pci" },
+ {},
+};
+
static struct platform_driver ar724x_pci_driver = {
.probe = ar724x_pci_probe,
.driver = {
.name = "ar724x-pci",
+ .of_match_table = of_match_ptr(ar724x_pci_ids),
},
};

View File

@@ -0,0 +1,149 @@
From: John Crispin <john@phrozen.org>
Subject: ath79: fix remove irq code from pci driver patch
This patch got mangled in the void while rebasing it.
Submitted-by: John Crispin <john@phrozen.org>
---
arch/mips/pci/pci-ar71xx.c | 107 ------------------
1 file changed, 141 deletions(-)
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -51,11 +51,9 @@
struct ar71xx_pci_controller {
struct device_node *np;
void __iomem *cfg_base;
- int irq;
struct pci_controller pci_ctrl;
struct resource io_res;
struct resource mem_res;
- struct irq_domain *domain;
};
/* Byte lane enable bits */
@@ -227,104 +225,6 @@ static struct pci_ops ar71xx_pci_ops = {
.write = ar71xx_pci_write_config,
};
-static void ar71xx_pci_irq_handler(struct irq_desc *desc)
-{
- void __iomem *base = ath79_reset_base;
- struct irq_chip *chip = irq_desc_get_chip(desc);
- struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc);
- u32 pending;
-
- chained_irq_enter(chip, desc);
- pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-
- if (pending & AR71XX_PCI_INT_DEV0)
- generic_handle_irq(irq_linear_revmap(apc->domain, 1));
-
- else if (pending & AR71XX_PCI_INT_DEV1)
- generic_handle_irq(irq_linear_revmap(apc->domain, 2));
-
- else if (pending & AR71XX_PCI_INT_DEV2)
- generic_handle_irq(irq_linear_revmap(apc->domain, 3));
-
- else if (pending & AR71XX_PCI_INT_CORE)
- generic_handle_irq(irq_linear_revmap(apc->domain, 4));
-
- else
- spurious_interrupt();
- chained_irq_exit(chip, desc);
-}
-
-static void ar71xx_pci_irq_unmask(struct irq_data *d)
-{
- struct ar71xx_pci_controller *apc;
- unsigned int irq;
- void __iomem *base = ath79_reset_base;
- u32 t;
-
- apc = irq_data_get_irq_chip_data(d);
- irq = irq_linear_revmap(apc->domain, d->irq);
-
- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
- __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-
- /* flush write */
- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-}
-
-static void ar71xx_pci_irq_mask(struct irq_data *d)
-{
- struct ar71xx_pci_controller *apc;
- unsigned int irq;
- void __iomem *base = ath79_reset_base;
- u32 t;
-
- apc = irq_data_get_irq_chip_data(d);
- irq = irq_linear_revmap(apc->domain, d->irq);
-
- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
- __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-
- /* flush write */
- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-}
-
-static struct irq_chip ar71xx_pci_irq_chip = {
- .name = "AR71XX PCI",
- .irq_mask = ar71xx_pci_irq_mask,
- .irq_unmask = ar71xx_pci_irq_unmask,
- .irq_mask_ack = ar71xx_pci_irq_mask,
-};
-
-static int ar71xx_pci_irq_map(struct irq_domain *d,
- unsigned int irq, irq_hw_number_t hw)
-{
- struct ar71xx_pci_controller *apc = d->host_data;
-
- irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq);
- irq_set_chip_data(irq, apc);
-
- return 0;
-}
-
-static const struct irq_domain_ops ar71xx_pci_domain_ops = {
- .xlate = irq_domain_xlate_onecell,
- .map = ar71xx_pci_irq_map,
-};
-
-static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
-{
- void __iomem *base = ath79_reset_base;
-
- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);
- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
-
- apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT,
- &ar71xx_pci_domain_ops, apc);
- irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler,
- apc);
-}
-
static void ar71xx_pci_reset(void)
{
ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE);
@@ -357,10 +257,6 @@ static int ar71xx_pci_probe(struct platf
if (IS_ERR(apc->cfg_base))
return PTR_ERR(apc->cfg_base);
- apc->irq = platform_get_irq(pdev, 0);
- if (apc->irq < 0)
- return -EINVAL;
-
ar71xx_pci_reset();
/* setup COMMAND register */
@@ -371,8 +267,6 @@ static int ar71xx_pci_probe(struct platf
/* clear bus errors */
ar71xx_pci_check_error(apc, 1);
- ar71xx_pci_irq_init(apc);
-
apc->np = pdev->dev.of_node;
apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
apc->pci_ctrl.mem_resource = &apc->mem_res;

View File

@@ -0,0 +1,130 @@
From: David Bauer <mail@david-bauer.net>
Date: Sat, 11 Apr 2020 14:03:12 +0200
Subject: MIPS: pci-ar724x: add QCA9550 reset sequence
The QCA9550 family of SoCs have a slightly different reset
sequence compared to older chips.
Normally the bootloader performs this sequence, however
some bootloader implementation expect the operating system
to clear the reset.
Also get the resets from OF to support handling of the second
PCIe root-complex on the QCA9558.
Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -390,6 +390,7 @@
#define QCA955X_PLL_CPU_CONFIG_REG 0x00
#define QCA955X_PLL_DDR_CONFIG_REG 0x04
#define QCA955X_PLL_CLK_CTRL_REG 0x08
+#define QCA955X_PLL_PCIE_CONFIG_REG 0x0c
#define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28
#define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48
#define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c
@@ -475,6 +476,9 @@
#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21)
#define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24)
+#define QCA955X_PLL_PCIE_CONFIG_PLL_PWD BIT(30)
+#define QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS BIT(16)
+
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_I2C_CLK_SELB BIT(5)
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_1 BIT(6)
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_UART1_CLK_SEL BIT(7)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -8,6 +8,7 @@
#include <linux/irq.h>
#include <linux/pci.h>
+#include <linux/reset.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
@@ -55,6 +56,9 @@ struct ar724x_pci_controller {
struct irq_domain *domain;
struct resource io_res;
struct resource mem_res;
+
+ struct reset_control *hc_reset;
+ struct reset_control *phy_reset;
};
static struct irq_chip ar724x_pci_irq_chip;
@@ -340,18 +344,30 @@ static void ar724x_pci_hw_init(struct ar
int wait = 0;
/* deassert PCIe host controller and PCIe PHY reset */
- ath79_device_reset_clear(AR724X_RESET_PCIE);
- ath79_device_reset_clear(AR724X_RESET_PCIE_PHY);
+ reset_control_deassert(apc->hc_reset);
+ reset_control_deassert(apc->phy_reset);
- /* remove the reset of the PCIE PLL */
- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
-
- /* deassert bypass for the PCIE PLL */
- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS;
- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+ if (of_device_is_compatible(apc->np, "qcom,qca9550-pci")) {
+ /* remove the reset of the PCIE PLL */
+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG);
+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_PWD;
+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl);
+
+ /* deassert bypass for the PCIE PLL */
+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG);
+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS;
+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl);
+ } else {
+ /* remove the reset of the PCIE PLL */
+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+
+ /* deassert bypass for the PCIE PLL */
+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS;
+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+ }
/* set PCIE Application Control to ready */
app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
@@ -395,6 +411,14 @@ static int ar724x_pci_probe(struct platf
if (apc->irq < 0)
return -EINVAL;
+ apc->hc_reset = devm_reset_control_get_exclusive(&pdev->dev, "hc");
+ if (IS_ERR(apc->hc_reset))
+ return PTR_ERR(apc->hc_reset);
+
+ apc->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, "phy");
+ if (IS_ERR(apc->phy_reset))
+ return PTR_ERR(apc->phy_reset);
+
apc->np = pdev->dev.of_node;
apc->pci_controller.pci_ops = &ar724x_pci_ops;
apc->pci_controller.io_resource = &apc->io_res;
@@ -405,7 +429,7 @@ static int ar724x_pci_probe(struct platf
* Do the full PCIE Root Complex Initialization Sequence if the PCIe
* host controller is in reset.
*/
- if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE)
+ if (reset_control_status(apc->hc_reset))
ar724x_pci_hw_init(apc);
apc->link_up = ar724x_pci_check_link(apc);
@@ -423,6 +447,7 @@ static int ar724x_pci_probe(struct platf
static const struct of_device_id ar724x_pci_ids[] = {
{ .compatible = "qcom,ar7240-pci" },
+ { .compatible = "qcom,qca9550-pci" },
{},
};

View File

@@ -0,0 +1,109 @@
From: Gabor Juhos <juhosg@openwrt.org>
Subject: [PATCH] ar71xx: swizzle address for PCI byte/word access on AR71xx
Closes #11683.
SVN-Revision: 32639
---
.../mips/include/asm/mach-ath79/mangle-port.h | 111 ++++++++++++++++++
1 file changed, 111 insertions(+)
create mode 100644 arch/mips/include/asm/mach-ath79/mangle-port.h
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/mangle-port.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H
+#define __ASM_MACH_ATH79_MANGLE_PORT_H
+
+#ifdef CONFIG_PCI_AR71XX
+extern unsigned long (ath79_pci_swizzle_b)(unsigned long port);
+extern unsigned long (ath79_pci_swizzle_w)(unsigned long port);
+#else
+#define ath79_pci_swizzle_b(port) (port)
+#define ath79_pci_swizzle_w(port) (port)
+#endif
+
+#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port)
+#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port)
+#define __swizzle_addr_l(port) (port)
+#define __swizzle_addr_q(port) (port)
+
+# define ioswabb(a, x) (x)
+# define __mem_ioswabb(a, x) (x)
+# define ioswabw(a, x) (x)
+# define __mem_ioswabw(a, x) cpu_to_le16(x)
+# define ioswabl(a, x) (x)
+# define __mem_ioswabl(a, x) cpu_to_le32(x)
+# define ioswabq(a, x) (x)
+# define __mem_ioswabq(a, x) cpu_to_le64(x)
+
+#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -68,6 +68,45 @@ static const u32 ar71xx_pci_read_mask[8]
0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0
};
+static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port);
+static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port);
+
+static inline bool ar71xx_is_pci_addr(unsigned long port)
+{
+ unsigned long phys = CPHYSADDR(port);
+
+ return (phys >= AR71XX_PCI_MEM_BASE &&
+ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE);
+}
+
+static unsigned long ar71xx_pci_swizzle_b(unsigned long port)
+{
+ return ar71xx_is_pci_addr(port) ? port ^ 3 : port;
+}
+
+static unsigned long ar71xx_pci_swizzle_w(unsigned long port)
+{
+ return ar71xx_is_pci_addr(port) ? port ^ 2 : port;
+}
+
+unsigned long ath79_pci_swizzle_b(unsigned long port)
+{
+ if (__ath79_pci_swizzle_b)
+ return __ath79_pci_swizzle_b(port);
+
+ return port;
+}
+EXPORT_SYMBOL(ath79_pci_swizzle_b);
+
+unsigned long ath79_pci_swizzle_w(unsigned long port)
+{
+ if (__ath79_pci_swizzle_w)
+ return __ath79_pci_swizzle_w(port);
+
+ return port;
+}
+EXPORT_SYMBOL(ath79_pci_swizzle_w);
+
static inline u32 ar71xx_pci_get_ble(int where, int size, int local)
{
u32 t;
@@ -275,6 +314,9 @@ static int ar71xx_pci_probe(struct platf
register_pci_controller(&apc->pci_ctrl);
+ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b;
+ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w;
+
return 0;
}

View File

@@ -0,0 +1,34 @@
From f2ca10b22ace3ce53b4e3f189bf1dd53a4482475 Mon Sep 17 00:00:00 2001
From: INAGAKI Hiroshi <musashino.open@gmail.com>
Date: Fri, 26 Apr 2024 23:53:58 +0900
Subject: [PATCH 1/2] MIPS: pci-ar724x: clear power down of pll on AR934x
Fix PCIe initialization on AR934x by clearing PLL_PWD bit in addition to
PPL_RESET bit of AR724x.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
---
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -347,6 +347,8 @@
#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21)
#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24)
+#define AR934X_PLL_PCIE_CONFIG_PLL_PWD BIT(30)
+
#define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6)
#define QCA953X_PLL_CPU_CONFIG_REG 0x00
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -360,7 +360,8 @@ static void ar724x_pci_hw_init(struct ar
} else {
/* remove the reset of the PCIE PLL */
ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
+ ppl &= ~(AR934X_PLL_PCIE_CONFIG_PLL_PWD |
+ AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET);
ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
/* deassert bypass for the PCIE PLL */

View File

@@ -0,0 +1,41 @@
From 859c93981a8994ffa69967b44b247d2e7d6a01f1 Mon Sep 17 00:00:00 2001
From: INAGAKI Hiroshi <musashino.open@gmail.com>
Date: Fri, 26 Apr 2024 23:54:57 +0900
Subject: [PATCH 2/2] MIPS: pci-ar724x: deassert the reset of PCIe endpoint
Fix PCIe initialization by de-assertion of PCIe endpoint reset.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
---
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -25,6 +25,7 @@
#define AR724X_PCI_APP_LTSSM_ENABLE BIT(0)
+#define AR724X_PCI_RESET_EP_RESET_L BIT(2)
#define AR724X_PCI_RESET_LINK_UP BIT(0)
#define AR724X_PCI_INT_DEV0 BIT(14)
@@ -340,7 +341,7 @@ static void ar724x_pci_irq_init(struct a
static void ar724x_pci_hw_init(struct ar724x_pci_controller *apc)
{
- u32 ppl, app;
+ u32 ppl, rst, app;
int wait = 0;
/* deassert PCIe host controller and PCIe PHY reset */
@@ -370,6 +371,11 @@ static void ar724x_pci_hw_init(struct ar
ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
}
+ /* deassert the reset state of the PCIE endpoint */
+ rst = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET);
+ rst |= AR724X_PCI_RESET_EP_RESET_L;
+ __raw_writel(rst, apc->ctrl_base + AR724X_PCI_REG_RESET);
+
/* set PCIE Application Control to ready */
app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
app |= AR724X_PCI_APP_LTSSM_ENABLE;

View File

@@ -0,0 +1,20 @@
From: Christian Lamparter <chunkeey@gmail.com>
Subject: [PATCH] ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for
ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -1233,6 +1233,10 @@
#define AR934X_ETH_CFG_RDV_DELAY BIT(16)
#define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3
#define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16
+#define AR934X_ETH_CFG_TXD_DELAY_MASK 0x3
+#define AR934X_ETH_CFG_TXD_DELAY_SHIFT 18
+#define AR934X_ETH_CFG_TXE_DELAY_MASK 0x3
+#define AR934X_ETH_CFG_TXE_DELAY_SHIFT 20
/*
* QCA953X GMAC Interface

View File

@@ -0,0 +1,90 @@
From 60efe35257b063ce584968f9f80b437030ce6ba6 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Mon, 18 Mar 2019 00:54:06 +0100
Subject: [PATCH] MIPS: ath79: add missing QCA955x GMAC registers
This adds missing GMAC register definitions for the Qualcomm Atheros
QCA955X series MIPS SoCs.
They originate from the platforms U-Boot code and the AVM FRITZ!WLAN
Repeater 450E's GPL tarball.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
.../mips/include/asm/mach-ath79/ar71xx_regs.h | 54 +++++++++++++++++++
1 file changed, 54 insertions(+)
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -1253,7 +1253,12 @@
*/
#define QCA955X_GMAC_REG_ETH_CFG 0x00
+#define QCA955X_GMAC_REG_SGMII_RESET 0x14
#define QCA955X_GMAC_REG_SGMII_SERDES 0x18
+#define QCA955X_GMAC_REG_MR_AN_CONTROL 0x1c
+#define QCA955X_GMAC_REG_MR_AN_STATUS 0x20
+#define QCA955X_GMAC_REG_SGMII_CONFIG 0x34
+#define QCA955X_GMAC_REG_SGMII_DEBUG 0x58
#define QCA955X_ETH_CFG_RGMII_EN BIT(0)
#define QCA955X_ETH_CFG_MII_GE0 BIT(1)
@@ -1275,9 +1280,58 @@
#define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3
#define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20
+#define QCA955X_SGMII_RESET_RX_CLK_N_RESET 0
+#define QCA955X_SGMII_RESET_RX_CLK_N BIT(0)
+#define QCA955X_SGMII_RESET_TX_CLK_N BIT(1)
+#define QCA955X_SGMII_RESET_RX_125M_N BIT(2)
+#define QCA955X_SGMII_RESET_TX_125M_N BIT(3)
+#define QCA955X_SGMII_RESET_HW_RX_125M_N BIT(4)
+
#define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15)
#define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23
#define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf
+
+#define QCA955X_MR_AN_CONTROL_SPEED_SEL1 BIT(6)
+#define QCA955X_MR_AN_CONTROL_DUPLEX_MODE BIT(8)
+#define QCA955X_MR_AN_CONTROL_RESTART_AN BIT(9)
+#define QCA955X_MR_AN_CONTROL_POWER_DOWN BIT(11)
+#define QCA955X_MR_AN_CONTROL_AN_ENABLE BIT(12)
+#define QCA955X_MR_AN_CONTROL_SPEED_SEL0 BIT(13)
+#define QCA955X_MR_AN_CONTROL_LOOPBACK BIT(14)
+#define QCA955X_MR_AN_CONTROL_PHY_RESET BIT(15)
+
+#define QCA955X_MR_AN_STATUS_EXT_CAP BIT(0)
+#define QCA955X_MR_AN_STATUS_LINK_UP BIT(2)
+#define QCA955X_MR_AN_STATUS_AN_ABILITY BIT(3)
+#define QCA955X_MR_AN_STATUS_REMOTE_FAULT BIT(4)
+#define QCA955X_MR_AN_STATUS_AN_COMPLETE BIT(5)
+#define QCA955X_MR_AN_STATUS_NO_PREAMBLE BIT(6)
+#define QCA955X_MR_AN_STATUS_BASE_PAGE BIT(7)
+
+#define QCA955X_SGMII_CONFIG_MODE_CTRL_SHIFT 0
+#define QCA955X_SGMII_CONFIG_MODE_CTRL_MASK 0x7
+#define QCA955X_SGMII_CONFIG_ENABLE_SGMII_TX_PAUSE BIT(3)
+#define QCA955X_SGMII_CONFIG_MR_REG4_CHANGED BIT(4)
+#define QCA955X_SGMII_CONFIG_FORCE_SPEED BIT(5)
+#define QCA955X_SGMII_CONFIG_SPEED_SHIFT 6
+#define QCA955X_SGMII_CONFIG_SPEED_MASK 0xc0
+#define QCA955X_SGMII_CONFIG_REMOTE_PHY_LOOPBACK BIT(8)
+#define QCA955X_SGMII_CONFIG_NEXT_PAGE_LOADED BIT(9)
+#define QCA955X_SGMII_CONFIG_MDIO_ENABLE BIT(10)
+#define QCA955X_SGMII_CONFIG_MDIO_PULSE BIT(11)
+#define QCA955X_SGMII_CONFIG_MDIO_COMPLETE BIT(12)
+#define QCA955X_SGMII_CONFIG_PRBS_ENABLE BIT(13)
+#define QCA955X_SGMII_CONFIG_BERT_ENABLE BIT(14)
+
+#define QCA955X_SGMII_DEBUG_TX_STATE_MASK 0xff
+#define QCA955X_SGMII_DEBUG_TX_STATE_SHIFT 0
+#define QCA955X_SGMII_DEBUG_RX_STATE_MASK 0xff00
+#define QCA955X_SGMII_DEBUG_RX_STATE_SHIFT 8
+#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_MASK 0xff0000
+#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_SHIFT 16
+#define QCA955X_SGMII_DEBUG_ARB_STATE_MASK 0xf000000
+#define QCA955X_SGMII_DEBUG_ARB_STATE_SHIFT 24
+
/*
* QCA956X GMAC Interface
*/

View File

@@ -0,0 +1,30 @@
From: David Bauer <mail@david-bauer.net>
Subject: [PATCH] ath79: force SGMII SerDes mode to MAC operation
The mode on the SGMII SerDes on the QCA9563 is 1000 Base-X by default.
This only allows for 1000 Mbit/s links, however when used with an SGMII
PHY in 100 Mbit/s link mode, the link remains dead.
This strictly has nothing to do with the SerDes calibration, however it
is done at the same point in the QCA reference U-Boot which is the
blueprint for everything happening here. As the current state is more or
less a hack, this should be fine.
This fixes the issues outlined above on a TP-Link EAP-225 Outdoor.
Reported-by: Tom Herbers <freifunk@tomherbers.de>
Tested-by: Tom Herbers <freifunk@tomherbers.de>
Submitted-by: David Bauer <mail@david-bauer.net>
---
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
1 files changed, 1 insertion(+)
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -1382,5 +1382,6 @@
#define QCA956X_SGMII_CONFIG_MODE_CTRL_SHIFT 0
#define QCA956X_SGMII_CONFIG_MODE_CTRL_MASK 0x7
+#define QCA956X_SGMII_CONFIG_MODE_CTRL_SGMII_MAC 0x2
#endif /* __ASM_MACH_AR71XX_REGS_H */

View File

@@ -0,0 +1,26 @@
From: John Crispin <john@phrozen.org>
Subject: ath79: Register GPIO driver earlier
HACK: register the GPIO driver earlier to ensure that gpio_request calls
from mach files succeed.
Submitted-by: John Crispin <john@phrozen.org>
---
drivers/gpio/gpio-ath79.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/drivers/gpio/gpio-ath79.c
+++ b/drivers/gpio/gpio-ath79.c
@@ -300,7 +300,11 @@ static struct platform_driver ath79_gpio
.probe = ath79_gpio_probe,
};
-module_platform_driver(ath79_gpio_driver);
+static int __init ath79_gpio_init(void)
+{
+ return platform_driver_register(&ath79_gpio_driver);
+}
+postcore_initcall(ath79_gpio_init);
MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support");
MODULE_LICENSE("GPL v2");

View File

@@ -0,0 +1,233 @@
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From: Linus Walleij <linus.walleij@linaro.org>
Date: Tue, 23 Apr 2024 14:12:33 +0200
Subject: [PATCH v2] wifi: ath9k: Obtain system GPIOS from descriptors
Precedence: bulk
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To: Kalle Valo <kvalo@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Arnd Bergmann <arnd@arndb.de>, Alban Bedel <albeu@free.fr>,
Bartosz Golaszewski <brgl@bgdev.pl>, =?utf-8?q?Toke_H=C3=B8iland-J=C3=B8rg?=
=?utf-8?q?ensen?= <toke@toke.dk>
Cc: linux-wireless@vger.kernel.org, brcm80211-dev-list.pdl@broadcom.com,
linux-gpio@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>
X-Mailer: b4 0.13.0
The ath9k has an odd use of system-wide GPIOs: if the chip
does not have internal GPIO capability, it will try to obtain a
GPIO line from the system GPIO controller:
if (BIT(gpio) & ah->caps.gpio_mask)
ath9k_hw_gpio_cfg_wmac(...);
else if (AR_SREV_SOC(ah))
ath9k_hw_gpio_cfg_soc(ah, gpio, out, label);
Where ath9k_hw_gpio_cfg_soc() will attempt to issue
gpio_request_one() passing the local GPIO number of the controller
(0..31) to gpio_request_one().
This is somewhat peculiar and possibly even dangerous: there is
nowadays no guarantee of the numbering of these system-wide
GPIOs, and assuming that GPIO 0..31 as used by ath9k would
correspond to GPIOs 0..31 on the system as a whole seems a bit
wild.
Register all 32 GPIOs at index 0..31 directly in the ATH79K
GPIO driver and associate with WIFI if and only if we are probing
ATH79K wifi from the AHB bus (used for SoCs).
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Changes in v2:
- Define all the descriptors directly in the ATH79K
GPIO driver in case the driver want to request them directly.
- Link to v1: https://lore.kernel.org/r/20240131-descriptors-wireless-v1-0-e1c7c5d68746@linaro.org
---
drivers/gpio/gpio-ath79.c | 47 ++++++++++++++++++++++++++++++++++++-
drivers/net/wireless/ath/ath9k/hw.c | 29 ++++++++++++-----------
drivers/net/wireless/ath/ath9k/hw.h | 3 ++-
3 files changed, 63 insertions(+), 16 deletions(-)
---
base-commit: 4cece764965020c22cff7665b18a012006359095
change-id: 20240122-descriptors-wireless-b8da95dcab35
Best regards,
--- a/drivers/gpio/gpio-ath79.c
+++ b/drivers/gpio/gpio-ath79.c
@@ -9,6 +9,7 @@
*/
#include <linux/gpio/driver.h>
+#include <linux/gpio/machine.h> /* For WLAN GPIOs */
#include <linux/platform_device.h>
#include <linux/platform_data/gpio-ath79.h>
#include <linux/of.h>
@@ -222,6 +223,37 @@ static const struct of_device_id ath79_g
};
MODULE_DEVICE_TABLE(of, ath79_gpio_of_match);
+/*
+ * This registers all of the ath79k GPIOs as descriptors to be picked
+ * directly from the ATH79K wifi driver if the two are jitted together
+ * in the same SoC.
+ */
+#define ATH79K_WIFI_DESCS 32
+static int ath79_gpio_register_wifi_descriptors(struct device *dev,
+ const char *label)
+{
+ struct gpiod_lookup_table *lookup;
+ int i;
+
+ /* Create a gpiod lookup using gpiochip-local offsets + 1 for NULL */
+ lookup = devm_kzalloc(dev,
+ struct_size(lookup, table, ATH79K_WIFI_DESCS + 1),
+ GFP_KERNEL);
+
+ if (!lookup)
+ return -ENOMEM;
+
+ for (i = 0; i < ATH79K_WIFI_DESCS; i++) {
+ lookup->table[i] = (struct gpiod_lookup)
+ GPIO_LOOKUP_IDX(label, i, "ath9k", i,
+ GPIO_ACTIVE_HIGH);
+ }
+
+ gpiod_add_lookup_table(lookup);
+
+ return 0;
+}
+
static int ath79_gpio_probe(struct platform_device *pdev)
{
struct ath79_gpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
@@ -289,7 +321,11 @@ static int ath79_gpio_probe(struct platf
girq->handler = handle_simple_irq;
}
- return devm_gpiochip_add_data(dev, &ctrl->gc, ctrl);
+ err = devm_gpiochip_add_data(dev, &ctrl->gc, ctrl);
+ if (err)
+ return err;
+
+ return ath79_gpio_register_wifi_descriptors(dev, ctrl->gc.label);
}
static struct platform_driver ath79_gpio_driver = {

View File

@@ -0,0 +1,36 @@
From: John Crispin <john@phrozen.org>
Subject: [PATCH] ath79: make ahb wifi work
Submitted-by: John Crispin <john@phrozen.org>
---
arch/mips/ath79/common.c | 3 +++
mips/include/asm/mach-ath79/ath79.h | 1+
1 file changed, 4 insertions(+)
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
@@ -31,11 +31,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq);
enum ath79_soc_type ath79_soc;
unsigned int ath79_soc_rev;
+EXPORT_SYMBOL_GPL(ath79_soc_rev);
void __iomem *ath79_pll_base;
void __iomem *ath79_reset_base;
EXPORT_SYMBOL_GPL(ath79_reset_base);
-static void __iomem *ath79_ddr_base;
+void __iomem *ath79_ddr_base;
+EXPORT_SYMBOL_GPL(ath79_ddr_base);
static void __iomem *ath79_ddr_wb_flush_base;
static void __iomem *ath79_ddr_pci_win_base;
--- a/arch/mips/include/asm/mach-ath79/ath79.h
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
@@ -149,6 +149,7 @@ void ath79_ddr_wb_flush(unsigned int reg
void ath79_ddr_set_pci_windows(void);
extern void __iomem *ath79_pll_base;
+extern void __iomem *ath79_ddr_base;
extern void __iomem *ath79_reset_base;
static inline void ath79_pll_wr(unsigned reg, u32 val)

View File

@@ -0,0 +1,26 @@
From: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Subject: [PATCH] ath79: export ath79_pll_base
This symbol is declared as extern but nobody exported it.
Any module including arch/mips/include/asm/mach-ath79/ath79.h
will not build. Without this export, ag71xx.ko will not build
as a module and the build will fail like this:
ERROR: modpost: "ath79_pll_base" [drivers/net/ethernet/atheros/ag71xx/ag71xx.ko] undefined!
The ath79_pll_base symbol is accessed in the ath79_pll_wr() inline function.
---
arch/mips/ath79/common.c | 1 +
1 file changed, 1 insertions(+)
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
@@ -34,6 +34,7 @@ unsigned int ath79_soc_rev;
EXPORT_SYMBOL_GPL(ath79_soc_rev);
void __iomem *ath79_pll_base;
+EXPORT_SYMBOL_GPL(ath79_pll_base);
void __iomem *ath79_reset_base;
EXPORT_SYMBOL_GPL(ath79_reset_base);
void __iomem *ath79_ddr_base;

View File

@@ -0,0 +1,67 @@
From: Daniel Golle <daniel@makrotopia.org>
Subject: [PATCH] ath79: add support for Atheros AR934x HS UART
AR934x chips also got the 'old' qca,ar9330-uart in addition to the
'new' ns16550a compatible one. Add support for UART1 clock selector as
well as device-tree bindings in ar934x.dtsi to make use of that uart.
Reported-by: Piotr Dymacz <pepe2k@gmail.com>
Submitted-by: Daniel Golle <daniel@makrotopia.org>
---
arch/mips/ath79/clock.c | 7 +++++++
.../mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
include/dt-bindings/clock/ath79-clk.h | 3 ++-
3 files changed, 10 insertions(+), 1 deletion(-)
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -40,6 +40,7 @@ static const char * const clk_names[ATH7
[ATH79_CLK_AHB] = "ahb",
[ATH79_CLK_REF] = "ref",
[ATH79_CLK_MDIO] = "mdio",
+ [ATH79_CLK_UART1] = "uart1",
};
static const char * __init ath79_clk_name(int type)
@@ -344,6 +345,9 @@ static void __init ar934x_clocks_init(vo
if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL)
ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000);
+ if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL)
+ ath79_set_clk(ATH79_CLK_UART1, 100 * 1000 * 1000);
+
iounmap(dpll_base);
}
@@ -649,6 +653,9 @@ static void __init ath79_clocks_init_dt(
if (!clks[ATH79_CLK_MDIO])
clks[ATH79_CLK_MDIO] = clks[ATH79_CLK_REF];
+ if (!clks[ATH79_CLK_UART1])
+ clks[ATH79_CLK_UART1] = clks[ATH79_CLK_REF];
+
if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) {
pr_err("%pOF: could not register clk provider\n", np);
goto err_iounmap;
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -350,6 +350,7 @@
#define AR934X_PLL_PCIE_CONFIG_PLL_PWD BIT(30)
#define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6)
+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL BIT(7)
#define QCA953X_PLL_CPU_CONFIG_REG 0x00
#define QCA953X_PLL_DDR_CONFIG_REG 0x04
--- a/include/dt-bindings/clock/ath79-clk.h
+++ b/include/dt-bindings/clock/ath79-clk.h
@@ -11,7 +11,8 @@
#define ATH79_CLK_AHB 2
#define ATH79_CLK_REF 3
#define ATH79_CLK_MDIO 4
+#define ATH79_CLK_UART1 5
-#define ATH79_CLK_END 5
+#define ATH79_CLK_END 6
#endif /* __DT_BINDINGS_ATH79_CLK_H */

View File

@@ -0,0 +1,77 @@
From 3fc8585cf76022dba7496627074d42af88c30718 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sat, 23 Jun 2018 15:16:55 +0200
Subject: [PATCH 32/33] MIPS: ath79: sanitize symbols
We no longer need to select which SoCs are supported as the whole arch
code is always built. So lets drop all the SoC symbols
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/Kconfig | 2 ++
arch/mips/ath79/Kconfig | 44 +++++---------------------------------------
arch/mips/pci/Makefile | 2 +-
3 files changed, 8 insertions(+), 40 deletions(-)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -255,6 +255,8 @@ config ATH79
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_MIPS16
select SYS_SUPPORTS_ZBOOT_UART_PROM
+ select HAVE_PCI
+ select USB_ARCH_HAS_EHCI
select USE_OF
select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
help
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -1,32 +1,14 @@
# SPDX-License-Identifier: GPL-2.0
if ATH79
-config SOC_AR71XX
- select HAVE_PCI
- def_bool n
-
-config SOC_AR724X
- select HAVE_PCI
- select PCI_AR724X if PCI
- def_bool n
-
-config SOC_AR913X
- def_bool n
-
-config SOC_AR933X
- def_bool n
-
-config SOC_AR934X
- select HAVE_PCI
- select PCI_AR724X if PCI
- def_bool n
-
-config SOC_QCA955X
- select HAVE_PCI
- select PCI_AR724X if PCI
+config PCI_AR71XX
+ bool "PCI support for AR7100 type SoCs"
+ depends on PCI
def_bool n
config PCI_AR724X
+ bool "PCI support for AR724x type SoCs"
+ depends on PCI
def_bool n
endif
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -19,7 +19,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o
ops-bcm63xx.o
obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o
obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o
-obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o
+obj-$(CONFIG_PCI_AR71XX) += pci-ar71xx.o
obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o
obj-$(CONFIG_PCI_XTALK_BRIDGE) += pci-xtalk-bridge.o
#

View File

@@ -0,0 +1,53 @@
From f32bc2aa01edcba2f2ed5db151cf183eac9ef919 Mon Sep 17 00:00:00 2001
From: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
Date: Sat, 25 Feb 2017 16:42:50 +0000
Subject: mtd: nor: support mtd name from device tree
Signed-off-by: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
---
drivers/mtd/spi-nor/spi-nor.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3420,12 +3420,19 @@ static void spi_nor_set_mtd_info(struct
{
struct mtd_info *mtd = &nor->mtd;
struct device *dev = nor->dev;
+ struct device_node *np = spi_nor_get_flash_node(nor);
+ const char __maybe_unused *of_mtd_name = NULL;
spi_nor_set_mtd_locking_ops(nor);
spi_nor_set_mtd_otp_ops(nor);
mtd->dev.parent = dev;
- if (!mtd->name)
+#ifdef CONFIG_MTD_OF_PARTS
+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name);
+#endif
+ if (of_mtd_name)
+ mtd->name = of_mtd_name;
+ else if (!mtd->name)
mtd->name = dev_name(dev);
mtd->type = MTD_NORFLASH;
mtd->flags = MTD_CAP_NORFLASH;
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -870,6 +870,17 @@ out_error:
*/
static void mtd_set_dev_defaults(struct mtd_info *mtd)
{
+#ifdef CONFIG_MTD_OF_PARTS
+ const char __maybe_unused *of_mtd_name = NULL;
+ struct device_node *np;
+
+ np = mtd_get_of_node(mtd);
+ if (np && !mtd->name) {
+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name);
+ if (of_mtd_name)
+ mtd->name = of_mtd_name;
+ } else
+#endif
if (mtd->dev.parent) {
if (!mtd->owner && mtd->dev.parent->driver)
mtd->owner = mtd->dev.parent->driver->owner;

View File

@@ -0,0 +1,45 @@
From: Christian Lamparter <chunkeey@gmail.com>
Subject: [PATCH] ath79: port cybertan_part from ar71xx
This patch ports the cybertan_part code from ar71xx and converts the
driver to a DT-supported mtd parser. As a result, it will no longer
add the u-boot, nvram and art partitions, which were never part of
the special Cybertan header.
Instead these partitions have to be specified in the DT, which has the
upside of making it possible to add properties (i.e.: read-only), labels
and references to these important partitions.
Submitted-by: Christian Lamparter <chunkeey@gmail.com>
---
drivers/mtd/parsers/Makefile | 1 +
drivers/mtd/parsers/Kconfig | 8 ++++++++
2 files changed, 9 insertions(+)
--- a/drivers/mtd/parsers/Makefile
+++ b/drivers/mtd/parsers/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
ofpart-y += ofpart_core.o
ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908) += ofpart_bcm4908.o
ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o
+obj-$(CONFIG_MTD_PARSER_CYBERTAN) += parser_cybertan.o
obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
obj-$(CONFIG_MTD_PARSER_TPLINK_SAFELOADER) += tplink_safeloader.o
--- a/drivers/mtd/parsers/Kconfig
+++ b/drivers/mtd/parsers/Kconfig
@@ -112,6 +112,14 @@ config MTD_OF_PARTS_LINKSYS_NS
two "firmware" partitions. Currently used firmware has to be detected
using CFE environment variable.
+config MTD_PARSER_CYBERTAN
+ tristate "Parser for Cybertan format partitions"
+ depends on MTD && (ATH79 || COMPILE_TEST)
+ help
+ Cybertan has a proprietory header than encompasses a Broadcom trx
+ header. This driver will parse the header and take care of the
+ special offsets that result in the extra headers.
+
config MTD_PARSER_IMAGETAG
tristate "Parser for BCM963XX Image Tag format partitions"
depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST

View File

@@ -0,0 +1,34 @@
From: Gabor Juhos <juhosg@openwrt.org>
Subject: ar71xx: ar934x_nfc: experimental NAND Flash Controller driver for AR934x
SVN-Revision: 33385
---
drivers/mtd/nand/raw/Kconfig | 8 ++++++++
drivers/mtd/nand/raw/Makefile | 1 +
2 files changed, 9 insertions(+)
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -542,4 +542,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE
load time (assuming you build diskonchip as a module) with the module
parameter "inftl_bbt_write=1".
+config MTD_NAND_AR934X
+ tristate "Support for NAND controller on Qualcomm Atheros AR934x/QCA955x SoCs"
+ depends on ATH79 || COMPILE_TEST
+ depends on HAS_IOMEM
+ help
+ Enables support for NAND controller on Qualcomm Atheros SoCs.
+ This controller is found on AR934x and QCA955x SoCs.
+
endif # MTD_RAW_NAND
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_MTD_NAND_INTEL_LGM) += inte
obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rockchip-nand-controller.o
obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o
obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o
+obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o
nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
nand-objs += nand_onfi.o

View File

@@ -0,0 +1,285 @@
From 08c9d6ceef01893678a5d2e8a15517c745417f21 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 10:04:05 +0100
Subject: [PATCH 04/27] phy: add ath79 usb phys
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/phy/Kconfig | 16 ++++++
drivers/phy/Makefile | 2 +
drivers/phy/phy-ar7100-usb.c | 124 +++++++++++++++++++++++++++++++++++++++++++
drivers/phy/phy-ar7200-usb.c | 108 +++++++++++++++++++++++++++++++++++++
4 files changed, 250 insertions(+)
create mode 100644 drivers/phy/phy-ar7100-usb.c
create mode 100644 drivers/phy/phy-ar7200-usb.c
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -25,6 +25,22 @@ config GENERIC_PHY_MIPI_DPHY
Provides a number of helpers a core functions for MIPI D-PHY
drivers to us.
+config PHY_AR7100_USB
+ tristate "Atheros AR7100 USB PHY driver"
+ depends on ATH79 || COMPILE_TEST
+ default y if USB_EHCI_HCD_PLATFORM
+ select GENERIC_PHY
+ help
+ Enable this to support the USB PHY on Atheros AR7100 SoCs.
+
+config PHY_AR7200_USB
+ tristate "Atheros AR7200 USB PHY driver"
+ depends on ATH79 || COMPILE_TEST
+ default y if USB_EHCI_HCD_PLATFORM
+ select GENERIC_PHY
+ help
+ Enable this to support the USB PHY on Atheros AR7200 SoCs.
+
config PHY_LPC18XX_USB_OTG
tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver"
depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -4,6 +4,8 @@
#
obj-$(CONFIG_GENERIC_PHY) += phy-core.o
+obj-$(CONFIG_PHY_AR7100_USB) += phy-ar7100-usb.o
+obj-$(CONFIG_PHY_AR7200_USB) += phy-ar7200-usb.o
obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o
obj-$(CONFIG_PHY_CAN_TRANSCEIVER) += phy-can-transceiver.o
obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o
--- /dev/null
+++ b/drivers/phy/phy-ar7100-usb.c
@@ -0,0 +1,117 @@
+/*
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/phy/phy.h>
+#include <linux/delay.h>
+#include <linux/reset.h>
+#include <linux/of_gpio.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+struct ar7100_usb_phy {
+ struct reset_control *rst_phy;
+ struct reset_control *rst_host;
+ struct reset_control *rst_ohci_dll;
+ void __iomem *io_base;
+ struct phy *phy;
+ int gpio;
+};
+
+static int ar7100_usb_phy_power_off(struct phy *phy)
+{
+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ err |= reset_control_assert(priv->rst_host);
+ err |= reset_control_assert(priv->rst_phy);
+ err |= reset_control_assert(priv->rst_ohci_dll);
+
+ return err;
+}
+
+static int ar7100_usb_phy_power_on(struct phy *phy)
+{
+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ err |= ar7100_usb_phy_power_off(phy);
+ mdelay(100);
+ err |= reset_control_deassert(priv->rst_ohci_dll);
+ err |= reset_control_deassert(priv->rst_phy);
+ err |= reset_control_deassert(priv->rst_host);
+ mdelay(500);
+ iowrite32(0xf0000, priv->io_base + AR71XX_USB_CTRL_REG_CONFIG);
+ iowrite32(0x20c00, priv->io_base + AR71XX_USB_CTRL_REG_FLADJ);
+
+ return err;
+}
+
+static const struct phy_ops ar7100_usb_phy_ops = {
+ .power_on = ar7100_usb_phy_power_on,
+ .power_off = ar7100_usb_phy_power_off,
+ .owner = THIS_MODULE,
+};
+
+static int ar7100_usb_phy_probe(struct platform_device *pdev)
+{
+ struct phy_provider *phy_provider;
+ struct ar7100_usb_phy *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->io_base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(priv->io_base))
+ return PTR_ERR(priv->io_base);
+
+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "phy");
+ if (IS_ERR(priv->rst_phy))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst_phy), "phy reset is missing");
+
+ priv->rst_host = devm_reset_control_get(&pdev->dev, "host");
+ if (IS_ERR(priv->rst_host))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst_host), "host reset is missing");
+
+ priv->rst_ohci_dll = devm_reset_control_get(&pdev->dev, "usb-ohci-dll");
+ if (IS_ERR(priv->rst_ohci_dll))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst_host), "ohci-dll reset is missing");
+
+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7100_usb_phy_ops);
+ if (IS_ERR(priv->phy))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->phy), "failed to create PHY");
+
+ phy_set_drvdata(priv->phy, priv);
+
+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
+
+ return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static const struct of_device_id ar7100_usb_phy_of_match[] = {
+ { .compatible = "qca,ar7100-usb-phy" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, ar7100_usb_phy_of_match);
+
+static struct platform_driver ar7100_usb_phy_driver = {
+ .probe = ar7100_usb_phy_probe,
+ .driver = {
+ .of_match_table = ar7100_usb_phy_of_match,
+ .name = "ar7100-usb-phy",
+ }
+};
+module_platform_driver(ar7100_usb_phy_driver);
+
+MODULE_DESCRIPTION("ATH79 USB PHY driver");
+MODULE_AUTHOR("Alban Bedel <albeu@free.fr>");
+MODULE_LICENSE("GPL");
--- /dev/null
+++ b/drivers/phy/phy-ar7200-usb.c
@@ -0,0 +1,111 @@
+/*
+ * Copyright (C) 2015 Alban Bedel <albeu@free.fr>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/phy/phy.h>
+#include <linux/reset.h>
+#include <linux/of_gpio.h>
+
+struct ar7200_usb_phy {
+ struct reset_control *rst_phy;
+ struct reset_control *rst_phy_analog;
+ struct reset_control *suspend_override;
+ struct phy *phy;
+ int gpio;
+};
+
+static int ar7200_usb_phy_power_on(struct phy *phy)
+{
+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ if (priv->suspend_override)
+ err = reset_control_assert(priv->suspend_override);
+ if (priv->rst_phy)
+ err |= reset_control_deassert(priv->rst_phy);
+ if (priv->rst_phy_analog)
+ err |= reset_control_deassert(priv->rst_phy_analog);
+
+ return err;
+}
+
+static int ar7200_usb_phy_power_off(struct phy *phy)
+{
+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ if (priv->suspend_override)
+ err = reset_control_deassert(priv->suspend_override);
+ if (priv->rst_phy)
+ err |= reset_control_assert(priv->rst_phy);
+ if (priv->rst_phy_analog)
+ err |= reset_control_assert(priv->rst_phy_analog);
+
+ return err;
+}
+
+static const struct phy_ops ar7200_usb_phy_ops = {
+ .power_on = ar7200_usb_phy_power_on,
+ .power_off = ar7200_usb_phy_power_off,
+ .owner = THIS_MODULE,
+};
+
+static int ar7200_usb_phy_probe(struct platform_device *pdev)
+{
+ struct phy_provider *phy_provider;
+ struct ar7200_usb_phy *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "phy");
+ if (IS_ERR(priv->rst_phy))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst_phy), "phy reset is missing");
+
+ priv->rst_phy_analog = devm_reset_control_get_optional(
+ &pdev->dev, "phy-analog");
+ if (IS_ERR(priv->rst_phy_analog))
+ return PTR_ERR(priv->rst_phy_analog);
+
+ priv->suspend_override = devm_reset_control_get_optional(
+ &pdev->dev, "suspend-override");
+ if (IS_ERR(priv->suspend_override))
+ return PTR_ERR(priv->suspend_override);
+
+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7200_usb_phy_ops);
+ if (IS_ERR(priv->phy))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->phy), "failed to create PHY");
+
+ phy_set_drvdata(priv->phy, priv);
+
+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
+
+ return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static const struct of_device_id ar7200_usb_phy_of_match[] = {
+ { .compatible = "qca,ar7200-usb-phy" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, ar7200_usb_phy_of_match);
+
+static struct platform_driver ar7200_usb_phy_driver = {
+ .probe = ar7200_usb_phy_probe,
+ .driver = {
+ .of_match_table = ar7200_usb_phy_of_match,
+ .name = "ar7200-usb-phy",
+ }
+};
+module_platform_driver(ar7200_usb_phy_driver);
+
+MODULE_DESCRIPTION("ATH79 USB PHY driver");
+MODULE_AUTHOR("Alban Bedel <albeu@free.fr>");
+MODULE_LICENSE("GPL");

View File

@@ -0,0 +1,24 @@
From 2201818e5bd33f389beceb3943fdfcf5a698fc5b Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 10:01:43 +0100
Subject: [PATCH 05/27] usb: add more OF/quirk properties
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/usb/host/ehci-platform.c | 5 +++++
1 file changed, 5 insertions(+)
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -274,6 +274,11 @@ static int ehci_platform_probe(struct pl
ehci = hcd_to_ehci(hcd);
if (pdata == &ehci_platform_defaults && dev->dev.of_node) {
+ of_property_read_u32(dev->dev.of_node, "caps-offset", &pdata->caps_offset);
+
+ if (of_property_read_bool(dev->dev.of_node, "has-synopsys-hc-bug"))
+ pdata->has_synopsys_hc_bug = 1;
+
if (of_property_read_bool(dev->dev.of_node, "big-endian-regs"))
ehci->big_endian_mmio = 1;

View File

@@ -0,0 +1,34 @@
From: John Crispin <john@phrozen.org>
Subject: [PATCH] ath79: add new OF only target for QCA MIPS silicon
This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.
Submitted-by: John Crispin <john@phrozen.org>
---
drivers/net/ethernet/atheros/Kconfig | 8 +-------
drivers/net/ethernet/atheros/Makefile | 2 +-
2 files changed, 2 insertions(+), 8 deletions(-)
--- a/drivers/net/ethernet/atheros/Kconfig
+++ b/drivers/net/ethernet/atheros/Kconfig
@@ -26,6 +26,8 @@ config AG71XX
If you wish to compile a kernel for AR7XXX/91XXX and enable
ethernet support, then you should always answer Y to this.
+source "drivers/net/ethernet/atheros/ag71xx/Kconfig"
+
config ATL2
tristate "Atheros L2 Fast Ethernet support"
depends on PCI
--- a/drivers/net/ethernet/atheros/Makefile
+++ b/drivers/net/ethernet/atheros/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_AG71XX) += ag71xx.o
+obj-$(CONFIG_AG71XX_LEGACY) += ag71xx/
obj-$(CONFIG_ATL1) += atlx/
obj-$(CONFIG_ATL2) += atlx/
obj-$(CONFIG_ATL1E) += atl1e/

View File

@@ -0,0 +1,40 @@
From: Jonas Gorski <jogo@openwrt.org>
Subject: ar71xx: add a workaround for ar8316 not always driving the TA bit to low
AR8316 behind a GPIO bitbanged MDIO bus fails to drive the turnaround bit
to low despite returning a valid value. Ignore it and just use the
returned value anyway.
SVN-Revision: 28422
---
drivers/net/mdio/mdio-bitbang.c | 16 ++-----------------
1 file changed, 2 insertions(+), 14 deletions(-)
--- a/drivers/net/mdio/mdio-bitbang.c
+++ b/drivers/net/mdio/mdio-bitbang.c
@@ -148,23 +148,11 @@ static void mdiobb_cmd_addr(struct mdiob
static int mdiobb_read_common(struct mii_bus *bus, int phy)
{
struct mdiobb_ctrl *ctrl = bus->priv;
- int ret, i;
+ int ret;
ctrl->ops->set_mdio_dir(ctrl, 0);
- /* check the turnaround bit: the PHY should be driving it to zero, if this
- * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that
- */
- if (mdiobb_get_bit(ctrl) != 0 &&
- !(bus->phy_ignore_ta_mask & (1 << phy))) {
- /* PHY didn't drive TA low -- flush any bits it
- * may be trying to send.
- */
- for (i = 0; i < 32; i++)
- mdiobb_get_bit(ctrl);
-
- return 0xffff;
- }
+ mdiobb_get_bit(ctrl);
ret = mdiobb_get_num(ctrl, 16);
mdiobb_get_bit(ctrl);

View File

@@ -0,0 +1,94 @@
From 66e584435ac0de6e0abeb6d7166fe4fe25d6bb73 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Tue, 16 Jun 2015 13:15:08 +0200
Subject: [PATCH] phy/mdio-bitbang: prevent rescheduling during command
It seems some phys have some maximum timings for accessing the MDIO line,
resulting in bit errors under cpu stress. Prevent this from happening by
disabling interrupts when sending commands.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
---
drivers/net/mdio/mdio-bitbang.c | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/drivers/net/mdio/mdio-bitbang.c
+++ b/drivers/net/mdio/mdio-bitbang.c
@@ -14,6 +14,7 @@
* Vitaly Bordug <vbordug@ru.mvista.com>
*/
+#include <linux/irqflags.h>
#include <linux/delay.h>
#include <linux/mdio-bitbang.h>
#include <linux/module.h>
@@ -161,22 +162,32 @@ static int mdiobb_read_common(struct mii
int mdiobb_read_c22(struct mii_bus *bus, int phy, int reg)
{
+ int ret;
+ unsigned long flags;
struct mdiobb_ctrl *ctrl = bus->priv;
+ local_irq_save(flags);
mdiobb_cmd(ctrl, ctrl->op_c22_read, phy, reg);
- return mdiobb_read_common(bus, phy);
+ ret = mdiobb_read_common(bus, phy);
+ local_irq_restore(flags);
+ return ret;
}
EXPORT_SYMBOL(mdiobb_read_c22);
int mdiobb_read_c45(struct mii_bus *bus, int phy, int devad, int reg)
{
+ int ret;
+ unsigned long flags;
struct mdiobb_ctrl *ctrl = bus->priv;
+ local_irq_save(flags);
mdiobb_cmd_addr(ctrl, phy, devad, reg);
mdiobb_cmd(ctrl, MDIO_C45_READ, phy, devad);
- return mdiobb_read_common(bus, phy);
+ ret = mdiobb_read_common(bus, phy);
+ local_irq_restore(flags);
+ return ret;
}
EXPORT_SYMBOL(mdiobb_read_c45);
@@ -197,22 +208,32 @@ static int mdiobb_write_common(struct mi
int mdiobb_write_c22(struct mii_bus *bus, int phy, int reg, u16 val)
{
+ int ret;
+ unsigned long flags;
struct mdiobb_ctrl *ctrl = bus->priv;
+ local_irq_save(flags);
mdiobb_cmd(ctrl, ctrl->op_c22_write, phy, reg);
- return mdiobb_write_common(bus, val);
+ ret = mdiobb_write_common(bus, val);
+ local_irq_restore(flags);
+ return ret;
}
EXPORT_SYMBOL(mdiobb_write_c22);
int mdiobb_write_c45(struct mii_bus *bus, int phy, int devad, int reg, u16 val)
{
+ int ret;
+ unsigned long flags;
struct mdiobb_ctrl *ctrl = bus->priv;
+ local_irq_save(flags);
mdiobb_cmd_addr(ctrl, phy, devad, reg);
mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, devad);
- return mdiobb_write_common(bus, val);
+ ret = mdiobb_write_common(bus, val);
+ local_irq_restore(flags);
+ return ret;
}
EXPORT_SYMBOL(mdiobb_write_c45);

View File

@@ -0,0 +1,59 @@
From b3797d1a92afe97c173b00fdb7824cedba24eef0 Mon Sep 17 00:00:00 2001
From: Chuanhong Guo <gch981213@gmail.com>
Date: Sun, 20 Sep 2020 01:00:45 +0800
Subject: [PATCH] ath79: ar8216: make switch register access atomic
due to some unknown reason these register accesses sometimes fail
on the integrated switch without this patch.
THIS ONLY WORKS ON ATH79 AND MAY BREAK THE DRIVER ON OTHER PLATFORMS!
The mdio bus on ath79 works in polling mode and doesn't rely on
any interrupt. This patch breaks the driver on any mdio master
with interrupts used.
---
--- a/drivers/net/phy/ar8216.c
+++ b/drivers/net/phy/ar8216.c
@@ -251,6 +251,7 @@ ar8xxx_mii_write32(struct ar8xxx_priv *p
u32
ar8xxx_read(struct ar8xxx_priv *priv, int reg)
{
+ unsigned long flags;
struct mii_bus *bus = priv->mii_bus;
u16 r1, r2, page;
u32 val;
@@ -258,11 +259,13 @@ ar8xxx_read(struct ar8xxx_priv *priv, in
split_addr((u32) reg, &r1, &r2, &page);
mutex_lock(&bus->mdio_lock);
+ local_irq_save(flags);
bus->write(bus, 0x18, 0, page);
wait_for_page_switch();
val = ar8xxx_mii_read32(priv, 0x10 | r2, r1);
+ local_irq_restore(flags);
mutex_unlock(&bus->mdio_lock);
return val;
@@ -271,17 +274,20 @@ ar8xxx_read(struct ar8xxx_priv *priv, in
void
ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val)
{
+ unsigned long flags;
struct mii_bus *bus = priv->mii_bus;
u16 r1, r2, page;
split_addr((u32) reg, &r1, &r2, &page);
mutex_lock(&bus->mdio_lock);
+ local_irq_save(flags);
bus->write(bus, 0x18, 0, page);
wait_for_page_switch();
ar8xxx_mii_write32(priv, 0x10 | r2, r1, val);
+ local_irq_restore(flags);
mutex_unlock(&bus->mdio_lock);
}

View File

@@ -0,0 +1,186 @@
From ecbd9c87f073f097d9fe56390353e64e963e866a Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 10:03:03 +0100
Subject: [PATCH 03/27] leds: add reset-controller based driver
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/leds/Kconfig | 11 ++++
drivers/leds/Makefile | 1 +
drivers/leds/leds-reset.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 149 insertions(+)
create mode 100644 drivers/leds/leds-reset.c
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -911,6 +911,17 @@ source "drivers/leds/flash/Kconfig"
comment "RGB LED drivers"
source "drivers/leds/rgb/Kconfig"
+config LEDS_RESET
+ tristate "LED support for reset-controller API"
+ depends on LEDS_CLASS
+ depends on RESET_CONTROLLER
+ help
+ This option enables support for LEDs connected to pins driven by reset
+ controllers. Yes, DNI actual built HW like that.
+
+ To compile this driver as a module, choose M here: the module
+ will be called leds-reset.
+
comment "LED Triggers"
source "drivers/leds/trigger/Kconfig"
--- /dev/null
+++ b/drivers/leds/leds-reset.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/err.h>
+#include <linux/reset.h>
+#include <linux/kernel.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+struct reset_led_data {
+ struct led_classdev cdev;
+ struct reset_control *rst;
+};
+
+static inline struct reset_led_data *
+ cdev_to_reset_led_data(struct led_classdev *led_cdev)
+{
+ return container_of(led_cdev, struct reset_led_data, cdev);
+}
+
+static void reset_led_set(struct led_classdev *led_cdev,
+ enum led_brightness value)
+{
+ struct reset_led_data *led_dat = cdev_to_reset_led_data(led_cdev);
+
+ if (value == LED_OFF)
+ reset_control_assert(led_dat->rst);
+ else
+ reset_control_deassert(led_dat->rst);
+}
+
+struct reset_leds_priv {
+ int num_leds;
+ struct reset_led_data leds[];
+};
+
+static inline int sizeof_reset_leds_priv(int num_leds)
+{
+ return sizeof(struct reset_leds_priv) +
+ (sizeof(struct reset_led_data) * num_leds);
+}
+
+static struct reset_leds_priv *reset_leds_create(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct fwnode_handle *child;
+ struct reset_leds_priv *priv;
+ int count, ret;
+
+ count = device_get_child_node_count(dev);
+ if (!count)
+ return ERR_PTR(-ENODEV);
+
+ priv = devm_kzalloc(dev, sizeof_reset_leds_priv(count), GFP_KERNEL);
+ if (!priv)
+ return ERR_PTR(-ENOMEM);
+
+ device_for_each_child_node(dev, child) {
+ struct reset_led_data *led = &priv->leds[priv->num_leds];
+ struct device_node *np = to_of_node(child);
+
+ ret = fwnode_property_read_string(child, "label", &led->cdev.name);
+ if (!led->cdev.name) {
+ fwnode_handle_put(child);
+ return ERR_PTR(-EINVAL);
+ }
+ led->rst = __of_reset_control_get(np, NULL, 0, 0, 0, true);
+ if (IS_ERR(led->rst))
+ return ERR_PTR(-EINVAL);
+
+ fwnode_property_read_string(child, "linux,default-trigger",
+ &led->cdev.default_trigger);
+
+ led->cdev.brightness_set = reset_led_set;
+ ret = devm_led_classdev_register(&pdev->dev, &led->cdev);
+ if (ret < 0)
+ return ERR_PTR(ret);
+ led->cdev.dev->of_node = np;
+ priv->num_leds++;
+ }
+
+ return priv;
+}
+
+static const struct of_device_id of_reset_leds_match[] = {
+ { .compatible = "reset-leds", },
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, of_reset_leds_match);
+
+static int reset_led_probe(struct platform_device *pdev)
+{
+ struct reset_leds_priv *priv;
+
+ priv = reset_leds_create(pdev);
+ if (IS_ERR(priv))
+ return PTR_ERR(priv);
+
+ platform_set_drvdata(pdev, priv);
+
+ return 0;
+}
+
+static void reset_led_shutdown(struct platform_device *pdev)
+{
+ struct reset_leds_priv *priv = platform_get_drvdata(pdev);
+ int i;
+
+ for (i = 0; i < priv->num_leds; i++) {
+ struct reset_led_data *led = &priv->leds[i];
+
+ if (!(led->cdev.flags & LED_RETAIN_AT_SHUTDOWN))
+ reset_led_set(&led->cdev, LED_OFF);
+ }
+}
+
+static struct platform_driver reset_led_driver = {
+ .probe = reset_led_probe,
+ .shutdown = reset_led_shutdown,
+ .driver = {
+ .name = "leds-reset",
+ .of_match_table = of_reset_leds_match,
+ },
+};
+
+module_platform_driver(reset_led_driver);
+
+MODULE_AUTHOR("John Crispin <john@phrozen.org>");
+MODULE_DESCRIPTION("reset controller LED driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:leds-reset");
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA) += leds
obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o
obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o
obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o
+obj-$(CONFIG_LEDS_RESET) += leds-reset.o
# LED SPI Drivers
obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o

View File

@@ -0,0 +1,33 @@
From: Shiji Yang <yangshiji66@outlook.com>
Date: Wed, 31 May 2023 00:15:23 +0000
Subject: [PATCH] ath79: ignore the abused interrupt-map on pcie node
ath79 PCIe interrupt controller has stopped working correctly. This
is because the DT exposing a non-sensical interrupt-map property,
and their drivers relying on the kernel ignoring this property[1].
This patch fix the pcie init error:
ath9k 0000:00:00.0: of_irq_parse_pci: failed with rc=-14
Notice:
This is just a workaround, not a fix. PCIe driver and related dts
node need to be rewritten.
[1] https://lore.kernel.org/all/20211201114102.13446-1-maz@kernel.org/
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/of/irq.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/of/irq.c
+++ b/drivers/of/irq.c
@@ -94,6 +94,8 @@ EXPORT_SYMBOL_GPL(of_irq_find_parent);
* drawing board.
*/
static const char * const of_irq_imap_abusers[] = {
+ "qca,ar7100-pci",
+ "qcom,ar7240-pci",
"CBEA,platform-spider-pic",
"sti,platform-spider-pic",
"realtek,rtl-intc",

View File

@@ -0,0 +1,37 @@
From: Shiji Yang <yangshiji66@outlook.com>
Date: Wed, 13 Mar 2024 22:36:31 +0800
Subject: [PATCH] mfd: syscon: support skip reset control for syscon devices
Some platform device drivers(e.g. ag71xx) expect exclusive reset
control. Fetching reset controller for syscon[1] will break these
drivers. This patch introduces a new property 'syscon-no-reset'
to skip it.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit?id=7d1e3bd94828ad9fc86f55253cd6fec8edd65394
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/mfd/syscon.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/drivers/mfd/syscon.c
+++ b/drivers/mfd/syscon.c
@@ -53,7 +53,7 @@ static struct syscon *of_syscon_register
int ret;
struct regmap_config syscon_config = syscon_regmap_config;
struct resource res;
- struct reset_control *reset;
+ struct reset_control *reset = NULL;
WARN_ON(!mutex_is_locked(&syscon_list_lock));
@@ -133,7 +133,8 @@ static struct syscon *of_syscon_register
goto err_attach_clk;
}
- reset = of_reset_control_get_optional_exclusive(np, NULL);
+ if (!of_property_read_bool(np, "syscon-no-reset"))
+ reset = of_reset_control_get_optional_exclusive(np, NULL);
if (IS_ERR(reset)) {
ret = PTR_ERR(reset);
goto err_attach_clk;

View File

@@ -0,0 +1,900 @@
From: Felix Fietkau <nbd@openwrt.org>
Subject: [PATCH] ar71xx: fix unaligned access in a few more places
SVN-Revision: 35130
---
arch/mips/include/asm/checksum.h | 83 +++---------------
include/uapi/linux/ip.h | 2 +-
include/uapi/linux/ipv6.h | 2 +-
include/uapi/linux/tcp.h | 4 ++--
include/uapi/linux/udp.h | 2 +-
net/netfilter/nf_conntrack_core.c | 4 ++--
include/uapi/linux/icmp.h | 2 +-
include/uapi/linux/in6.h | 2 +-
net/ipv6/tcp_ipv6.c | 9 +++--
net/ipv6/datagram.c | 6 ++--
net/ipv6/exthdrs.c | 2 +-
include/linux/types.h | 5 +++
net/ipv4/af_inet.c | 4 ++--
net/ipv4/tcp_output.c | 69 +++++++++--------
include/uapi/linux/igmp.h | 8 +++---
net/core/flow_dissector.c | 2 +-
include/uapi/linux/icmpv6.h | 2 +-
include/net/ndisc.h | 10 ++++----
net/sched/cls_u32.c | 6 +++---
net/ipv6/ip6_offload.c | 2 +-
include/net/addrconf.h | 2 +-
include/net/inet_ecn.h | 4 ++--
include/net/ipv6.h | 23 +++++----
include/net/secure_seq.h | 1 +
include/uapi/linux/in.h | 2 +-
net/ipv6/ip6_fib.h | 2 +-
net/netfilter/nf_conntrack_proto_tcp.c | 2 +-
net/xfrm/xfrm_input.c | 4 ++--
net/ipv4/tcp_input.c | 12 ++++---
include/uapi/linux/if_pppox.h | 1 +
net/ipv6/netfilter/nf_log_ipv6.c | 4 ++--
include/net/neighbour.h | 6 +++--
include/uapi/linux/netfilter_arp/arp_tables.h | 2 +-
net/core/utils.c | 10 +++++--
include/linux/etherdevice.h | 11 ++++---
net/ipv4/tcp_offload.c | 6 +++---
net/ipv6/netfilter/ip6table_mangle.c | 4 ++--
37 file changed, 171 insertions(+), 141 deletions(-)
--- a/arch/mips/include/asm/checksum.h
+++ b/arch/mips/include/asm/checksum.h
@@ -100,26 +100,30 @@ static inline __sum16 ip_fast_csum(const
const unsigned int *stop = word + ihl;
unsigned int csum;
int carry;
+ unsigned int w;
- csum = word[0];
- csum += word[1];
- carry = (csum < word[1]);
+ csum = net_hdr_word(word++);
+
+ w = net_hdr_word(word++);
+ csum += w;
+ carry = (csum < w);
csum += carry;
- csum += word[2];
- carry = (csum < word[2]);
+ w = net_hdr_word(word++);
+ csum += w;
+ carry = (csum < w);
csum += carry;
- csum += word[3];
- carry = (csum < word[3]);
+ w = net_hdr_word(word++);
+ csum += w;
+ carry = (csum < w);
csum += carry;
- word += 4;
do {
- csum += *word;
- carry = (csum < *word);
+ w = net_hdr_word(word++);
+ csum += w;
+ carry = (csum < w);
csum += carry;
- word++;
} while (word != stop);
return csum_fold(csum);
@@ -179,74 +183,6 @@ static inline __sum16 ip_compute_csum(co
return csum_fold(csum_partial(buff, len, 0));
}
-#define _HAVE_ARCH_IPV6_CSUM
-static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
- const struct in6_addr *daddr,
- __u32 len, __u8 proto,
- __wsum sum)
-{
- __wsum tmp;
-
- __asm__(
- " .set push # csum_ipv6_magic\n"
- " .set noreorder \n"
- " .set noat \n"
- " addu %0, %5 # proto (long in network byte order)\n"
- " sltu $1, %0, %5 \n"
- " addu %0, $1 \n"
-
- " addu %0, %6 # csum\n"
- " sltu $1, %0, %6 \n"
- " lw %1, 0(%2) # four words source address\n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 4(%2) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 8(%2) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 12(%2) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 0(%3) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 4(%3) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 8(%3) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " lw %1, 12(%3) \n"
- " addu %0, $1 \n"
- " addu %0, %1 \n"
- " sltu $1, %0, %1 \n"
-
- " addu %0, $1 # Add final carry\n"
- " .set pop"
- : "=&r" (sum), "=&r" (tmp)
- : "r" (saddr), "r" (daddr),
- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)
- : "memory");
-
- return csum_fold(sum);
-}
-
#include <asm-generic/checksum.h>
#endif /* CONFIG_GENERIC_CSUM */
--- a/include/uapi/linux/ip.h
+++ b/include/uapi/linux/ip.h
@@ -106,7 +106,7 @@ struct iphdr {
__be32 daddr;
);
/*The options start here. */
-};
+} __attribute__((packed, aligned(2)));
struct ip_auth_hdr {
--- a/include/uapi/linux/ipv6.h
+++ b/include/uapi/linux/ipv6.h
@@ -135,7 +135,7 @@ struct ipv6hdr {
struct in6_addr saddr;
struct in6_addr daddr;
);
-};
+} __attribute__((packed, aligned(2)));
/* index values for the variables in ipv6_devconf */
--- a/include/uapi/linux/tcp.h
+++ b/include/uapi/linux/tcp.h
@@ -55,7 +55,7 @@ struct tcphdr {
__be16 window;
__sum16 check;
__be16 urg_ptr;
-};
+} __attribute__((packed, aligned(2)));
/*
* The union cast uses a gcc extension to avoid aliasing problems
@@ -65,7 +65,7 @@ struct tcphdr {
union tcp_word_hdr {
struct tcphdr hdr;
__be32 words[5];
-};
+} __attribute__((packed, aligned(2)));
#define tcp_flag_word(tp) (((union tcp_word_hdr *)(tp))->words[3])
--- a/include/uapi/linux/udp.h
+++ b/include/uapi/linux/udp.h
@@ -25,7 +25,7 @@ struct udphdr {
__be16 dest;
__be16 len;
__sum16 check;
-};
+} __attribute__((packed, aligned(2)));
/* UDP socket options */
#define UDP_CORK 1 /* Never send partially complete segments */
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
@@ -298,8 +298,8 @@ nf_ct_get_tuple(const struct sk_buff *sk
switch (l3num) {
case NFPROTO_IPV4:
- tuple->src.u3.ip = ap[0];
- tuple->dst.u3.ip = ap[1];
+ tuple->src.u3.ip = net_hdr_word(ap++);
+ tuple->dst.u3.ip = net_hdr_word(ap);
break;
case NFPROTO_IPV6:
memcpy(tuple->src.u3.ip6, ap, sizeof(tuple->src.u3.ip6));
--- a/include/uapi/linux/icmp.h
+++ b/include/uapi/linux/icmp.h
@@ -102,7 +102,7 @@ struct icmphdr {
} frag;
__u8 reserved[4];
} un;
-};
+} __attribute__((packed, aligned(2)));
/*
--- a/include/uapi/linux/in6.h
+++ b/include/uapi/linux/in6.h
@@ -43,7 +43,7 @@ struct in6_addr {
#define s6_addr16 in6_u.u6_addr16
#define s6_addr32 in6_u.u6_addr32
#endif
-};
+} __attribute__((packed, aligned(2)));
#endif /* __UAPI_DEF_IN6_ADDR */
#if __UAPI_DEF_SOCKADDR_IN6
--- a/net/ipv6/tcp_ipv6.c
+++ b/net/ipv6/tcp_ipv6.c
@@ -35,6 +35,7 @@
#include <linux/ipsec.h>
#include <linux/times.h>
#include <linux/slab.h>
+#include <asm/unaligned.h>
#include <linux/uaccess.h>
#include <linux/ipv6.h>
#include <linux/icmpv6.h>
@@ -891,10 +892,10 @@ static void tcp_v6_send_response(const s
topt = (__be32 *)(t1 + 1);
if (tsecr) {
- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |
- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP);
- *topt++ = htonl(tsval);
- *topt++ = htonl(tsecr);
+ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |
+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++);
+ put_unaligned_be32(tsval, topt++);
+ put_unaligned_be32(tsecr, topt++);
}
if (mrst)
--- a/include/linux/ipv6.h
+++ b/include/linux/ipv6.h
@@ -6,6 +6,7 @@
#define ipv6_optlen(p) (((p)->hdrlen+1) << 3)
#define ipv6_authlen(p) (((p)->hdrlen+2) << 2)
+
/*
* This structure contains configuration options per IPv6 link.
*/
--- a/net/ipv6/datagram.c
+++ b/net/ipv6/datagram.c
@@ -499,7 +499,7 @@ int ipv6_recv_error(struct sock *sk, str
ipv6_iface_scope_id(&sin->sin6_addr,
IP6CB(skb)->iif);
} else {
- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset),
+ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset),
&sin->sin6_addr);
sin->sin6_scope_id = 0;
}
@@ -853,12 +853,12 @@ int ip6_datagram_send_ctl(struct net *ne
}
if (fl6->flowlabel&IPV6_FLOWINFO_MASK) {
- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) {
+ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) {
err = -EINVAL;
goto exit_f;
}
}
- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg);
+ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg));
break;
case IPV6_2292HOPOPTS:
--- a/net/ipv6/exthdrs.c
+++ b/net/ipv6/exthdrs.c
@@ -982,7 +982,7 @@ static bool ipv6_hop_jumbo(struct sk_buf
goto drop;
}
- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2));
+ pkt_len = ntohl(net_hdr_word(nh + optoff + 2));
if (pkt_len <= IPV6_MAXPLEN) {
icmpv6_param_prob_reason(skb, ICMPV6_HDR_FIELD, optoff + 2,
SKB_DROP_REASON_IP_INHDR);
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -244,5 +244,11 @@ typedef void (*swap_func_t)(void *a, voi
typedef int (*cmp_r_func_t)(const void *a, const void *b, const void *priv);
typedef int (*cmp_func_t)(const void *a, const void *b);
+struct net_hdr_word {
+ u32 words[1];
+} __attribute__((packed, aligned(2)));
+
+#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0])
+
#endif /* __ASSEMBLY__ */
#endif /* _LINUX_TYPES_H */
--- a/net/ipv4/af_inet.c
+++ b/net/ipv4/af_inet.c
@@ -1506,8 +1506,8 @@ struct sk_buff *inet_gro_receive(struct
goto out;
NAPI_GRO_CB(skb)->proto = proto;
- id = ntohl(*(__be32 *)&iph->id);
- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF));
+ id = ntohl(net_hdr_word(&iph->id));
+ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF));
id >>= 16;
list_for_each_entry(p, head, list) {
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -625,48 +625,53 @@ static void tcp_options_write(struct tcp
u16 options = opts->options; /* mungable copy */
if (unlikely(OPTION_MD5 & options)) {
- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |
- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG);
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |
+ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG);
/* overload cookie hash location */
opts->hash_location = (__u8 *)ptr;
ptr += 4;
}
if (unlikely(opts->mss)) {
- *ptr++ = htonl((TCPOPT_MSS << 24) |
- (TCPOLEN_MSS << 16) |
- opts->mss);
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) |
+ opts->mss);
}
if (likely(OPTION_TS & options)) {
if (unlikely(OPTION_SACK_ADVERTISE & options)) {
- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) |
- (TCPOLEN_SACK_PERM << 16) |
- (TCPOPT_TIMESTAMP << 8) |
- TCPOLEN_TIMESTAMP);
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_SACK_PERM << 24) |
+ (TCPOLEN_SACK_PERM << 16) |
+ (TCPOPT_TIMESTAMP << 8) |
+ TCPOLEN_TIMESTAMP);
options &= ~OPTION_SACK_ADVERTISE;
} else {
- *ptr++ = htonl((TCPOPT_NOP << 24) |
- (TCPOPT_NOP << 16) |
- (TCPOPT_TIMESTAMP << 8) |
- TCPOLEN_TIMESTAMP);
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_NOP << 24) |
+ (TCPOPT_NOP << 16) |
+ (TCPOPT_TIMESTAMP << 8) |
+ TCPOLEN_TIMESTAMP);
}
- *ptr++ = htonl(opts->tsval);
- *ptr++ = htonl(opts->tsecr);
+ net_hdr_word(ptr++) = htonl(opts->tsval);
+ net_hdr_word(ptr++) = htonl(opts->tsecr);
}
if (unlikely(OPTION_SACK_ADVERTISE & options)) {
- *ptr++ = htonl((TCPOPT_NOP << 24) |
- (TCPOPT_NOP << 16) |
- (TCPOPT_SACK_PERM << 8) |
- TCPOLEN_SACK_PERM);
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_NOP << 24) |
+ (TCPOPT_NOP << 16) |
+ (TCPOPT_SACK_PERM << 8) |
+ TCPOLEN_SACK_PERM);
}
if (unlikely(OPTION_WSCALE & options)) {
- *ptr++ = htonl((TCPOPT_NOP << 24) |
- (TCPOPT_WINDOW << 16) |
- (TCPOLEN_WINDOW << 8) |
- opts->ws);
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_NOP << 24) |
+ (TCPOPT_WINDOW << 16) |
+ (TCPOLEN_WINDOW << 8) |
+ opts->ws);
}
if (unlikely(opts->num_sack_blocks)) {
@@ -674,16 +679,17 @@ static void tcp_options_write(struct tcp
tp->duplicate_sack : tp->selective_acks;
int this_sack;
- *ptr++ = htonl((TCPOPT_NOP << 24) |
- (TCPOPT_NOP << 16) |
- (TCPOPT_SACK << 8) |
- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks *
+ net_hdr_word(ptr++) =
+ htonl((TCPOPT_NOP << 24) |
+ (TCPOPT_NOP << 16) |
+ (TCPOPT_SACK << 8) |
+ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks *
TCPOLEN_SACK_PERBLOCK)));
for (this_sack = 0; this_sack < opts->num_sack_blocks;
++this_sack) {
- *ptr++ = htonl(sp[this_sack].start_seq);
- *ptr++ = htonl(sp[this_sack].end_seq);
+ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq);
+ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq);
}
tp->rx_opt.dsack = 0;
@@ -696,13 +702,14 @@ static void tcp_options_write(struct tcp
if (foc->exp) {
len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len;
- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) |
+ net_hdr_word(ptr) =
+ htonl((TCPOPT_EXP << 24) | (len << 16) |
TCPOPT_FASTOPEN_MAGIC);
p += TCPOLEN_EXP_FASTOPEN_BASE;
} else {
len = TCPOLEN_FASTOPEN_BASE + foc->len;
- *p++ = TCPOPT_FASTOPEN;
- *p++ = len;
+ net_hdr_word(p++) = TCPOPT_FASTOPEN;
+ net_hdr_word(p++) = len;
}
memcpy(p, foc->val, foc->len);
--- a/include/uapi/linux/igmp.h
+++ b/include/uapi/linux/igmp.h
@@ -33,7 +33,7 @@ struct igmphdr {
__u8 code; /* For newer IGMP */
__sum16 csum;
__be32 group;
-};
+} __attribute__((packed, aligned(2)));
/* V3 group record types [grec_type] */
#define IGMPV3_MODE_IS_INCLUDE 1
@@ -49,7 +49,7 @@ struct igmpv3_grec {
__be16 grec_nsrcs;
__be32 grec_mca;
__be32 grec_src[];
-};
+} __attribute__((packed, aligned(2)));
struct igmpv3_report {
__u8 type;
@@ -58,7 +58,7 @@ struct igmpv3_report {
__be16 resv2;
__be16 ngrec;
struct igmpv3_grec grec[];
-};
+} __attribute__((packed, aligned(2)));
struct igmpv3_query {
__u8 type;
@@ -79,7 +79,7 @@ struct igmpv3_query {
__u8 qqic;
__be16 nsrcs;
__be32 srcs[];
-};
+} __attribute__((packed, aligned(2)));
#define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */
#define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */
--- a/net/core/flow_dissector.c
+++ b/net/core/flow_dissector.c
@@ -132,7 +132,7 @@ __be32 __skb_flow_get_ports(const struct
ports = __skb_header_pointer(skb, thoff + poff,
sizeof(_ports), data, hlen, &_ports);
if (ports)
- return *ports;
+ return (__be32)net_hdr_word(ports);
}
return 0;
--- a/include/uapi/linux/icmpv6.h
+++ b/include/uapi/linux/icmpv6.h
@@ -78,7 +78,7 @@ struct icmp6hdr {
#define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other
#define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime
#define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref
-};
+} __attribute__((packed, aligned(2)));
#define ICMPV6_ROUTER_PREF_LOW 0x3
--- a/include/net/ndisc.h
+++ b/include/net/ndisc.h
@@ -93,7 +93,7 @@ struct ra_msg {
struct icmp6hdr icmph;
__be32 reachable_time;
__be32 retrans_timer;
-};
+} __attribute__((packed, aligned(2)));
struct rd_msg {
struct icmp6hdr icmph;
@@ -372,10 +372,10 @@ static inline u32 ndisc_hashfn(const voi
{
const u32 *p32 = pkey;
- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) +
- (p32[1] * hash_rnd[1]) +
- (p32[2] * hash_rnd[2]) +
- (p32[3] * hash_rnd[3]));
+ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) +
+ (net_hdr_word(&p32[1]) * hash_rnd[1]) +
+ (net_hdr_word(&p32[2]) * hash_rnd[2]) +
+ (net_hdr_word(&p32[3]) * hash_rnd[3]));
}
static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey)
--- a/net/sched/cls_u32.c
+++ b/net/sched/cls_u32.c
@@ -167,7 +167,7 @@ next_knode:
data = skb_header_pointer(skb, toff, 4, &hdata);
if (!data)
goto out;
- if ((*data ^ key->val) & key->mask) {
+ if ((net_hdr_word(data) ^ key->val) & key->mask) {
n = rcu_dereference_bh(n->next);
goto next_knode;
}
@@ -218,8 +218,8 @@ check_terminal:
&hdata);
if (!data)
goto out;
- sel = ht->divisor & u32_hash_fold(*data, &n->sel,
- n->fshift);
+ sel = ht->divisor & u32_hash_fold(net_hdr_word(data),
+ &n->sel, n->fshift);
}
if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT)))
goto next_ht;
--- a/net/ipv6/ip6_offload.c
+++ b/net/ipv6/ip6_offload.c
@@ -273,7 +273,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff *
continue;
iph2 = (struct ipv6hdr *)(p->data + off);
- first_word = *(__be32 *)iph ^ *(__be32 *)iph2;
+ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2);
/* All fields must match except length and Traffic Class.
* XXX skbs on the gro_list have all been parsed and pulled
--- a/include/net/addrconf.h
+++ b/include/net/addrconf.h
@@ -52,7 +52,7 @@ struct prefix_info {
__be32 reserved2;
struct in6_addr prefix;
-};
+} __attribute__((packed, aligned(2)));
/* rfc4861 4.6.2: IPv6 PIO is 32 bytes in size */
static_assert(sizeof(struct prefix_info) == 32);
--- a/include/net/inet_ecn.h
+++ b/include/net/inet_ecn.h
@@ -138,9 +138,9 @@ static inline int IP6_ECN_set_ce(struct
if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph)))
return 0;
- from = *(__be32 *)iph;
+ from = net_hdr_word(iph);
to = from | htonl(INET_ECN_CE << 20);
- *(__be32 *)iph = to;
+ net_hdr_word(iph) = to;
if (skb->ip_summed == CHECKSUM_COMPLETE)
skb->csum = csum_add(csum_sub(skb->csum, (__force __wsum)from),
(__force __wsum)to);
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -149,7 +149,7 @@ struct frag_hdr {
__u8 reserved;
__be16 frag_off;
__be32 identification;
-};
+} __attribute__((packed, aligned(2)));
/*
* Jumbo payload option, as described in RFC 2675 2.
@@ -649,8 +649,8 @@ static inline void __ipv6_addr_set_half(
}
#endif
#endif
- addr[0] = wh;
- addr[1] = wl;
+ net_hdr_word(&addr[0]) = wh;
+ net_hdr_word(&addr[1]) = wl;
}
static inline void ipv6_addr_set(struct in6_addr *addr,
@@ -709,6 +709,8 @@ static inline bool ipv6_prefix_equal(con
const __be32 *a1 = addr1->s6_addr32;
const __be32 *a2 = addr2->s6_addr32;
unsigned int pdw, pbi;
+ /* Used for last <32-bit fraction of prefix */
+ u32 pbia1, pbia2;
/* check complete u32 in prefix */
pdw = prefixlen >> 5;
@@ -717,7 +719,9 @@ static inline bool ipv6_prefix_equal(con
/* check incomplete u32 in prefix */
pbi = prefixlen & 0x1f;
- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi))))
+ pbia1 = net_hdr_word(&a1[pdw]);
+ pbia2 = net_hdr_word(&a2[pdw]);
+ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi))))
return false;
return true;
@@ -839,13 +843,13 @@ static inline void ipv6_addr_set_v4mappe
*/
static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen)
{
- const __be32 *a1 = token1, *a2 = token2;
+ const struct in6_addr *a1 = token1, *a2 = token2;
int i;
addrlen >>= 2;
for (i = 0; i < addrlen; i++) {
- __be32 xb = a1[i] ^ a2[i];
+ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i];
if (xb)
return i * 32 + 31 - __fls(ntohl(xb));
}
@@ -1040,17 +1044,18 @@ static inline u32 ip6_multipath_hash_fie
static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass,
__be32 flowlabel)
{
- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel;
+ net_hdr_word((__be32 *)hdr) =
+ htonl(0x60000000 | (tclass << 20)) | flowlabel;
}
static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr)
{
- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK;
+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK;
}
static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr)
{
- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK;
+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK;
}
static inline u8 ip6_tclass(__be32 flowinfo)
--- a/include/net/secure_seq.h
+++ b/include/net/secure_seq.h
@@ -3,6 +3,7 @@
#define _NET_SECURE_SEQ
#include <linux/types.h>
+#include <linux/in6.h>
struct net;
--- a/include/uapi/linux/in.h
+++ b/include/uapi/linux/in.h
@@ -91,7 +91,7 @@ enum {
/* Internet address. */
struct in_addr {
__be32 s_addr;
-};
+} __attribute__((packed, aligned(2)));
#endif
#define IP_TOS 1
--- a/net/ipv6/ip6_fib.c
+++ b/net/ipv6/ip6_fib.c
@@ -141,7 +141,7 @@ static __be32 addr_bit_set(const void *t
* See include/asm-generic/bitops/le.h.
*/
return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) &
- addr[fn_bit >> 5];
+ net_hdr_word(&addr[fn_bit >> 5]);
}
struct fib6_info *fib6_info_alloc(gfp_t gfp_flags, bool with_fib6_nh)
--- a/net/netfilter/nf_conntrack_proto_tcp.c
+++ b/net/netfilter/nf_conntrack_proto_tcp.c
@@ -406,7 +406,7 @@ static void tcp_sack(const struct sk_buf
/* Fast path for timestamp-only option */
if (length == TCPOLEN_TSTAMP_ALIGNED
- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24)
+ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24)
| (TCPOPT_NOP << 16)
| (TCPOPT_TIMESTAMP << 8)
| TCPOLEN_TIMESTAMP))
--- a/net/xfrm/xfrm_input.c
+++ b/net/xfrm/xfrm_input.c
@@ -168,8 +168,8 @@ int xfrm_parse_spi(struct sk_buff *skb,
if (!pskb_may_pull(skb, hlen))
return -EINVAL;
- *spi = *(__be32 *)(skb_transport_header(skb) + offset);
- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq);
+ *spi = net_hdr_word(skb_transport_header(skb) + offset);
+ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq);
return 0;
}
EXPORT_SYMBOL(xfrm_parse_spi);
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -4268,14 +4268,16 @@ static bool tcp_parse_aligned_timestamp(
{
const __be32 *ptr = (const __be32 *)(th + 1);
- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16)
- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) {
+ if (net_hdr_word(ptr) ==
+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |
+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) {
tp->rx_opt.saw_tstamp = 1;
++ptr;
- tp->rx_opt.rcv_tsval = ntohl(*ptr);
+ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr);
++ptr;
- if (*ptr)
- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset;
+ if (net_hdr_word(ptr))
+ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) -
+ tp->tsoffset;
else
tp->rx_opt.rcv_tsecr = 0;
return true;
--- a/include/uapi/linux/if_pppox.h
+++ b/include/uapi/linux/if_pppox.h
@@ -51,6 +51,7 @@ struct pppoe_addr {
*/
struct pptp_addr {
__u16 call_id;
+ __u16 pad;
struct in_addr sin_addr;
};
--- a/include/net/neighbour.h
+++ b/include/net/neighbour.h
@@ -286,8 +286,10 @@ static inline bool neigh_key_eq128(const
const u32 *n32 = (const u32 *)n->primary_key;
const u32 *p32 = pkey;
- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) |
- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0;
+ return ((n32[0] ^ net_hdr_word(&p32[0])) |
+ (n32[1] ^ net_hdr_word(&p32[1])) |
+ (n32[2] ^ net_hdr_word(&p32[2])) |
+ (n32[3] ^ net_hdr_word(&p32[3]))) == 0;
}
static inline struct neighbour *___neigh_lookup_noref(
--- a/include/uapi/linux/netfilter_arp/arp_tables.h
+++ b/include/uapi/linux/netfilter_arp/arp_tables.h
@@ -70,7 +70,7 @@ struct arpt_arp {
__u8 flags;
/* Inverse flags */
__u16 invflags;
-};
+} __attribute__((aligned(4)));
/* Values for "flag" field in struct arpt_ip (general arp structure).
* No flags defined yet.
--- a/net/core/utils.c
+++ b/net/core/utils.c
@@ -460,8 +460,14 @@ void inet_proto_csum_replace16(__sum16 *
bool pseudohdr)
{
__be32 diff[] = {
- ~from[0], ~from[1], ~from[2], ~from[3],
- to[0], to[1], to[2], to[3],
+ ~net_hdr_word(&from[0]),
+ ~net_hdr_word(&from[1]),
+ ~net_hdr_word(&from[2]),
+ ~net_hdr_word(&from[3]),
+ net_hdr_word(&to[0]),
+ net_hdr_word(&to[1]),
+ net_hdr_word(&to[2]),
+ net_hdr_word(&to[3]),
};
if (skb->ip_summed != CHECKSUM_PARTIAL) {
*sum = csum_fold(csum_partial(diff, sizeof(diff),
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -555,7 +555,7 @@ static inline bool is_etherdev_addr(cons
* @b: Pointer to Ethernet header
*
* Compare two Ethernet headers, returns 0 if equal.
- * This assumes that the network header (i.e., IP header) is 4-byte
+ * This assumes that the network header (i.e., IP header) is 2-byte
* aligned OR the platform can handle unaligned access. This is the
* case for all packets coming into netif_receive_skb or similar
* entry points.
@@ -578,11 +578,12 @@ static inline unsigned long compare_ethe
fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6);
return fold;
#else
- u32 *a32 = (u32 *)((u8 *)a + 2);
- u32 *b32 = (u32 *)((u8 *)b + 2);
+ const u16 *a16 = a;
+ const u16 *b16 = b;
- return (*(u16 *)a ^ *(u16 *)b) | (a32[0] ^ b32[0]) |
- (a32[1] ^ b32[1]) | (a32[2] ^ b32[2]);
+ return (a16[0] ^ b16[0]) | (a16[1] ^ b16[1]) | (a16[2] ^ b16[2]) |
+ (a16[3] ^ b16[3]) | (a16[4] ^ b16[4]) | (a16[5] ^ b16[5]) |
+ (a16[6] ^ b16[6]);
#endif
}
--- a/net/ipv4/tcp_offload.c
+++ b/net/ipv4/tcp_offload.c
@@ -223,7 +223,7 @@ struct sk_buff *tcp_gro_receive(struct l
th2 = tcp_hdr(p);
- if (*(u32 *)&th->source ^ *(u32 *)&th2->source) {
+ if (net_hdr_word(&th->source) ^ net_hdr_word(&th2->source)) {
NAPI_GRO_CB(p)->same_flow = 0;
continue;
}
@@ -241,8 +241,8 @@ found:
~(TCP_FLAG_CWR | TCP_FLAG_FIN | TCP_FLAG_PSH));
flush |= (__force int)(th->ack_seq ^ th2->ack_seq);
for (i = sizeof(*th); i < thlen; i += 4)
- flush |= *(u32 *)((u8 *)th + i) ^
- *(u32 *)((u8 *)th2 + i);
+ flush |= net_hdr_word((u8 *)th + i) ^
+ net_hdr_word((u8 *)th2 + i);
/* When we receive our second frame we can made a decision on if we
* continue this flow as an atomic flow with a fixed ID or if we use
--- a/net/ipv6/netfilter/ip6table_mangle.c
+++ b/net/ipv6/netfilter/ip6table_mangle.c
@@ -44,7 +44,7 @@ ip6t_mangle_out(void *priv, struct sk_bu
hop_limit = ipv6_hdr(skb)->hop_limit;
/* flowlabel and prio (includes version, which shouldn't change either */
- flowlabel = *((u_int32_t *)ipv6_hdr(skb));
+ flowlabel = net_hdr_word(ipv6_hdr(skb));
ret = ip6t_do_table(priv, skb, state);
@@ -53,7 +53,7 @@ ip6t_mangle_out(void *priv, struct sk_bu
!ipv6_addr_equal(&ipv6_hdr(skb)->daddr, &daddr) ||
skb->mark != mark ||
ipv6_hdr(skb)->hop_limit != hop_limit ||
- flowlabel != *((u_int32_t *)ipv6_hdr(skb)))) {
+ flowlabel != net_hdr_word(ipv6_hdr(skb)))) {
err = ip6_route_me_harder(state->net, state->sk, skb);
if (err < 0)
ret = NF_DROP_ERR(err);

View File

@@ -0,0 +1,121 @@
From: Christopher Hill <ch6574@gmail.com>
Subject: [PATCH] ath79: add Mikrotik rb4xx series drivers
This adds 3 Mikrotik rb4xx series drivers as follows:
rb4xx-cpld: This is in the mfd subsystem, and is the parent CPLD device
that interfaces between the SoC SPI bus and its two children below.
rb4xx-gpio: This is the GPIO expander.
rb4xx-nand: This is the NAND driver.
The history of this code comes in three phases.
1. The first is a May 2015 attempt to push the equivalient ar71xx rb4xx
drivers upstream. See https://lore.kernel.org/patchwork/patch/940880/.
Module-author: Gabor Juhos <juhosg@openwrt.org>
Module-author: Imre Kaloz <kaloz@openwrt.org>
Module-author: Bert Vermeulen <bert@biot.com>
2. Next several ar71xx patches were applied bringing the code current.
commit 7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c
Submitted-by: Hauke Mehrtens <hauke@hauke-m.de>
commit af79fdbe4af32a287798b579141204bda056b8aa
commit 889272d92db689fd9c910243635e44c9d8323095
commit e21cb649a235180563363b8af5ba8296b9ac0baa
commit 7c09fa4a7492ca436f2c94bd9a465b7c5bbeed6f
Submitted-by: Felix Fietkau <nbd@nbd.name>
3. Finally a heavy refactor to split the driver into the three new
subsystems, and updated to work with the device tree configuration, plus
updates and review feedback incorporated
Reviewed-by: Thibaut VARÈNE <hacks@slashdirt.org>
Submitted-by: Christopher Hill <ch6574@gmail.com>
---
drivers/mfd/Kconfig | 8 ++++++++
drivers/mfd/Makefile | 1 +
drivers/gpio/Kconfig | 6 ++++++
drivers/gpio/Makefile | 1 +
drivers/mtd/nand/raw/Kconfig | 7 +++++++
drivers/mtd/nand/raw/Makefile | 1 +
6 files changed, 24 insertions(+)
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -2261,6 +2261,14 @@ config RAVE_SP_CORE
Select this to get support for the Supervisory Processor
device found on several devices in RAVE line of hardware.
+config MFD_RB4XX_CPLD
+ tristate "CPLD driver for Mikrotik RB4xx series boards"
+ select MFD_CORE
+ depends on ATH79 || COMPILE_TEST
+ help
+ Enables support for the CPLD chip (NAND & GPIO) on Mikrotik
+ Routerboard RB4xx series.
+
config SGI_MFD_IOC3
bool "SGI IOC3 core driver"
depends on PCI && MIPS && 64BIT
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -269,6 +269,7 @@ obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-
obj-$(CONFIG_MFD_ACER_A500_EC) += acer-ec-a500.o
obj-$(CONFIG_MFD_QCOM_PM8008) += qcom-pm8008.o
+obj-$(CONFIG_MFD_RB4XX_CPLD) += rb4xx-cpld.o
obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o
obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o
obj-$(CONFIG_MFD_SMPRO) += smpro-core.o
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1696,6 +1696,12 @@ config GPIO_SODAVILLE
help
Say Y here to support Intel Sodaville GPIO.
+config GPIO_RB4XX
+ tristate "GPIO expander for Mikrotik RB4xx series boards"
+ depends on MFD_RB4XX_CPLD
+ help
+ GPIO driver for Mikrotik Routerboard RB4xx series.
+
endmenu
menu "SPI GPIO expanders"
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -131,6 +131,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061.
obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
+obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o
obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o
obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o
obj-$(CONFIG_GPIO_RDA) += gpio-rda.o
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -550,4 +550,11 @@ config MTD_NAND_AR934X
Enables support for NAND controller on Qualcomm Atheros SoCs.
This controller is found on AR934x and QCA955x SoCs.
+config MTD_NAND_RB4XX
+ tristate "Support for NAND driver for Mikrotik RB4xx series boards"
+ depends on MFD_RB4XX_CPLD
+ help
+ Enables support for the NAND flash chip on Mikrotik Routerboard
+ RB4xx series.
+
endif # MTD_RAW_NAND
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -58,6 +58,7 @@ obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rock
obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o
obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o
obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o
+obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o
nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
nand-objs += nand_onfi.o

View File

@@ -0,0 +1,96 @@
From: Denis Kalashnikov <denis281089@gmail.com>
Subject: [PATCH] ath79: add support for reset key on MikroTik RB912UAG-2HPnD
On MikroTik RB91x board series a reset key shares SoC gpio
line #15 with NAND ALE and NAND IO7. So we need a custom
gpio driver to manage this non-trivial connection schema.
Also rb91x-nand needs to have an ability to disable a polling
of the key while it works with NAND.
While we've been integrating rb91x-key into a firmware, we've
figured out that:
* In the gpio-latch driver we need to add a "cansleep" suffix to
several gpiolib calls,
* When gpio-latch and rb91x-nand fail to get a gpio and an error
is -EPROBE_DEFER, they shouldn't report about this, since this
actually is not an error and occurs when the gpio-latch probe
function is called before the rb91x-key probe.
We fix these related things here too.
Submitted-by: Denis Kalashnikov <denis281089@gmail.com>
Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
---
drivers/gpio/Kconfig | 11 +++++++++++
drivers/gpio/Makefile | 2 ++
drivers/mtd/nand/raw/Kconfig | 6 ++++++
drivers/mtd/nand/raw/Makefile | 1 +
7 files changed, 20 insertions(+)
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -371,6 +371,12 @@ config GPIO_IXP4XX
If unsure, say N.
+config GPIO_LATCH_MIKROTIK
+ tristate "MikroTik RouterBOARD GPIO latch support"
+ depends on ATH79
+ help
+ GPIO driver for latch on some MikroTik RouterBOARDs.
+
config GPIO_LOGICVC
tristate "Xylon LogiCVC GPIO support"
depends on MFD_SYSCON && OF
@@ -553,6 +559,10 @@ config GPIO_ROCKCHIP
help
Say yes here to support GPIO on Rockchip SoCs.
+config GPIO_RB91X_KEY
+ tristate "MikroTik RB91x board series reset key support"
+ depends on ATH79
+
config GPIO_SAMA5D2_PIOBU
tristate "SAMA5D2 PIOBU GPIO support"
depends on MFD_SYSCON
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -81,6 +81,7 @@ obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4x
obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o
+obj-$(CONFIG_GPIO_LATCH_MIKROTIK) += gpio-latch-mikrotik.o
obj-$(CONFIG_GPIO_LJCA) += gpio-ljca.o
obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o
obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o
@@ -132,6 +133,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o
+obj-$(CONFIG_GPIO_RB91X_KEY) += gpio-rb91x-key.o
obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o
obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o
obj-$(CONFIG_GPIO_RDA) += gpio-rda.o
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -557,4 +557,10 @@ config MTD_NAND_RB4XX
Enables support for the NAND flash chip on Mikrotik Routerboard
RB4xx series.
+config MTD_NAND_RB91X
+ tristate "MikroTik RB91x NAND driver support"
+ depends on ATH79 && MTD_RAW_NAND
+ help
+ Enables support for the NAND flash chip on MikroTik RB91x series.
+
endif # MTD_RAW_NAND
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-n
obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o
obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o
obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o
+obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o
nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
nand-objs += nand_onfi.o

View File

@@ -11,8 +11,8 @@ FEATURES:=squashfs nand usb pci pcie gpio pwm
CPU_TYPE:=cortex-a9
SUBTARGETS:=generic
KERNEL_PATCHVER:=5.4
KERNEL_TESTING_PATCHVER:=5.15
KERNEL_PATCHVER:=6.6
KERNEL_TESTING_PATCHVER:=5.4
define Target/Description
Build firmware images for Broadcom based BCM47xx/53xx routers with ARM CPU, *not* MIPS.

View File

@@ -0,0 +1,357 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_5301X=y
CONFIG_ARCH_BCM_53573=y
CONFIG_ARCH_BCM_IPROC=y
CONFIG_ARCH_BCM_NSP=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V6_V7=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
CONFIG_ARM_ERRATA_754322=y
CONFIG_ARM_ERRATA_764369=y
CONFIG_ARM_ERRATA_775420=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GLOBAL_TIMER=y
CONFIG_ARM_GT_INITIAL_PRESCALER_VAL=1
CONFIG_ARM_HAS_GROUP_RELOCS=y
CONFIG_ARM_HEAVY_MB=y
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_ARM_SP805_WATCHDOG=y
CONFIG_ARM_THUMB=y
CONFIG_ARM_TIMER_SP804=y
CONFIG_ARM_UNWIND=y
CONFIG_ARM_VIRT_EXT=y
CONFIG_ATAGS=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_B53=y
CONFIG_B53_MDIO_DRIVER=y
CONFIG_B53_SERDES=y
CONFIG_B53_SRAB_DRIVER=y
CONFIG_BCM47XX_NVRAM=y
CONFIG_BCM47XX_SPROM=y
CONFIG_BCM47XX_WDT=y
CONFIG_BCMA=y
CONFIG_BCMA_BLOCKIO=y
CONFIG_BCMA_DEBUG=y
CONFIG_BCMA_DRIVER_GMAC_CMN=y
CONFIG_BCMA_DRIVER_GPIO=y
CONFIG_BCMA_DRIVER_PCI=y
CONFIG_BCMA_FALLBACK_SPROM=y
CONFIG_BCMA_HOST_PCI=y
CONFIG_BCMA_HOST_PCI_POSSIBLE=y
CONFIG_BCMA_HOST_SOC=y
CONFIG_BCMA_SFLASH=y
# CONFIG_BCM_CYGNUS_PHY is not set
CONFIG_BCM_NET_PHYLIB=y
CONFIG_BCM_NS_THERMAL=y
CONFIG_BCM_SR_THERMAL=y
CONFIG_BGMAC=y
CONFIG_BGMAC_BCMA=y
CONFIG_BGMAC_PLATFORM=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOUNCE=y
CONFIG_BROADCOM_PHY=y
CONFIG_CACHE_L2X0=y
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
CONFIG_CLKSRC_MMIO=y
# CONFIG_CLK_BCM_NS2 is not set
CONFIG_CLK_BCM_NSP=y
# CONFIG_CLK_BCM_SR is not set
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_IPROC=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PABRT_V7=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SPECTRE=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_V7=y
CONFIG_CRC16=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BCM_5301X=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
CONFIG_DEBUG_MISC=y
CONFIG_DEBUG_UART_8250=y
CONFIG_DEBUG_UART_8250_SHIFT=0
CONFIG_DEBUG_UART_PHYS=0x18000300
CONFIG_DEBUG_UART_VIRT=0xf1000300
CONFIG_DEBUG_USER=y
CONFIG_DMA_OPS=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_AT24=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXTCON=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_VDSO_32=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_74X164=y
CONFIG_GPIO_BCM_XGS_IPROC=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GRO_CELLS=y
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_SMP=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_BCM2835=y
CONFIG_HZ_FIXED=0
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BCM_IPROC=y
# CONFIG_I2C_SLAVE_TESTUNIT is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_KMAP_LOCAL=y
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
# CONFIG_LEDS_BCM63138 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MDIO_BCM_IPROC=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_BUS_MUX=y
# CONFIG_MDIO_BUS_MUX_BCM_IPROC is not set
CONFIG_MDIO_BUS_MUX_MMIOREG=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGRATION=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_BCM47XXSFLASH=y
CONFIG_MTD_BCM47XX_PARTS=y
CONFIG_MTD_NAND_BRCMNAND=y
CONFIG_MTD_NAND_BRCMNAND_IPROC=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_OF_PARTS_LINKSYS_NS=y
CONFIG_MTD_PARSER_TPLINK_SAFELOADER=y
CONFIG_MTD_PARSER_TRX=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_SEAMA_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SRCU_NMI_SAFE=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_QCA8K=y
CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT=y
CONFIG_NET_DSA_TAG_BRCM=y
CONFIG_NET_DSA_TAG_BRCM_COMMON=y
CONFIG_NET_DSA_TAG_BRCM_LEGACY=y
CONFIG_NET_DSA_TAG_BRCM_PREPEND=y
CONFIG_NET_DSA_TAG_NONE=y
CONFIG_NET_DSA_TAG_QCA=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NR_CPUS=2
CONFIG_NVMEM=y
CONFIG_NVMEM_BRCM_NVRAM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_SYSFS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OUTER_CACHE=y
CONFIG_OUTER_CACHE_SYNC=y
CONFIG_PADATA=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI=y
CONFIG_PCIE_IPROC=y
CONFIG_PCIE_IPROC_BCMA=y
# CONFIG_PCIE_IPROC_PLATFORM is not set
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
# CONFIG_PHY_BCM_NS_USB2 is not set
# CONFIG_PHY_BCM_NS_USB3 is not set
# CONFIG_PHY_BCM_SR_PCIE is not set
CONFIG_PHY_BCM_SR_USB=y
# CONFIG_PHY_BRCM_SATA is not set
# CONFIG_PHY_NS2_USB_DRD is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IPROC_GPIO=y
CONFIG_PINCTRL_NS=y
# CONFIG_PINCTRL_NS2_MUX is not set
CONFIG_PINCTRL_NSP_GPIO=y
CONFIG_PINCTRL_NSP_MUX=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_BCM_IPROC=y
CONFIG_PWM_SYSFS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SGL_ALLOC=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BCM_QSPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SWPHY=y
CONFIG_SWP_EMULATE=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
# CONFIG_VFP is not set
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

View File

@@ -105,6 +105,10 @@ define Build/seama-nand
-i $@.entity
endef
ifdef CONFIG_LINUX_6_6
DTS_DIR := $(DTS_DIR)/broadcom
endif
DEVICE_VARS += ASUS_PRODUCTID
DEVICE_VARS += BUFFALO_TAG_PLATFORM BUFFALO_TAG_VERSION BUFFALO_TAG_MINOR
DEVICE_VARS += SIGNATURE

View File

@@ -0,0 +1,56 @@
From 5cbee5828219c4f7b33e96b5d8ce5e467b2857c8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 1 Sep 2023 12:55:49 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Set MACs for D-Link DIR-885L
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Specify NVRAM access and use its "et2macaddr" NVMEM cell.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230901105549.7076-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
.../dts/broadcom/bcm47094-dlink-dir-885l.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
--- a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts
@@ -25,6 +25,15 @@
<0x88000000 0x08000000>;
};
+ nvram@1e3f0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1e3f0000 0x10000>;
+
+ et2macaddr: et2macaddr {
+ #nvmem-cell-cells = <1>;
+ };
+ };
+
nand_controller: nand-controller@18028000 {
nand@0 {
partitions {
@@ -112,6 +121,11 @@
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
+&gmac0 {
+ nvmem-cells = <&et2macaddr 0>;
+ nvmem-cell-names = "mac-address";
+};
+
&spi_nor {
status = "okay";
};
@@ -142,6 +156,8 @@
port@4 {
label = "wan";
+ nvmem-cells = <&et2macaddr 3>;
+ nvmem-cell-names = "mac-address";
};
port@5 {

View File

@@ -0,0 +1,44 @@
From a9e79863b62aaaefcdf469fc331bf482ae00db0d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 1 Sep 2023 14:43:11 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Set MAC address for Asus RT-AC87U
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Specify NVRAM access and use its "et1macaddr" NVMEM cell.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230901124311.31156-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac87u.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac87u.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac87u.dts
@@ -25,6 +25,12 @@
<0x88000000 0x08000000>;
};
+ nvram@1c080000 {
+ et1macaddr: et1macaddr {
+ #nvmem-cell-cells = <1>;
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -62,6 +68,11 @@
};
};
+&gmac0 {
+ nvmem-cells = <&et1macaddr 0>;
+ nvmem-cell-names = "mac-address";
+};
+
&usb3_phy {
status = "okay";
};

View File

@@ -0,0 +1,57 @@
From 81ea360a16978a4df61df9db56b171909bd659c0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sat, 16 Sep 2023 10:30:57 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Relicense Felix's code to the GPL 2.0+ /
MIT
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Move code added by Felix to the bcm-ns.dtsi which uses dual licensing.
That syncs more Northstar code to be based on the same licensing schema.
This code was added in the commit 1ff80363524c ("ARM: BCM5301X: Add
profiling support").
Cc: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Felix Fietkau <nbd@nbd.name>
Link: https://lore.kernel.org/r/20230916083057.10458-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 7 +++++++
arch/arm/boot/dts/broadcom/bcm5301x.dtsi | 7 -------
2 files changed, 7 insertions(+), 7 deletions(-)
--- a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
@@ -14,6 +14,13 @@
#address-cells = <1>;
#size-cells = <1>;
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupts =
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
chipcommon-a-bus@18000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x18000000 0x00001000>;
--- a/arch/arm/boot/dts/broadcom/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm5301x.dtsi
@@ -26,13 +26,6 @@
};
};
- pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupts =
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- };
-
clocks {
#address-cells = <1>;
#size-cells = <1>;

View File

@@ -0,0 +1,104 @@
From b8d4f7c1be04d66c37c119c501c87bccc4197694 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sat, 16 Sep 2023 10:58:55 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Relicense Vivek's code to the GPL 2.0+ /
MIT
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Move code added by Vivek to the bcm-ns.dtsi which uses dual licensing.
That syncs more Northstar code to be based on the same licensing schema.
This code was added in the commit 37f6130ec39f ("ARM: dts: BCM5301X:
Make USB 3.0 PHY use MDIO PHY driver").
Cc: Vivek Unune <npcomplete13@gmail.com>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Vivek Unune <npcomplete13@gmail.com>
Link: https://lore.kernel.org/r/20230916085855.28375-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 27 ++++++++++++++++++++++++
arch/arm/boot/dts/broadcom/bcm5301x.dtsi | 27 ------------------------
2 files changed, 27 insertions(+), 27 deletions(-)
--- a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
@@ -327,6 +327,29 @@
#address-cells = <1>;
};
+ mdio-mux@18003000 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x18003000 0x4>;
+ mux-mask = <0x200>;
+
+ mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb3_phy: usb3-phy@10 {
+ compatible = "brcm,ns-ax-usb3-phy";
+ reg = <0x10>;
+ usb3-dmp-syscon = <&usb3_dmp>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
+ };
+
rng: rng@18004000 {
compatible = "brcm,bcm5301x-rng";
reg = <0x18004000 0x14>;
@@ -467,6 +490,10 @@
brcm,nand-has-wp;
};
+ usb3_dmp: syscon@18105000 {
+ reg = <0x18105000 0x1000>;
+ };
+
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
--- a/arch/arm/boot/dts/broadcom/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm5301x.dtsi
@@ -62,33 +62,6 @@
};
};
- mdio-mux@18003000 {
- compatible = "mdio-mux-mmioreg", "mdio-mux";
- mdio-parent-bus = <&mdio>;
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x18003000 0x4>;
- mux-mask = <0x200>;
-
- mdio@0 {
- reg = <0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- usb3_phy: usb3-phy@10 {
- compatible = "brcm,ns-ax-usb3-phy";
- reg = <0x10>;
- usb3-dmp-syscon = <&usb3_dmp>;
- #phy-cells = <0>;
- status = "disabled";
- };
- };
- };
-
- usb3_dmp: syscon@18105000 {
- reg = <0x18105000 0x1000>;
- };
-
i2c0: i2c@18009000 {
compatible = "brcm,iproc-i2c";
reg = <0x18009000 0x50>;

View File

@@ -0,0 +1,377 @@
From 473baeab929444295b0530f8766e4becb6a08973 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 13 Oct 2023 12:33:13 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Explicitly disable unused switch CPU
ports
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
When redescribing ports I assumed that missing "label" (like "cpu")
means switch port isn't used. That was incorrect and I realized my
change made Linux always use the first (5) CPU port (there are 3 of
them).
While above should technically be possible it often isn't correct:
1. Non-default switch ports are often connected to Ethernet interfaces
not fully covered by vendor setup (they may miss MACs)
2. On some devices non-default ports require specifying fixed link
This fixes network connectivity for some devices. It was reported &
tested for Netgear R8000. It also affects Linksys EA9200 with its
downstream DTS.
Fixes: ba4aebce23b2 ("ARM: dts: BCM5301X: Describe switch ports in the main DTS")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20231013103314.10306-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
.../dts/broadcom/bcm4708-buffalo-wzr-1166dhp-common.dtsi | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm4708-luxul-xap-1510.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm4708-luxul-xwc-1000.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm4708-netgear-r6250.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm4708-smartrg-sr400ac.dts | 8 ++++++++
.../boot/dts/broadcom/bcm47081-buffalo-wzr-600dhp2.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm47081-luxul-xap-1410.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm47081-luxul-xwr-1200.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm47094-luxul-abr-4500.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm47094-luxul-xbr-4500.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm47094-luxul-xwc-2000.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3100.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm53016-meraki-mr32.dts | 8 ++++++++
arch/arm/boot/dts/broadcom/bcm953012er.dts | 8 ++++++++
20 files changed, 160 insertions(+)
--- a/arch/arm/boot/dts/broadcom/bcm4708-buffalo-wzr-1166dhp-common.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm4708-buffalo-wzr-1166dhp-common.dtsi
@@ -189,5 +189,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm4708-luxul-xap-1510.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-luxul-xap-1510.dts
@@ -93,5 +93,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm4708-luxul-xwc-1000.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-luxul-xwc-1000.dts
@@ -96,5 +96,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm4708-netgear-r6250.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-netgear-r6250.dts
@@ -130,5 +130,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm4708-smartrg-sr400ac.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-smartrg-sr400ac.dts
@@ -153,6 +153,14 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm47081-buffalo-wzr-600dhp2.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47081-buffalo-wzr-600dhp2.dts
@@ -153,5 +153,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm47081-luxul-xap-1410.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47081-luxul-xap-1410.dts
@@ -89,5 +89,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm47081-luxul-xwr-1200.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47081-luxul-xwr-1200.dts
@@ -156,5 +156,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts
@@ -235,6 +235,14 @@
status = "disabled";
};
+ port@5 {
+ status = "disabled";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
port@8 {
label = "cpu";
};
--- a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts
@@ -168,6 +168,14 @@
status = "disabled";
};
+ port@5 {
+ status = "disabled";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
port@8 {
label = "cpu";
};
--- a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts
@@ -200,6 +200,14 @@
status = "disabled";
};
+ port@5 {
+ status = "disabled";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
port@8 {
label = "cpu";
phy-mode = "rgmii";
--- a/arch/arm/boot/dts/broadcom/bcm47094-luxul-abr-4500.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-luxul-abr-4500.dts
@@ -115,5 +115,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts
@@ -128,5 +128,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xbr-4500.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xbr-4500.dts
@@ -115,5 +115,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwc-2000.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwc-2000.dts
@@ -83,5 +83,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3100.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3100.dts
@@ -155,5 +155,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts
@@ -166,5 +166,13 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
+++ b/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
@@ -132,6 +132,14 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm53016-meraki-mr32.dts
+++ b/arch/arm/boot/dts/broadcom/bcm53016-meraki-mr32.dts
@@ -193,6 +193,14 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};
--- a/arch/arm/boot/dts/broadcom/bcm953012er.dts
+++ b/arch/arm/boot/dts/broadcom/bcm953012er.dts
@@ -92,6 +92,14 @@
port@8 {
status = "disabled";
};
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
};
};

View File

@@ -0,0 +1,47 @@
From d313b0e9070a7100ca55e64fe3b081d176d8806d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 13 Oct 2023 12:33:14 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Set fixed-link for extra Netgear R8000
CPU ports
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Ports 5 and 7 are disabled by default because the standard use case is
for port 8 to manage all CPU directed traffic. For experimentation
purposes however it is desirable to provide adequate properties such
that people can experiment with using different ports without having to
figure out their configuration. Some of the use cases include but are
not limited to doubling or tripling the bandwidth by leveraging the
additional ports/Ethernet MAC combinations.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20231013103314.10306-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts
@@ -237,10 +237,20 @@
port@5 {
status = "disabled";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
port@7 {
status = "disabled";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
port@8 {

View File

@@ -0,0 +1,63 @@
From 253358f373492608348136e569366d73cb969f6a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 24 Oct 2023 09:26:05 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Set switch ports for Linksys EA9200
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This patch was developed as OpenWrt downstream change and was recently
confirmed to work as expected.
Tested-by: Rani Hod <rani.hod@gmail.com>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20231024072605.32517-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
.../dts/broadcom/bcm4709-linksys-ea9200.dts | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
--- a/arch/arm/boot/dts/broadcom/bcm4709-linksys-ea9200.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-linksys-ea9200.dts
@@ -47,3 +47,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ status = "disabled";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ label = "cpu";
+ };
+ };
+};

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@@ -0,0 +1,64 @@
From ed0d78c75ca93c9f1d7f0d08ac5abe0de71fe312 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 16 May 2024 10:47:37 +0200
Subject: [PATCH] ARM: dts: broadcom: convert NVMEM content to layout syntax
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Use cleaner (and non-deprecated) bindings syntax. See commit
bd912c991d2e ("dt-bindings: nvmem: layouts: add fixed-layout") for
details.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20240516084737.2789-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm53016-meraki-mr32.dts | 12 ++++++++----
.../dts/broadcom/bcm958625-meraki-mx6x-common.dtsi | 12 ++++++++----
2 files changed, 16 insertions(+), 8 deletions(-)
--- a/arch/arm/boot/dts/broadcom/bcm53016-meraki-mr32.dts
+++ b/arch/arm/boot/dts/broadcom/bcm53016-meraki-mr32.dts
@@ -223,11 +223,15 @@
reg = <0x50>;
pagesize = <32>;
read-only;
- #address-cells = <1>;
- #size-cells = <1>;
- mac_address: mac-address@66 {
- reg = <0x66 0x6>;
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mac_address: mac-address@66 {
+ reg = <0x66 0x6>;
+ };
};
};
};
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
@@ -55,11 +55,15 @@
reg = <0x50>;
pagesize = <32>;
read-only;
- #address-cells = <1>;
- #size-cells = <1>;
- mac_address: mac-address@66 {
- reg = <0x66 0x6>;
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mac_address: mac-address@66 {
+ reg = <0x66 0x6>;
+ };
};
};
};

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@@ -0,0 +1,52 @@
From ad1915e2070cf832bfb81dcbeb44b073c09e6dcc Mon Sep 17 00:00:00 2001
From: Rosen Penev <rosenp@gmail.com>
Date: Sun, 20 Oct 2024 18:51:47 -0700
Subject: [PATCH] ARM: dts: meraki-mr26: set mac address for gmac0
Currently this needs to be done in userspace.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://lore.kernel.org/r/20241021015147.172700-1-rosenp@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
.../dts/broadcom/bcm53015-meraki-mr26.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
--- a/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
+++ b/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
@@ -59,6 +59,9 @@
&gmac0 {
status = "okay";
+
+ nvmem-cells = <&macaddr_board_config_66>;
+ nvmem-cell-names = "mac-address";
};
&gmac1 {
@@ -102,8 +105,25 @@
};
partition@800000 {
+ compatible = "linux,ubi";
label = "ubi";
reg = <0x800000 0x7780000>;
+
+ volumes {
+ ubi-volume-board-config {
+ volname = "board-config";
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_board_config_66: macaddr@66 {
+ reg = <0x66 0x6>;
+ };
+ };
+ };
+ };
};
};
};

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@@ -0,0 +1,67 @@
From c18e0b14b466fb0aa17c8ca6e61f16ba1254aebd Mon Sep 17 00:00:00 2001
From: Rosen Penev <rosenp@gmail.com>
Date: Sun, 24 Nov 2024 12:58:51 -0800
Subject: [PATCH] ARM: dts: meraki-mr26: wifi MACs in dts
OPENWRT HACK. Probably will not be accepted upstream.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
.../dts/broadcom/bcm53015-meraki-mr26.dts | 31 ++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
+++ b/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
@@ -60,7 +60,7 @@
&gmac0 {
status = "okay";
- nvmem-cells = <&macaddr_board_config_66>;
+ nvmem-cells = <&macaddr_board_config_66 0>;
nvmem-cell-names = "mac-address";
};
@@ -74,6 +74,33 @@
status = "disabled";
};
+&pcie0 {
+ wifi@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ compatible = "brcm,bcm43431";
+ nvmem-cells = <&macaddr_board_config_66 1>;
+ nvmem-cell-names = "mac-address";
+ };
+};
+
+&pcie1 {
+ wifi@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ compatible = "brcm,bcm43431";
+ nvmem-cells = <&macaddr_board_config_66 2>;
+ nvmem-cell-names = "mac-address";
+ };
+};
+
+&pcie2 {
+ wifi@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ compatible = "brcm,bcm43428";
+ nvmem-cells = <&macaddr_board_config_66 3>;
+ nvmem-cell-names = "mac-address";
+ };
+};
+
&nandcs {
partitions {
compatible = "fixed-partitions";
@@ -119,7 +146,9 @@
#size-cells = <1>;
macaddr_board_config_66: macaddr@66 {
+ compatible = "mac-base";
reg = <0x66 0x6>;
+ #nvmem-cell-cells = <1>;
};
};
};

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@@ -0,0 +1,43 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 13 Apr 2021 18:25:20 +0200
Subject: [PATCH] mtd: parsers: trx: parse "firmware" MTD partitions only
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Parsing every partition with "compatible" set to "brcm,trx" results in
parsing both: firmware partition and failsafe partition on devices that
implement failsafe booting. This affects e.g. Linksys EA9500 which has:
partition@200000 {
reg = <0x0200000 0x01d00000>;
compatible = "linksys,ns-firmware", "brcm,trx";
};
partition@1f00000 {
reg = <0x01f00000 0x01d00000>;
compatible = "linksys,ns-firmware", "brcm,trx";
};
Check for MTD partition name "firmware" before parsing. Recently added
ofpart_linksys_ns.c creates "firmware" and "failsafe" depending on
bootloader setup.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/mtd/parsers/parser_trx.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/mtd/parsers/parser_trx.c
+++ b/drivers/mtd/parsers/parser_trx.c
@@ -92,6 +92,10 @@ static int parser_trx_parse(struct mtd_i
if (err != 0 && err != -EINVAL)
pr_err("failed to parse \"brcm,trx-magic\" DT attribute, using default: %d\n", err);
+ /* Don't parse any failsafe / backup partitions */
+ if (strcmp(mtd->name, "firmware"))
+ return -EINVAL;
+
parts = kcalloc(TRX_PARSER_MAX_PARTS, sizeof(struct mtd_partition),
GFP_KERNEL);
if (!parts)

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@@ -0,0 +1,113 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sat, 1 Oct 2016 22:54:48 +0200
Subject: [PATCH] usb: xhci: add support for performing fake doorbell
Broadcom's Northstar XHCI controllers seem to need a special start
procedure to work correctly. There isn't any official documentation of
this, the problem is that controller doesn't detect any connected
devices with default setup. Moreover connecting USB device to controller
that doesn't run properly can cause SoC's watchdog issues.
A workaround that was successfully tested on multiple devices is to
perform a fake doorbell. This patch adds code for doing this and enables
it on BCM4708 family.
---
drivers/usb/host/xhci-plat.c | 6 +++++
drivers/usb/host/xhci.c | 63 +++++++++++++++++++++++++++++++++++++++++---
drivers/usb/host/xhci.h | 1 +
3 files changed, 67 insertions(+), 3 deletions(-)
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -77,8 +77,13 @@ static int xhci_priv_resume_quirk(struct
static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci)
{
struct xhci_plat_priv *priv = xhci_to_priv(xhci);
+ struct platform_device*pdev = to_platform_device(dev);
+ struct device_node *node = pdev->dev.of_node;
xhci->quirks |= priv->quirks;
+
+ if (node && of_machine_is_compatible("brcm,bcm4708"))
+ xhci->quirks |= XHCI_FAKE_DOORBELL;
}
/* called during probe() after chip reset completes */
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -162,6 +162,49 @@ int xhci_start(struct xhci_hcd *xhci)
return ret;
}
+/**
+ * xhci_fake_doorbell - Perform a fake doorbell on a specified slot
+ *
+ * Some controllers require a fake doorbell to start correctly. Without that
+ * they simply don't detect any devices.
+ */
+static int xhci_fake_doorbell(struct xhci_hcd *xhci, int slot_id)
+{
+ u32 temp;
+
+ /* Alloc a virt device for that slot */
+ if (!xhci_alloc_virt_device(xhci, slot_id, NULL, GFP_NOIO)) {
+ xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
+ return -ENOMEM;
+ }
+
+ /* Ring fake doorbell for slot_id ep 0 */
+ xhci_ring_ep_doorbell(xhci, slot_id, 0, 0);
+ usleep_range(1000, 1500);
+
+ /* Read the status to check if HSE is set or not */
+ temp = readl(&xhci->op_regs->status);
+
+ /* Clear HSE if set */
+ if (temp & STS_FATAL) {
+ xhci_dbg(xhci, "HSE problem detected, status: 0x%08x\n", temp);
+ temp &= ~0x1fff;
+ temp |= STS_FATAL;
+ writel(temp, &xhci->op_regs->status);
+ usleep_range(1000, 1500);
+ readl(&xhci->op_regs->status);
+ }
+
+ /* Free virt device */
+ xhci_free_virt_device(xhci, slot_id);
+
+ /* We're done if controller is already running */
+ if (readl(&xhci->op_regs->command) & CMD_RUN)
+ return 0;
+
+ return xhci_start(xhci);
+}
+
/*
* Reset a halted HC.
*
@@ -481,6 +524,15 @@ static int xhci_run_finished(struct xhci
return -ENODEV;
}
+ if (xhci->quirks & XHCI_FAKE_DOORBELL) {
+ int err = xhci_fake_doorbell(xhci, 1);
+ if (err) {
+ xhci_halt(xhci);
+ spin_unlock_irqrestore(&xhci->lock, flags);
+ return err;
+ }
+ }
+
xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
if (xhci->quirks & XHCI_NEC_HOST)
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1662,6 +1662,7 @@ struct xhci_hcd {
#define XHCI_WRITE_64_HI_LO BIT_ULL(47)
#define XHCI_CDNS_SCTX_QUIRK BIT_ULL(48)
#define XHCI_ETRON_HOST BIT_ULL(49)
+#define XHCI_FAKE_DOORBELL BIT_ULL(50)
unsigned int num_active_eps;
unsigned int limit_active_eps;

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@@ -0,0 +1,111 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 24 Sep 2014 22:14:07 +0200
Subject: [PATCH] ARM: BCM5301X: Disable MMU and Dcache during decompression
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Broadcom devices have broken CFE (bootloader) that leaves hardware in an
invalid state. It causes problems with booting Linux. On Northstar
devices kernel was randomly hanging in ~25% of tries during early init.
Hangs used to happen at random places in the start_kernel. On BCM53573
kernel doesn't even seem to start booting.
To workaround this problem we need to do following very early:
1) Clear 2 following bits in the SCTLR register:
#define CR_M (1 << 0) /* MMU enable */
#define CR_C (1 << 2) /* Dcache enable */
2) Flush the whole D-cache
3) Disable L2 cache
Unfortunately this patch is not upstreamable as it does above things
unconditionally. We can't check if we are running on Broadcom platform
in any safe way and doing such hacks with ARCH_MULTI_V7 is unacceptable
as it could break other devices support.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -36,6 +36,11 @@ ifeq ($(CONFIG_ARCH_ACORN),y)
OBJS += ll_char_wr.o font.o
endif
+ifeq ($(CONFIG_ARCH_BCM_5301X),y)
+OBJS += head-bcm_5301x-mpcore.o
+OBJS += cache-v7-min.o
+endif
+
ifeq ($(CONFIG_ARCH_SA1100),y)
OBJS += head-sa1100.o
endif
--- /dev/null
+++ b/arch/arm/boot/compressed/head-bcm_5301x-mpcore.S
@@ -0,0 +1,37 @@
+/*
+ *
+ * Platform specific tweaks. This is merged into head.S by the linker.
+ *
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/cp15.h>
+
+ .section ".start", "ax"
+
+/*
+ * This code section is spliced into the head code by the linker
+ */
+
+__plat_uncompress_start:
+
+ @ Preserve r8/r7 i.e. kernel entry values
+ mov r12, r8
+
+ @ Clear MMU enable and Dcache enable bits
+ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR
+ bic r0, #CR_C|CR_M
+ mcr p15, 0, r0, c1, c0, 0 @ Write SCTLR
+ nop
+
+ @ Call the cache invalidation routine
+ bl v7_flush_dcache_all
+ nop
+ mov r0,#0
+ ldr r3, =0x19022000 @ L2 cache controller, control reg
+ str r0, [r3, #0x100] @ Disable L2 cache
+ nop
+
+ @ Restore
+ mov r8, r12
--- a/arch/arm/boot/compressed/cache-v7-min.S
+++ b/arch/arm/boot/compressed/cache-v7-min.S
@@ -12,6 +12,7 @@
#include <linux/linkage.h>
#include <linux/init.h>
+#include <asm/assembler.h>
__INIT
@@ -63,7 +64,7 @@ loop2:
ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11
THUMB( lsl r6, r9, r2 )
THUMB( orr r11, r11, r6 ) @ factor index number into r11
- mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
+ mcr p15, 0, r11, c7, c6, 2 @ clean & invalidate by set/way
subs r9, r9, #1 @ decrement the index
bge loop2
subs r4, r4, #1 @ decrement the way
--- a/arch/arm/boot/compressed/vmlinux.lds.S
+++ b/arch/arm/boot/compressed/vmlinux.lds.S
@@ -41,6 +41,7 @@ SECTIONS
*(.start)
*(.text)
*(.text.*)
+ *(.init.text)
ARM_STUBS_TEXT
}
.table : ALIGN(4) {

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@@ -0,0 +1,675 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Subject: [PATCH] ARM: dts: BCM5301X: Specify switch ports for remaining
devices
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dts
@@ -92,3 +92,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac68u.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac68u.dts
@@ -83,3 +83,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4708-buffalo-wzr-1750dhp.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-buffalo-wzr-1750dhp.dts
@@ -149,3 +149,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6300-v1.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6300-v1.dts
@@ -46,3 +46,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts
@@ -43,3 +43,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4708-netgear-r6300-v2.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-netgear-r6300-v2.dts
@@ -86,3 +86,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm47081-asus-rt-n18u.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47081-asus-rt-n18u.dts
@@ -77,3 +77,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac87u.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac87u.dts
@@ -77,6 +77,40 @@
status = "okay";
};
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@5 {
+ status = "disabled";
+ };
+
+ port@7 {
+ label = "cpu";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
+
&nandcs {
partitions {
compatible = "fixed-partitions";
--- a/arch/arm/boot/dts/broadcom/bcm4709-buffalo-wxr-1900dhp.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-buffalo-wxr-1900dhp.dts
@@ -130,3 +130,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4709-netgear-r7000.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-netgear-r7000.dts
@@ -104,3 +104,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm47094-netgear-r8500.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-netgear-r8500.dts
@@ -94,3 +94,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ status = "disabled";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ label = "cpu";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts
@@ -38,6 +38,40 @@
status = "okay";
};
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
+
&nandcs {
partitions {
compatible = "fixed-partitions";
--- a/arch/arm/boot/dts/broadcom/bcm47081-tplink-archer-c5-v2.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47081-tplink-archer-c5-v2.dts
@@ -91,6 +91,44 @@
};
};
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
+
&spi_nor {
status = "okay";
--- a/arch/arm/boot/dts/broadcom/bcm4709-tplink-archer-c9-v1.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-tplink-archer-c9-v1.dts
@@ -100,6 +100,44 @@
vcc-gpio = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
};
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
+
&spi_nor {
status = "okay";
--- a/arch/arm/boot/dts/broadcom/bcm47081-buffalo-wzr-900dhp.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47081-buffalo-wzr-900dhp.dts
@@ -107,3 +107,42 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
+

View File

@@ -0,0 +1,64 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Subject: [PATCH] ARM: BCM5301X: Add DT for Netgear R7900
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
--- a/arch/arm/boot/dts/broadcom/Makefile
+++ b/arch/arm/boot/dts/broadcom/Makefile
@@ -68,6 +68,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm4709-buffalo-wxr-1900dhp.dtb \
bcm4709-linksys-ea9200.dtb \
bcm4709-netgear-r7000.dtb \
+ bcm4709-netgear-r7900.dtb \
bcm4709-netgear-r8000.dtb \
bcm4709-tplink-archer-c9-v1.dtb \
bcm47094-asus-rt-ac3100.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/broadcom/bcm4709-netgear-r7900.dts
@@ -0,0 +1,42 @@
+/*
+ * Broadcom BCM470X / BCM5301X ARM platform code.
+ * DTS for Netgear R7900
+ *
+ * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+
+/dts-v1/;
+
+#include "bcm4709.dtsi"
+#include "bcm5301x-nand-cs0-bch8.dtsi"
+
+/ {
+ compatible = "netgear,r7900", "brcm,bcm4709", "brcm,bcm4708";
+ model = "Netgear R7900";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ memory {
+ reg = <0x00000000 0x08000000
+ 0x88000000 0x08000000>;
+ };
+
+ axi@18000000 {
+ usb3@23000 {
+ reg = <0x00023000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

View File

@@ -0,0 +1,52 @@
From 35bba88e75311242841dde83073c211310ec0259 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Wed, 4 May 2022 08:07:06 +0100
Subject: [PATCH] bcm53xx: partition fixups for Meraki MX64/MX65
We need to enlarge the u-boot partition to add extra features like UBI
booting. The shmoo and newly created env partitions can easily be moved
to the nvram partition. This fixup allows u-boot to be enlarged to up to
1MiB.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
---
arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
@@ -84,13 +84,7 @@
partition@0 {
label = "u-boot";
- reg = <0x0 0x80000>;
- read-only;
- };
-
- partition@80000 {
- label = "shmoo";
- reg = <0x80000 0x80000>;
+ reg = <0x0 0x100000>;
read-only;
};
@@ -101,7 +95,18 @@
partition@400000 {
label = "nvram";
- reg = <0x400000 0x100000>;
+ reg = <0x400000 0x40000>;
+ };
+
+ partition@440000 {
+ label = "u-boot-env";
+ reg = <0x440000 0x40000>;
+ };
+
+ partition@480000 {
+ label = "shmoo";
+ reg = <0x480000 0x80000>;
+ read-only;
};
partition@500000 {

View File

@@ -0,0 +1,83 @@
From 9f4e68261b89df87457f46999c471d11754b5de2 Mon Sep 17 00:00:00 2001
From: Lech Perczak <lech.perczak@gmail.com>
Date: Sun, 6 Oct 2024 15:57:44 +0200
Subject: [PATCH] bcm53xx: dts: meraki-mx6x: add OpenWrt-specific LED aliases
Assign green power LED for "boot", "running", orange for "upgrade" and
red for "failsafe" functions - the same as done for MR33 and MR74.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
---
arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi | 9 ++++++++-
arch/arm/boot/dts/broadcom/bcm958625-meraki-kingpin.dtsi | 8 +++++++-
.../boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi | 4 ++--
3 files changed, 17 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi
@@ -8,6 +8,13 @@
#include "bcm958625-meraki-mx6x-common.dtsi"
/ {
+ aliases {
+ led-boot = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_fault;
+ led-failsafe = &led_failsafe;
+ };
+
keys {
compatible = "gpio-keys-polled";
autorepeat;
@@ -55,7 +62,7 @@
gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
};
- led-4 {
+ led_fault: led-4 {
/* amber:power */
function = LED_FUNCTION_FAULT;
color = <LED_COLOR_ID_AMBER>;
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-kingpin.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-kingpin.dtsi
@@ -8,6 +8,12 @@
#include "bcm958625-meraki-mx6x-common.dtsi"
/ {
+ aliases {
+ led-boot = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_fault;
+ led-failsafe = &led_failsafe;
+ };
keys {
compatible = "gpio-keys-polled";
@@ -104,7 +110,7 @@
gpios = <&gpioa 29 GPIO_ACTIVE_LOW>;
};
- led-a {
+ led_fault: led-a {
/* amber:power */
function = LED_FUNCTION_FAULT;
color = <LED_COLOR_ID_AMBER>;
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
@@ -14,14 +14,14 @@
pwm-leds {
compatible = "pwm-leds";
- led-1 {
+ led_failsafe: led-1 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_RED>;
pwms = <&pwm 1 50000>;
max-brightness = <255>;
};
- led-2 {
+ led_power: led-2 {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
pwms = <&pwm 2 50000>;

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