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7fbdfbe3c1
Change-Id: Ibfb4409962e4f35fdcc73cf239253b44a86a52ce Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
92 lines
2.2 KiB
C
92 lines
2.2 KiB
C
/* SPDX-License-Identifier: Apache-2.0 OR MIT */
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*/
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#ifndef __KMPP_FRAME_IMPL_H__
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#define __KMPP_FRAME_IMPL_H__
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#include "kmpp_frame.h"
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typedef struct KmppFrameImpl_t {
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const char *name;
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KmppObj obj;
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/*
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* dimension parameter for display
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*/
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rk_u32 width;
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rk_u32 height;
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rk_u32 hor_stride;
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rk_u32 ver_stride;
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rk_u32 hor_stride_pixel;
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rk_u32 offset_x;
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rk_u32 offset_y;
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/*
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* poc - picture order count
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*/
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rk_u32 poc;
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/*
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* pts - display time stamp
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* dts - decode time stamp
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*/
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rk_s64 pts;
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rk_s64 dts;
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/*
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* eos - end of stream
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* info_change - set when buffer resized or frame infomation changed
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*/
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rk_u32 eos;
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MppFrameColorRange color_range;
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MppFrameColorPrimaries color_primaries;
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MppFrameColorTransferCharacteristic color_trc;
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/**
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* YUV colorspace type.
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* It must be accessed using av_frame_get_colorspace() and
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* av_frame_set_colorspace().
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* - encoding: Set by user
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* - decoding: Set by libavcodec
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*/
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MppFrameColorSpace colorspace;
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MppFrameChromaLocation chroma_location;
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MppFrameFormat fmt;
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MppFrameRational sar;
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/*
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* buffer information
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* NOTE: buf_size only access internally
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*/
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KmppShmPtr buffer;
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size_t buf_size;
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RK_U32 buf_fd;
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/*
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* frame buffer compression (FBC) information
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*
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* NOTE: some constraint on fbc data
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* 1. FBC config need two addresses but only one buffer.
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* The second address should be represented by base + offset form.
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* 2. FBC has header address and payload address
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* Both addresses should be 4K aligned.
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* 3. The header section size is default defined by:
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* header size = aligned(aligned(width, 16) * aligned(height, 16) / 16, 4096)
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* 4. The stride in header section is defined by:
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* stride = aligned(width, 16)
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*/
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rk_u32 fbc_offset;
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rk_u32 is_gray;
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KmppShmPtr meta;
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KmppMeta self_meta;
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} KmppFrameImpl;
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typedef struct KmppFramePriv_t {
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KmppMeta meta;
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} KmppFramePriv;
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#endif /* __KMPP_FRAME_IMPL_H__ */
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