mirror of
https://github.com/nyanmisaka/mpp.git
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fe4b86b025
1. Update OSD palette config API. User must specify palette is default or user defined. 2. OSD palette config will go through control and OSD data (region) config will go through meta data in each frame. 3. Remove unused code. 4. Add mpi_enc_utils for mpi_enc_test cases Change-Id: Ib4aeb60789a3e999446212841508e604533efb3c Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
197 lines
9.0 KiB
C
197 lines
9.0 KiB
C
/*
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* Copyright 2015 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __RK_MPI_CMD_H__
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#define __RK_MPI_CMD_H__
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/*
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* Command id bit usage is defined as follows:
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* bit 20 - 23 - module id
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* bit 16 - 19 - contex id
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* bit 0 - 15 - command id
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*/
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#define CMD_MODULE_ID_MASK (0x00F00000)
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#define CMD_MODULE_OSAL (0x00100000)
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#define CMD_MODULE_MPP (0x00200000)
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#define CMD_MODULE_CODEC (0x00300000)
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#define CMD_MODULE_HAL (0x00400000)
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#define CMD_CTX_ID_MASK (0x000F0000)
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#define CMD_CTX_ID_DEC (0x00010000)
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#define CMD_CTX_ID_ENC (0x00020000)
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#define CMD_CTX_ID_ISP (0x00030000)
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/* separate encoder control command to different segment */
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#define CMD_CFG_ID_MASK (0x0000FF00)
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#define CMD_ENC_CFG_ALL (0x00000000)
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#define CMD_ENC_CFG_RC_API (0x00000100)
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#define CMD_ENC_CFG_FRM (0x00000200)
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#define CMD_ENC_CFG_PREP (0x00000300)
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#define CMD_ENC_CFG_CODEC (0x00001000)
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#define CMD_ENC_CFG_H264 (0x00001000)
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#define CMD_ENC_CFG_H265 (0x00001800)
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#define CMD_ENC_CFG_VP8 (0x00002000)
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#define CMD_ENC_CFG_VP9 (0x00002800)
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#define CMD_ENC_CFG_AV1 (0x00003000)
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#define CMD_ENC_CFG_MJPEG (0x00004000)
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#define CMD_ENC_CFG_MISC (0x00008000)
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#define CMD_ENC_CFG_SPLIT (0x00008100)
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#define CMD_ENC_CFG_GOPREF (0x00008200)
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#define CMD_ENC_CFG_ROI (0x00008300)
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#define CMD_ENC_CFG_OSD (0x00008400)
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typedef enum {
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MPP_OSAL_CMD_BASE = CMD_MODULE_OSAL,
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MPP_OSAL_CMD_END,
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MPP_CMD_BASE = CMD_MODULE_MPP,
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MPP_ENABLE_DEINTERLACE,
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MPP_SET_INPUT_BLOCK, /* deprecated */
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MPP_SET_INTPUT_BLOCK_TIMEOUT, /* deprecated */
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MPP_SET_OUTPUT_BLOCK, /* deprecated */
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MPP_SET_OUTPUT_BLOCK_TIMEOUT, /* deprecated */
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/*
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* timeout setup, refer to MPP_TIMEOUT_XXX
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* zero - non block
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* negative - block with no timeout
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* positive - timeout in milisecond
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*/
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MPP_SET_INPUT_TIMEOUT, /* parameter type RK_S64 */
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MPP_SET_OUTPUT_TIMEOUT, /* parameter type RK_S64 */
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MPP_CMD_END,
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MPP_CODEC_CMD_BASE = CMD_MODULE_CODEC,
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MPP_CODEC_GET_FRAME_INFO,
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MPP_CODEC_CMD_END,
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MPP_DEC_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_DEC,
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MPP_DEC_SET_FRAME_INFO, /* vpu api legacy control for buffer slot dimension init */
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MPP_DEC_SET_EXT_BUF_GROUP, /* IMPORTANT: set external buffer group to mpp decoder */
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MPP_DEC_SET_INFO_CHANGE_READY,
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MPP_DEC_SET_PRESENT_TIME_ORDER, /* use input time order for output */
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MPP_DEC_SET_PARSER_SPLIT_MODE, /* Need to setup before init */
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MPP_DEC_SET_PARSER_FAST_MODE, /* Need to setup before init */
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MPP_DEC_GET_STREAM_COUNT,
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MPP_DEC_GET_VPUMEM_USED_COUNT,
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MPP_DEC_SET_VC1_EXTRA_DATA,
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MPP_DEC_SET_OUTPUT_FORMAT,
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MPP_DEC_SET_DISABLE_ERROR, /* When set it will disable sw/hw error (H.264 / H.265) */
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MPP_DEC_SET_IMMEDIATE_OUT,
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MPP_DEC_SET_ENABLE_DEINTERLACE, /* MPP enable deinterlace by default. Vpuapi can disable it */
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MPP_DEC_CMD_END,
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MPP_ENC_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ENC,
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/* basic encoder setup control */
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MPP_ENC_SET_ALL_CFG, /* set MppEncCfgSet structure */
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MPP_ENC_GET_ALL_CFG, /* get MppEncCfgSet structure */
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MPP_ENC_SET_PREP_CFG, /* set MppEncPrepCfg structure */
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MPP_ENC_GET_PREP_CFG, /* get MppEncPrepCfg structure */
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MPP_ENC_SET_RC_CFG, /* set MppEncRcCfg structure */
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MPP_ENC_GET_RC_CFG, /* get MppEncRcCfg structure */
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MPP_ENC_SET_CODEC_CFG, /* set MppEncCodecCfg structure */
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MPP_ENC_GET_CODEC_CFG, /* get MppEncCodecCfg structure */
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/* runtime encoder setup control */
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MPP_ENC_SET_IDR_FRAME, /* next frame will be encoded as intra frame */
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MPP_ENC_SET_OSD_LEGACY_0, /* deprecated */
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MPP_ENC_SET_OSD_LEGACY_1, /* deprecated */
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MPP_ENC_SET_OSD_LEGACY_2, /* deprecated */
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MPP_ENC_GET_HDR_SYNC, /* get vps / sps / pps which has better sync behavior parameter is MppPacket */
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MPP_ENC_GET_EXTRA_INFO, /* deprecated */
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MPP_ENC_SET_SEI_CFG, /* SEI: Supplement Enhancemant Information, parameter is MppSeiMode */
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MPP_ENC_GET_SEI_DATA, /* SEI: Supplement Enhancemant Information, parameter is MppPacket */
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MPP_ENC_PRE_ALLOC_BUFF, /* allocate buffers before encoding */
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MPP_ENC_SET_QP_RANGE, /* used for adjusting qp range, the parameter can be 1 or 2 */
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MPP_ENC_SET_ROI_CFG, /* set MppEncROICfg structure */
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MPP_ENC_SET_CTU_QP, /* for H265 Encoder,set CTU's size and QP */
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/* User define rate control stategy API control */
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MPP_ENC_CFG_RC_API = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_RC_API,
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/*
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* Get RcApiQueryAll structure
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* Get all available rate control stategy string and count
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*/
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MPP_ENC_GET_RC_API_ALL = MPP_ENC_CFG_RC_API + 1,
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/*
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* Get RcApiQueryType structure
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* Get available rate control stategy string with certain type
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*/
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MPP_ENC_GET_RC_API_BY_TYPE = MPP_ENC_CFG_RC_API + 2,
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/*
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* Set RcImplApi structure
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* Add new or update rate control stategy function pointers
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*/
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MPP_ENC_SET_RC_API_CFG = MPP_ENC_CFG_RC_API + 3,
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/*
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* Get RcApiBrief structure
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* Get current used rate control stategy brief information (type and name)
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*/
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MPP_ENC_GET_RC_API_CURRENT = MPP_ENC_CFG_RC_API + 4,
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/*
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* Set RcApiBrief structure
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* Set current used rate control stategy brief information (type and name)
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*/
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MPP_ENC_SET_RC_API_CURRENT = MPP_ENC_CFG_RC_API + 5,
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MPP_ENC_CFG_FRM = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_FRM,
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MPP_ENC_SET_FRM, /* set MppFrame structure */
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MPP_ENC_GET_FRM, /* get MppFrame structure */
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MPP_ENC_CFG_PREP = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_PREP,
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MPP_ENC_SET_PREP, /* set MppEncPrepCfg structure */
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MPP_ENC_GET_PREP, /* get MppEncPrepCfg structure */
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MPP_ENC_CFG_H264 = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_H264,
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MPP_ENC_CFG_H265 = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_H265,
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MPP_ENC_CFG_VP8 = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_VP8,
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MPP_ENC_CFG_MJPEG = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_MJPEG,
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MPP_ENC_CFG_MISC = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_MISC,
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MPP_ENC_SET_HEADER_MODE, /* set MppEncHeaderMode */
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MPP_ENC_GET_HEADER_MODE, /* get MppEncHeaderMode */
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MPP_ENC_CFG_SPLIT = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_SPLIT,
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MPP_ENC_SET_SPLIT, /* set MppEncSliceSplit structure */
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MPP_ENC_GET_SPLIT, /* get MppEncSliceSplit structure */
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MPP_ENC_CFG_GOPREF = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_GOPREF,
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MPP_ENC_SET_GOPREF, /* set MppEncGopRef structure */
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MPP_ENC_CFG_OSD = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_OSD,
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MPP_ENC_SET_OSD_PLT_CFG, /* set OSD palette, parameter should be pointer to MppEncOSDPltCfg */
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MPP_ENC_GET_OSD_PLT_CFG, /* get OSD palette, parameter should be pointer to MppEncOSDPltCfg */
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MPP_ENC_SET_OSD_DATA_CFG, /* set OSD data with at most 8 regions, parameter should be pointer to MppEncOSDData */
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MPP_ENC_GET_OSD_DATA_CFG, /* get OSD data with at most 8 regions, parameter should be pointer to MppEncOSDData */
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MPP_ENC_CMD_END,
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MPP_ISP_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ISP,
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MPP_ISP_CMD_END,
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MPP_HAL_CMD_BASE = CMD_MODULE_HAL,
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MPP_HAL_CMD_END,
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MPI_CMD_BUTT,
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} MpiCmd;
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#include "rk_venc_cmd.h"
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#endif /*__RK_MPI_CMD_H__*/
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