package/mpp
1
0
Fork 0
mirror of https://github.com/nyanmisaka/mpp.git synced 2025-10-06 17:46:50 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity
2,797 Commits 4 Branches 0 Tags
fe11f99415f708316a06145c85ecbbf4c2ba562c
Commit Graph

2797 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Ding Wei
af13bcf90d [vdpu34x]: re-set gating reference register 
tips:
    In RK3588,the reg26 gating_e should set 0xffef, disable bufifd gating bit.

Change-Id: I25f329d386e1b16d8ffca49bef45804ab756fea5
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2021-12-14 11:44:05 +08:00
Ding Wei
8b0c4429e7 [vp9d]: fix issue for frame is NULL 
when frame is null, it cannot get_frame_poc from frame.

Change-Id: If94488640b46eeb0faa800c1966c0d747ed9f396
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2021-12-13 16:16:18 +08:00
Ding Wei
3b0e3598bf [vp9d]: enable gating setting and timeout threshold 
tips:
    re-define the block gating enable structure.

Change-Id: I8c2c92aa0671610bb30ba06d5d8769b371cae1f8
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2021-12-13 16:15:13 +08:00
Ding Wei
ad221ec604 [vp9d]: reset temp parameters when reset 
Change-Id: Iee87b90f5753bfae4531413721ce1a5d7dca4d0a
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2021-12-13 10:39:20 +08:00
Ding Wei
e81d82173b [vp9d]: Support multi-core mode 
tips:
    vp9 need poc mode for detect current core
refer regs:
    reg65 reg75 reg95 reg96 reg97 reg98 reg99 reg100

Change-Id: Ia42af0cfe018488990b1678665a703c34173f095
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2021-12-10 17:49:14 +08:00
vic.hong
eeda461154 [mpp_dump_yuv]: fix mpp dump yuv issue 
Modify the judgment condition of dump data

Signed-off-by: vic.hong <vic.hong@rock-chips.com>
Change-Id: I8816b02ccad6e7dac82ba1e2723947a1aa165e3c
 2021-12-07 20:27:46 +08:00
Ding Wei
aceeea09c9 [hal_vp9d]: Dual core: Add rcb_buf for fast mode 
tips:
    echo register setting need one rcb_buf.

Change-Id: I61a1a44aec7182a911183facdcc8adc04d16c3fb
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2021-12-07 17:50:13 +08:00
Herman Chen
7bf0f1a54c [mpp_buf_slot]: Formating code 
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: If48dbc3eb797495e4c62a8d8c30c5c0aee105c16
 2021-12-07 17:07:40 +08:00
sayon.chen
0b670f2ec0 [h265e_ps]: Clear crop info before set 
Change-Id: I7c1f88da6982e78fd113b1cd1e276fb4b33176d9
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2021-12-07 17:01:27 +08:00
Herman Chen
e3fcc11706 [hal_vepu580]: Enable watchdog 
Change-Id: Ie522d027c9ed032734895c00cfc8e68715a3b77c
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-12-03 08:50:07 +08:00
Yandong Lin
f9a628752d [utils]: add MPP_FMT_YUV420SP_VU data dump 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I775ef33e760c9106a7e95fa98fd43185cfcd6195
 2021-12-01 17:28:39 +08:00
Herman Chen
0159409673 [hal_vepu580]: Add hw auto reset on frame end 
Change-Id: I08f395e2b402fcf8ad8ed2b3e05912647870a2c7
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-12-01 17:11:10 +08:00
vic.hong
c5a794515d [mpi_buf_slot]: Fix hor_stride_pixel calc issue 
Align the pixel bit depth to 8bit

Signed-off-by: vic.hong <vic.hong@rock-chips.com>
Change-Id: I19c4f47d19dfb8eba9cb0b17f20ed4ed839c8a80
 2021-12-01 15:03:10 +08:00
Herman Chen
ee7bae024d [hal_h264d_vdpu34x]: Disable buffer log on deinit 
Change-Id: I475846b51d986f3c60b61375615e0e3c7701d51b
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-12-01 11:30:09 +08:00
Yandong Lin
26a2b1a6ba [jpege_api]: fix generate qtable err 
Rootcause: The RK_U8 variable overflow
Solution: change RK_U8 to RK_U32

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ia1eba83ef86590dcf2eeb07ced547714b428a145
 2021-11-30 19:03:05 +08:00
sayon.chen
8c04e0d562 [mpp_enc_roi]: Add roi generation function 
vepu58x roi cfg generation is depended on vepu54x roi cfg.

1. Use roi_enable to enable roi test.
2. Use roi_type to test different roi config mode.

Old region mode is set to legacy now for future roi cfg will be more and
more complicated.

Change-Id: Ib9e8976b732f05625e7589b64752d38fbd83584b
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2021-11-30 17:11:11 +08:00
Herman Chen
3d87869900 [hal_vepu541]: Add ROI_DATA2 support 
Change-Id: Iadd0b8206197bba29dca21d1581b7394cea8f4be
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-30 15:07:19 +08:00
Herman Chen
dda6a4d723 [hal_vepu580]: Fix debug register definition error 
Change-Id: Ia6e0c931ca1707027f5076e14a482a1f8099caad
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-29 16:50:25 +08:00
Herman Chen
dbd428d570 [mpp_service]: Allow zero size rcb info 
rk3588 encoder needs buffer end address so zero size should be allowed.

Change-Id: Ie350f62c77d99f91b2ca1f02e7b4ff7afe0b0dd8
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-29 11:24:23 +08:00
Ding Wei
b0bfe6b090 [hal_vdpu34x]: Fix rcb_buf issue for dual core 
At rk3588 vdpu38x (vdpu34x dual core we have multi-frame running on
different cores in one decoder session which enable fast mode.

Sharing rcb buffer between frames will introduce data conflict.

So we need to create rcb buffer for each frame register set.

Change-Id: I2ae3cb8f7f06b1b89bfafcd38e316f975ce72520
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2021-11-25 10:37:06 +08:00
Ding Wei
7e1a19a541 [hal_vdpu34x]: Add timeout register definition 
rk3588 vdpu38x (vdpu34x) add timeout register.

Change-Id: I0517c14054b52eb7179f8ec691bcc5dea5deef5f
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-25 10:04:25 +08:00
Zhihua Wang
624d8493d5 [jpege_api_v2]: fix mpp_log mismatch 
Signed-off-by: Zhihua Wang <hogan.wang@rock-chips.com>
Change-Id: I8b00fea849d100de51e2ac2c00ae999655aa2541
 2021-11-24 20:12:44 +08:00
Herman Chen
5bd7798cc5 [hal_h264e_vepu580]: Optimize tuning parameters 
Change-Id: I75e49be59cd388024c8f7d8004236d9b53fa9fdc
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-24 18:10:17 +08:00
Herman Chen
ebaacf92f1 [h265d]: Fix memory leak 
Change-Id: I77e78a2a9d1e11d9fa973c432d1b0a2cdb3bd1e8
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-24 11:28:07 +08:00
Herman Chen
f7cc1d0460 [hal_vdpu34x]: Fix error log on deinit 
Change-Id: I20acaeb9aee6a0f932cf2a8e64eaa5a5e87bc0fe
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-24 09:53:30 +08:00
Herman Chen
1ac53ff5be [hal_h264e_vepu580]: Add cime config error 
Change-Id: I9fcdc40ebf7c92e192e3c0b18c69fa154cb139b5
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-22 20:51:36 +08:00
Herman Chen
254a708f8e [mpp_enc]: Increase bps max limit to 200M 
Single core has 100Mbps limit and rk3588 has two cores.
Increase mjpeg max_bps to 800M

Change-Id: I2a3bd830d97085bb9a875063ae9aac8df891969c
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-22 17:14:51 +08:00
Herman Chen
417e086864 [hal_h264e_vepu580]: Add scalinglist config 
Change-Id: I479b363d9ab7313175e3d8bee2272ab44fa6c4f2
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-22 16:28:04 +08:00
Herman Chen
bfe885ffb4 [hal_h265e_vepu580]: Add mirror config 
Change-Id: I26078ba84e1be653efe36487bc047f771922921b
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-20 18:34:30 +08:00
Yandong Lin
0d39677317 [m2vd_parser]: Fix a mistake in writing 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I10f1ab2e39da4c3c06d815b2a3a76ef3054b4011
 2021-11-20 18:34:30 +08:00
sayon.chen
1fb20bb450 [mpp_enc]: Add new roi buffer config mode 
The roi structure on vepu580 is too complex.

So we provide provide a buffer tunnel for externl user to config encoder
hardware directly.

External user should generate roi data structure according to datasheet.
Then config the base_addr, qp_addr, amv_addr, pmv_addr by metadata.

Change-Id: Iae50bf3ca36c1ff789140055d4d36a79afeb2e58
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2021-11-20 18:34:30 +08:00
Herman Chen
cde64171f7 [hal_h264e_vepu580]: Fix external line buffer size 
Change-Id: I5afcba3cb76219d8a32871b1444d9408fd031a7f
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-20 18:34:30 +08:00
sayon.chen
0efce0711a [hal_hevc580]: Adjust RDO param 
1. Adjust RDO param set
2. Fix madi madp return issue

Change-Id: Ia41eae40241b1974488a5623060a8710a6cc89ce
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2021-11-20 18:34:30 +08:00
sayon.chen
3f891908ae [h265e_ps]: Fix ps issue 
1. Fix DisableDeblockingFilterFlag set issue
2. Rewrite title col num calc
3. Set cuQpdepth as zero, 2 maybe cause some issue

Change-Id: I05eaf0935cef9ab2f3ea4b069cd672cb383a6bfe
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-20 18:34:30 +08:00
Herman Chen
dc3b52b78d [hal_h264e_vepu580]: Disable force slice 
Change-Id: I98f479599b7810c92a314c6c75d34eed75156a46
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-20 18:34:30 +08:00
Herman Chen
5e396e03d5 [mpp_soc]: Add AVS2 type 
1. Add AVS2 coding type.
2. Add AVS2 support on rk3588.

Change-Id: Ifa677830d3f8c1625a4c351a6e008c09098f5122
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-20 18:34:30 +08:00
vic.hong
8f0ca9fbbe [mpp_dec]: Fix hor_stride_pixel is zero issue 
Set hor_stride_pixel in function mpp_buf_slot_set_prop

Signed-off-by: vic.hong <vic.hong@rock-chips.com>
Change-Id: I832b7d4e9f0d5fda81816e4c42e75ec1ef2d841a
 2021-11-18 08:40:35 +08:00
Zhihua Wang
8d41958d4e [utils]: fix read_with_pixel_width encounter foef 
Signed-off-by: Zhihua Wang <hogan.wang@rock-chips.com>
Change-Id: Ifb69440c77f538b1aa39b3c3a31b8455646b4c9b
 2021-11-16 15:30:17 +08:00
sayon.chen
c682d3b701 [vpu580e]: Fix osd cfg issue 
1. Fix h264 plt reg define issue
2. Fix osd address reg index offset set issue

Change-Id: I9582048e7791ebd66c3ba05bcf634314d50b6800
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2021-11-15 14:07:28 +08:00
Yandong Lin
64fb143602 [hal_h264e_vepu580]: set aq_thd and aq_step cfg 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I73a8cca15cfcc66b5def5dfd654cccf8c36c61c9
 2021-11-15 09:30:43 +08:00
Zhihua Wang
462a409575 [hal_h264e_vepu580]: Fix hfill and wfill config 
Signed-off-by: Zhihua Wang <hogan.wang@rock-chips.com>
Change-Id: I87144fb90cf0567ffbf47b7c34fca6f106c44580
 2021-11-15 09:12:45 +08:00
Yandong Lin
7c84000ff6 [hevc_vepu580]: Fix non_ref frame reg cfg issue 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I9031999f555de18879a0afe3539daf2c02e740cb
 2021-11-15 09:09:16 +08:00
sayon.chen
fd3ca60d07 [hevc580]: Fix title case feedback parm error 
Change-Id: I181e9d2373e2a2b8b0c5d6ea1ed3d92b8cab9898
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2021-11-13 11:33:19 +08:00
Herman Chen
47bb09d7a1 [hal_h264e_vepu580]: Add over 4K support 
Change-Id: Idbd2fad22cbc79d73841f1bed60ac1b821ab0308
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-12 21:06:45 +08:00
sayon.chen
043deeddfb [vepu580]: support osd config 
Change-Id: I2e8cc06dcc678e4b3cd86ee0658ef8fa4ca42a68
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2021-11-12 20:13:24 +08:00
Yandong Lin
69b1f8ea33 [hal_vp9d]: Fix segmep size not enough for 8k 
Support 8k decode for rk3588

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I65a4c7ecb5263f8305e968a5a060a546891920df
 2021-11-12 18:44:49 +08:00
sayon.chen
20e82a341d [hal_h265e_vepu580]: Add hevc580 support 
Change-Id: I4c09bdabdaa0992c44e9be45455cdf88efae85bf
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2021-11-12 18:40:16 +08:00
Herman Chen
1dd22c15bc [hal]: Add vepu5xx.h for hardware id 
Change-Id: I8e439c689fefa1524ea8e7ac46b70d8f6d527164
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
 2021-11-12 18:26:47 +08:00
Yandong Lin
d19c408ec7 [mpi_dec_utils]: Fix read ivf file err 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Id13ef0ac2a43c78b09d2e3df2a8c84e88061f7f3
 2021-11-12 17:13:49 +08:00
Yandong Lin
fed47d7f72 [hal_h264e_vepu580]: Add vepu580 h264e support 
1. Add vepu580 reg definition
2. Add hal_h264e_vepu580.c

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ibeec58c6c86704f7394295593f5aa73d7abe20e6
 2021-11-12 17:10:25 +08:00