There force reference frame user configure is added to encoder task.
Change-Id: I4482a831f988f47913c6e1d0385ccbdd0cd46031
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
1. Add vpu_api_mlvec module.
2. Attach vpu_api_mlvec module to vpu_api_legacy.
3. Add static and dynamic configure process.
4. At VpuApiLegacy::init if the extra_data is NULL do not get sps/pps.
5. Add VPU_API_GET_EXTRA_INFO (0x200) control to provide sps/pps.
Change-Id: I4666148ba4c150eea81bfa8cd25b63264cd16a2b
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Add iep2 HAL library and corresponding unit test.
Add a adapter layer for iep and iep2 compatible.
there will be libiep2.so generated after build.
this library will support direct using iep2 api outside
MPP platform, such as using in analog camera application.
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
Change-Id: Ide9662bf099e5374602dda7417ee6973de64c912
1. Prefix nal is setup in h264e_api and send to hal by syntax.
2. Hal receives prefix config and writes prefix nal before each slice.
3. Add vepu1 / vepu2 prefix implement. vepu541 is not implemented yet.
4. Add max temporal layer id check to enable prefix nal.
Change-Id: I8bc40af12b9d9cedd64c1aa6a2666d3ffe7bf694
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Fix the default width stride value in RGB format.
Change-Id: I330bc81bfc5057484a46815d62eccd3fd212a49d
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Vepu only support match width / stride configure. This should be setup
according to input format.
Change-Id: I2cd4e6bbf4c3888db0402096f80a6896c9a4bf53
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Fixup user config level which it is too small.
Change-Id: I2e998d0e11f6293bb4a678375b4d1be3610464f3
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
Fixup user config level which it is too small.
Change-Id: I6a89be3fc7d201f67413cb4ae32ea2629a5d7aca
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
1. Add force frame qp mode.
2. More mode is reserved for future extension.
Change-Id: Ic12000082c7674b294c0be506f74a7d6129be6b9
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
1. Move SOI and APP0 data frome hal to jpege_api_v2
2. Add user data to APP7
Signed-off-by: yandong.lin <yandong.lin@rock-chips.com>
Change-Id: I1ce99e0e30aacbdf537a668e27af1c8a7cf3bdd3
1.fix fix_qp case config used rc_cfg->quality_target
2.fix log printf error when input is rgb
Change-Id: I6b67dbb2c8eede78ccb318794b7eb39c75dba78f
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
1. long-term reference flag in IDR frame should be clear at next frame.
Otherwise multi-slice operation will be error.
2. The max long-term reference index is reset to zero at IDR. So the new
sequence must redefine its own value again.
3. The end bits of prefix nal should be flushed.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ia9ba01719861401c2ca95ded3ccfc537c3b10083
1. Fix loop length error on copy.
2. Change prefix nal format do not write more bit on zero nal_ref_idc.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I8aae36926dcd8dc73701c735396ae418db4f032f
1. Remove slice mode/arg in H.264 codec cfg.
2. Add max long-term reference number / max temporal layer id / prefix
mode / base layer priority id.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: If34166e4658edba65f4c6c095412a6fadd941320
1. Add KEY_ENC_MARK_LTR for marking current frame to be long-term
referece frame.
2. Add KEY_ENC_USE_LTR for assigning a long-term reference frame as
current frame's reference frame.
3. Add KEY_ENC_FRAME_QP for assigning a fix QP for current frame.
4. Add KEY_ENC_BASE_LAYER_PID for assining a priority id for base layer
in tsvc mode.
All these four features are defined in MLVEC test.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ib041d9c2f203d7e582a3402bd61dd6a9eb18015a
1. Fix nal_ref_idc update error for using slice->is_idr.
2. Fix slice write error on poc_type is 2.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ib315818c2024fdf028a4863977154e9d7beeb8f5
When there is enough reference frame slot in cpb store extra st frame to
cpb to avoid mismatch in dpb check.
This will happen right after IDR. There is extra empty cpb slot for st
frame and no need to remove them by sliding window.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I261f18d70f241e48a18012807f4dece68e73cbdf
When these is incomplete bit in last byte the writer needs to flush all
the valid bit to memory.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I07e24d1504d637beadfc7308b867c03fe2c7735e
If altref frames is not for display, they will be remaining in buffers.
Eventually, there will be no more unused buffer to be used for output.
Refer to this issue https://redmine.rockchip.com.cn/issues/226256.
Change-Id: I915582da99e71c95745bce15690562d51d640dc5
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
1. When insert long-term reference frame the tid refs should also be
updated.
2. When insert short-term reference frame the queue update direction has
error. It is fixed now.
3. Long-term reference frame delay_cnt update method is fixed.
4. Dump valid flag when dump cpb frame status.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I8db6e71ee5366fefdd1d91018c500d3edc05c6aa
The check on short-term config should use short-term config count rather
than long-term config count.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I0006fe9a30035f636411702290cd9dff4032296d
When encounting IPIPPPP... stream, the first IP will be kept in dpb
unflushed. This will lead to dpb used size keep growing and memory leak.
Change-Id: I7973c8b18d13a63d10b0d4f034aefb58a3805ab2
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
