package/mpp
1
0
Fork 0
mirror of https://github.com/nyanmisaka/mpp.git synced 2025-10-06 01:26:49 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity
3,625 Commits 4 Branches 0 Tags
239e15eaebf98f68c0093b00ff8108d23b0147e7
Commit Graph

387 Commits

Author SHA1 Message Date
Yanjun Liao
293f61a8f6 feat[enc_265]: Support get Largest Code Unit size 
Case: mpp_enc_cfg_get_s32(p->cfg, "h265:lcu_size", &lcu_size);

Change-Id: I8f284b77b465377f600cb3449d0012edd5a64098
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-05-24 15:19:56 +08:00
Chen Jinsen
d0a06d0bed feat[mpp_dec_cfg]: Add disable dpb check config 
Change-Id: Ib93948bed0547bec9b2805f9f0e73d83b56226a7
Signed-off-by: Chen Jinsen <kevin.chen@rock-chips.com>
 2024-05-15 14:19:52 +08:00
Chandler Chen
0a9509431f feat[vdpu383]: support 8K downscale mode 
Now there are 2 mode for downscale thumbnail frame buffer

1.MPP_FRAME_THUMBNAIL_MIXED (already use on RK3528 box):
Each buffer contains original output frame and 2x2 downscale
small frame, small image's buffer offset will be set in frame
meta info;
2.MPP_FRAME_THUMBNAIL_ONLY (newly added for rk3576 8K video):
for rk3576: vop & gpu does not support 8K frame,
in this case, mpp use 4K downscale buffer as decoder output

Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I3acf9486a657fa3e999ca16140f40b2a01ebcaf4
 2024-04-23 15:54:30 +08:00
Hery Xu
2ea1a7ecd3 [vpu_api]: support nv21 format encode 
Change-Id: I82af5c70702b759afbce8665ff536c517d164831
Signed-off-by: Hery Xu <hery.xu@rock-chips.com>
 2024-04-16 09:26:53 +08:00
Yanjun Liao
25649d2fae fix[265e_api]: Support cons_intra_pred_flag cfg 
Change-Id: I57d7df14086cab0a6019f77b7b4b6259f456455e
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-03-29 10:18:14 +08:00
xueman.ruan
dbf20001b7 feat[vdpp]: Add capacity check function 
Change-Id: If14ad6e664b2dd58a8df9aecbb81b3d92682eb7d
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
 2024-03-21 09:49:29 +08:00
xueman.ruan
3cf926cd2c fix[mpp_dec]: Optimize HDR meta process 
Change-Id: I57d9d0c34d7085ff9c72b996c78835e2d49e0238
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
 2024-03-14 15:22:49 +08:00
Johnson Ding
2b2f3669e4 feat[enc]: Add config entry for output chroma format 
Change-Id: I29f4f764adc401a635e9fda2e2b41b2002078637
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2024-03-08 11:07:36 +08:00
Herman Chen
02a35cb871 fix: Fix clerical error 
fix denorminator to denominator

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I6e9deed4fe3bcdc1d2f7d56f3dccb87607d576bf
 2024-03-05 11:31:47 +08:00
Herman Chen
840fbdeac1 docs[mpp_frame]: Add MppFrameFormat description 
Add MppFrameFormat bit mask description.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I223b7661ca3497c2eb7b1cebc5148c45d4daf934
 2024-02-22 19:35:54 +08:00
Johnson Ding
77ad638e2e feat[mpp_frame]: Add tile format flag 
Change-Id: I5d331d377a47cefd57cb3c343d1c61224f452356
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2024-02-22 19:11:14 +08:00
Herman Chen
3f0e7c8cc5 doc[mpp_buffer]: Update MppBuffer code annotation 
related issue: https://redmine.rock-chips.com/issues/463747

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I24c047df0659958f98f46a248c2f0857f675149d
 2024-01-26 09:57:23 +08:00
xueman.ruan
e15972e9af feat[mpp_dmabuf]: Add dmabuf sync operation 
sync_begin - cache invalidate, should be called before cpu read
sync_end   - cache flush, should be called after cpu write

MppBuffer sync flow:
1. hw access
2. sync_begin
3. cpu access (read / write)
4. sync_end
5. hw access

NOTE: readonly option is faster for read only buffer.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I253a6139e9bb30808c07075d64f17b5cfad8519a
 2023-11-16 14:27:02 +08:00
sayon.chen
65439d38a4 feat[rc_v2]: Support flex fps rate control 
Change-Id: I45a8544c15ab4baede232e1a3b16c517f965092e
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2023-11-03 09:11:10 +08:00
xueman.ruan
22100022d7 fix[utils]: adjust format range constraint 
Change-Id: I12d57955d6ad84e063784e46893b1deec90785b6
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
 2023-10-26 10:29:34 +08:00
yanjun.liao
45fff92423 feat: add more enc info to meta 
1. add num of inter/intra different size predicted block info
2. add start qp info
3. add output pskip frame indicator
4. add SSE info

Change-Id: I664f0f87b862bf1c27b43f67c5c3e4b8b060c5b0
Signed-off-by: yanjun.liao <yanjun.liao@rock-chips.com>
 2023-10-10 09:11:41 +08:00
hdl
68177e2268 feat[vepu580]: Add frm min/max qp and scene_mode cmd param 
Signed-off-by: hdl <hdl@rock-chips.com>
Change-Id: I27c3f3cfb599b8d05e58aceb1967bec4230d386e
 2023-09-25 17:46:32 +08:00
hdl
9ff2961dcf feat[venc]: Add qbias for rkvenc encoder 
Signed-off-by: hdl <hdl@rock-chips.com>
Change-Id: Ib463b777898a3c25bebbd2fcb95d872581f0b8f7
 2023-09-25 16:34:03 +08:00
Rimon Xu
cb8fa73dbd [vpu_api_legacy]: Support input timeout control 
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
Change-Id: I960d28a75f1ae9425bb0db54dc2e017102b7e6cb
 2023-07-11 15:29:20 +08:00
Rimon Xu
dcedc39754 [vpu_api_legacy]: Support frame ready callback control 
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
Change-Id: I7de1fcab204cdf7216d8f761763337da14923e59
 2023-07-11 14:44:43 +08:00
Yandong Lin
e4554e2b84 [mpp_frame]: fix MPP_FRAME_XXX bit mask conflict 
fix MPP_FRAME_HDR bit mask conflicts with MPP_FRAME_FMT_LE_MASK

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I3a0df734f8cbc36da625d4b1a70658069809774f
 2023-06-02 15:05:17 +08:00
xueman.ruan
f91f152a1a [hal_h264e]: fix log2_max_frm_num config error. 
Issue is introduced when user configs log2_max_frm_num.

1. use MppEncH264HwCfg instead of hw_poc_type.
2. slice_write can only use corresponding hardware config.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Id5f3622512075eedc1e9dc99636c3f0dff43d6f1
 2023-05-30 14:04:31 +08:00
Yandong Lin
bd94623641 [mpp_frame]: add 10bit yuv fmt check macro 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ic045a031c23eb697478492251e940d83fb5cb5ad
 2023-03-28 14:51:59 +08:00
xueman.ruan
0466c8aa6b [mpp_enc_cfg]: combine gop and ref cfg config. 
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Ia15a0128d03b1a2624410b6f2a13effe3a03c47c
 2023-03-21 09:29:37 +08:00
xueman.ruan
e6ef3d1d7a [h264e]: Fix profile compatibility error. 
Issue introduced by encoding TSVC.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: I98c2c61634c7cc57180459e0427d5672fe407c47
 2023-03-08 09:32:21 +08:00
xueman.ruan
062c175265 [hal_jpege]: Add dma heap options for JPEG encode. 
use cachable dma buffer to reduce copy time.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: I7fcc0fa5942ea5aa4e247b5f10677843d006ff28
 2023-02-21 20:57:26 +08:00
Herman Chen
1e2260727a [h264d]: Add ref miss check 
1. Define more decoder frame error level.
2. Setup errInfo according to error type and level

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I7d0e87d19fc5b24808cda6b2b1bdaa1e60d091f6
 2023-02-16 17:18:15 +08:00
Hongjin Li
0ee683acf3 [enc_gdr]: Platform supports intra refresh 
Add parameters required for intra refresh
Add rate control corresponding to intra refresh

Change-Id: I6dbaf70e3c50cd0debf909ded9fb5c4f30df26ec
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
 2023-01-11 11:04:44 +08:00
dawnming.huang
9793b87ae2 [vpu_api_legacy] add contorl fbc horstride 256 odd align 
Change-Id: Ife97b9585f9471705557612139c03caea479268b
Signed-off-by: dawnming.huang <dawnming.huang@rock-chips.com>
 2022-12-30 12:32:14 +08:00
He Hua
93b1cd14f2 [vpu_api]: modify struct VideoFrame 
1. add viewid in struct VideoFrame for mvc output
2. modify reserved to int type for future

Signed-off-by: He Hua <hh@rock-chips.com>
Change-Id: Ib95999221bef8c9d385b70736ab7978926a78836
 2022-12-26 11:00:49 +08:00
He Hua
0f15067fcb [vpu_api]: Support mvc enable/disable cmd 
Signed-off-by: He Hua <hh@rock-chips.com>
Change-Id: I58ffbfff1e9df937f54f8a92422838e30c49c15a
 2022-12-26 09:31:33 +08:00
Herman Chen
5469f9d08b [misc]: Add compatible for fbc header alignment 
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I0ae4ec4b8603648a7186d0cccf63aa3ea3fb29b3
 2022-12-23 17:36:34 +08:00
Johnson Ding
6e954f5142 [mpp]: Add MVC enable option 
Change-Id: I11c4ef1954add18491f3745b23c91b79de60d181
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2022-12-14 14:22:41 +08:00
Grey Li
c2b676f089 [vpu_api]: Support set dec scale and hdr meta 
Signed-off-by: Grey Li <grey.li@rock-chips.com>
Change-Id: Iafbd7b30ecee5894c44d7805598c8c425f83c166
 2022-12-08 18:48:59 +08:00
Grey Li
6f325d444c [vpu_api]: use fbc fmt instead color space 
Signed-off-by: Grey Li <grey.li@rock-chips.com>
Change-Id: Ia76fd5c09fc8ab9b9ac2f4365cbc1ff0f2b4f612
 2022-12-08 18:47:40 +08:00
Yandong Lin
453e80380c [mpp_frame]: add api about scale down info 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I0aee35b0cec0dd85bd6b49c66a12e31fb48eb483
 2022-12-06 11:23:21 +08:00
Grey Li
78b6db4a4a [vpu_api_legacy] suport avs2 
Signed-off-by: Grey Li <grey.li@rock-chips.com>
Change-Id: I8ade3067a9de148ee27f3c6b92962b95b688e77a
 2022-11-28 10:25:40 +08:00
Yandong Lin
06672e4aee [mpp_meta]: add new key for scale down dec info 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I421e24d5d3727a3f828f1a2407e6702e12d9afb7
 2022-11-25 18:11:13 +08:00
Yandong Lin
bcb0187d3a [hdr_meta_com]: add hdr_meta_com module 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I35df93d91408d9dbde0d2bdfe78e25540c9e4452
 2022-11-24 21:33:51 +08:00
Yandong Lin
77e8a96f05 [mpp_frame]: add hdr dynamic meta info 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Iea7585709bcd3e17d11c28f7e87093fe9f15f77a
 2022-11-24 14:22:58 +08:00
Yandong Lin
15ab8f73be [mpp_meta]: add new key for hdr meta info 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ib9e69f1c8c110e204468284b96322d3de297de29
 2022-11-24 14:19:24 +08:00
sayon.chen
cf5b3571e7 [h265e_cfg]: Add lpf across slice or tile cfg 
Change-Id: Ib5afc2d9b95e85d523e545e580ccd0fcd7b8e416
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2022-11-16 15:26:02 +08:00
sayon.chen
9405c48f97 [hal_h264e]: Support poc_type 2 & add tsvc prefix 
Change-Id: Ibbb0ee179974fdade590b97c9b3b38bcf822dffc
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2022-11-04 17:05:12 +08:00
Herman Chen
8828359534 [misc]: chmod all code file to 644 
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I2225d7508a7f8bf5693077d20f48065e8324b318
 2022-11-02 11:10:49 +08:00
Hery Xu
618cee428c [vpu_api_legacy] add cmd to use mpi config 
Signed-off-by: Hery Xu <hery.xu@rock-chips.com>
Change-Id: I205e2f7e9015f09a59613850e828d72b85e59370
 2022-11-01 15:09:49 +08:00
Rimon Xu
1cc1af1b08 [osal]: reorder dma heap type select priority 
Change-Id: Ifd2286ecf97fb4477693c24cdaec10c1df15eacf
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
 2022-10-28 10:06:22 +08:00
Yandong Lin
3adde926e2 [avs]: Add avs module 
NOTE: I frame header decoding should check stream version.

Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
Change-Id: I1c8276f4499d73e3b60d582890037dec376e136f
 2022-10-13 15:16:13 +08:00
xueman.ruan
09de35e9b5 [enc_cfg]: Update mirror transformation. 
1. constraint the range of input argument.
2. add flip config, equal to vertical mirror transformation.
3. add mirroring_ext and rotation_ext to config set, for supporting
GET_CFG control.

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: I01c0b9187a18851354e81b5f08afc6dcaaba8365
 2022-09-21 15:21:40 +08:00
sayon.chen
273d2bdd92 [h265e_ps]: Add auto tile split cfg 
Auto tile cfg will let encoder auto split picture into tiles
according to platform encoder core number.

When enabled on RK3588 all picture will be splited into two tiles.

Encoder cfg string: h265:auto_tile

Change-Id: I3bd91a7781fc2c7e0b43bf2e3be775a5b8098d78
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
 2022-09-01 10:56:23 +08:00
xueman.ruan
82ae30f031 [h264e_sps]: Add parameters config for encoder 
Encorder parameters: constraint_set0~5

Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: I7f90ff97881f875ffad77cf4125ee6623d179563
 2022-08-16 12:16:57 +08:00