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https://github.com/nyanmisaka/mpp.git
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[h264e_rkv]: pack cfg into SEI and write to stream
1. add SEI writting interface 2. write extra_info_cfg and rc_cfg to SEI 3. stream_get_pos use s->buf_plus8 rather than s->p_start Change-Id: I71de4d6f5dc31f21c0a32dc5ded275ced260d861 Signed-off-by: Lin Kesheng <lks@rock-chips.com>
This commit is contained in:
@@ -45,6 +45,12 @@
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#define MPP_ENC_OSD_PLT_BLUE ((255<<24)|(110<<16)|(240<<8)|41)
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#define MPP_ENC_OSD_PLT_BLACK ((255<<24)|(128<<16)|(128<<8)|16)
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typedef enum MppEncSeiMode_t {
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MPP_ENC_SEI_MODE_DISABLE, /* default mode, SEI writing is disabled */
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MPP_ENC_SEI_MODE_ONE_SEQ, /* one sequence has only one SEI */
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MPP_ENC_SEI_MODE_ONE_FRAME /* one frame may have one SEI, if SEI info has changed */
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} MppEncSeiMode;
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typedef enum {
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MPP_OSAL_CMD_BASE = CMD_MODULE_OSAL,
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MPP_OSAL_CMD_END,
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@@ -86,6 +92,8 @@ typedef enum {
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MPP_ENC_GET_EXTRA_INFO,
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MPP_ENC_SET_FORMAT,
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MPP_ENC_SET_IDR_FRAME,
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MPP_ENC_SET_SEI_CFG, /*SEI: Supplement Enhancemant Information, parameter is MppSeiMode */
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MPP_ENC_GET_SEI_DATA, /*SEI: Supplement Enhancemant Information, parameter is MppPacket */
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MPP_ENC_CMD_END,
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MPP_ISP_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ISP,
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@@ -420,19 +420,13 @@ MPP_RET mpp_enc_control(MppEnc *enc, MpiCmd cmd, void *param)
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*mpp_cfg = enc->mpp_cfg;
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ret = MPP_OK;
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} break;
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case MPP_ENC_GET_EXTRA_INFO : {
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ret = mpp_hal_control(enc->hal, cmd, param);
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} break;
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case MPP_ENC_SET_RC_CFG : {
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ret = mpp_hal_control(enc->hal, cmd, param);
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} break;
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case MPP_ENC_GET_RC_CFG : {
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ret = mpp_hal_control(enc->hal, cmd, param);
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} break;
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case MPP_ENC_SET_OSD_PLT_CFG : {
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ret = mpp_hal_control(enc->hal, cmd, param);
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} break;
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case MPP_ENC_SET_OSD_DATA_CFG : {
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case MPP_ENC_GET_EXTRA_INFO :
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case MPP_ENC_SET_RC_CFG :
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case MPP_ENC_GET_RC_CFG :
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case MPP_ENC_SET_OSD_PLT_CFG :
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case MPP_ENC_SET_OSD_DATA_CFG :
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case MPP_ENC_SET_SEI_CFG :
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case MPP_ENC_GET_SEI_DATA : {
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ret = mpp_hal_control(enc->hal, cmd, param);
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} break;
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default : {
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@@ -34,6 +34,7 @@ extern RK_U32 h264e_hal_log_mode;
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#define H264E_HAL_LOG_DPB 0x00001000
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#define H264E_HAL_LOG_HEADER 0x00002000
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#define H264E_HAL_LOG_SEI 0x00004000
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#define H264E_HAL_LOG_DETAIL 0x00010000
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@@ -87,6 +88,12 @@ extern RK_U32 h264e_hal_log_mode;
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{ mpp_log(fmt, ## __VA_ARGS__); }\
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} while (0)
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#define h264e_hal_log_sei(fmt, ...) \
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do {\
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if (h264e_hal_log_mode & H264E_HAL_LOG_SEI)\
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{ mpp_log(fmt, ## __VA_ARGS__); }\
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} while (0)
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#define h264e_hal_log_simple(fmt, ...) \
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do {\
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if (h264e_hal_log_mode & H264E_HAL_LOG_SIMPLE)\
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@@ -133,9 +140,18 @@ extern RK_U32 h264e_hal_log_mode;
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} \
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} while (0)
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#define H264E_HAL_SPRINT(s, ...) \
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do { \
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s += sprintf(s, ## __VA_ARGS__); \
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} while (0)
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#define H264E_UUID_LENGTH 16
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#define H264E_REF_MAX 16
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#define H264E_MAX_PACKETED_PARAM_SIZE 256 //sps + pps
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#define H264E_SPSPPS_BUF_SIZE 512 //sps + pps
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#define H264E_SEI_BUF_SIZE 1024 //unit in byte, may not be large enough in the future
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#define H264E_EXTRA_INFO_BUF_SIZE (H264E_SPSPPS_BUF_SIZE + H264E_SEI_BUF_SIZE)
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typedef enum h264e_hal_slice_type_t {
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H264E_HAL_SLICE_TYPE_P = 0,
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@@ -272,9 +288,22 @@ typedef struct h264e_hal_pps_t {
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const RK_U8 *scaling_list[8]; /* could be 12, but we don't allow separate Cb/Cr lists */
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} h264e_hal_pps;
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typedef enum h264e_sei_payload_type_t {
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H264E_SEI_BUFFERING_PERIOD = 0,
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H264E_SEI_PIC_TIMING = 1,
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H264E_SEI_PAN_SCAN_RECT = 2,
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H264E_SEI_FILLER = 3,
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H264E_SEI_USER_DATA_REGISTERED = 4,
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H264E_SEI_USER_DATA_UNREGISTERED = 5,
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H264E_SEI_RECOVERY_POINT = 6,
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H264E_SEI_DEC_REF_PIC_MARKING = 7,
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H264E_SEI_FRAME_PACKING = 45,
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} h264e_sei_payload_type;
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typedef enum h264e_rkv_nal_idx_t {
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RKV_H264E_RKV_NAL_IDX_SPS,
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RKV_H264E_RKV_NAL_IDX_PPS,
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RKV_H264E_RKV_NAL_IDX_SEI,
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RKV_H264E_RKV_NAL_IDX_BUTT,
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} h264e_rkv_nal_idx;
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@@ -316,6 +345,12 @@ typedef struct h264e_hal_vui_param_t {
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RK_S32 i_chroma_loc; /* both top & bottom */
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} h264e_hal_vui_param;
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typedef struct h264e_hal_sei_t {
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RK_U32 frame_cnt;
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h264e_control_extra_info_cfg extra_info_cfg;
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MppEncRcCfg rc_cfg;
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} h264e_hal_sei;
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typedef struct h264e_hal_ref_param_t {
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RK_S32 i_frame_reference; /* Maximum number of reference frames */
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RK_S32 i_ref_pos;
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@@ -357,13 +392,12 @@ typedef struct h264e_hal_context_t {
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void *dump_files;
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void *param_buf;
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size_t param_size;
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MppPacket packeted_param;
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void *test_cfg;
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h264e_control_extra_info_cfg extra_info_cfg;
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RK_U32 osd_plt_type; //0:user define, 1:default
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MppEncOSDData osd_data;
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MppEncSeiMode sei_mode;
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} h264e_hal_context;
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#endif
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@@ -1805,12 +1805,11 @@ RK_S32 hal_h264e_rkv_stream_get_pos(h264e_hal_rkv_stream *s)
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MPP_RET hal_h264e_rkv_stream_init(h264e_hal_rkv_stream *s)
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{
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RK_S32 offset = 0;
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RK_U8 *p_buf = NULL;
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s->buf = mpp_calloc(RK_U8, 512); //SPS+PPS
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p_buf = s->buf + 8; //NOTE
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s->buf = mpp_calloc(RK_U8, H264E_EXTRA_INFO_BUF_SIZE);
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s->buf_plus8 = s->buf + 8; //NOTE: prepare for align
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offset = (size_t)(p_buf) & 3;
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s->p = s->p_start = p_buf - offset;
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offset = (size_t)(s->buf_plus8) & 3;
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s->p = s->p_start = s->buf_plus8 - offset;
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//s->p_end = (RK_U8*)s->buf + i_data;
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s->i_left = (4 - offset) * 8;
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//s->cur_bits = endian_fix32(M32(s->p));
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@@ -1825,18 +1824,15 @@ MPP_RET hal_h264e_rkv_stream_init(h264e_hal_rkv_stream *s)
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MPP_RET hal_h264e_rkv_stream_reset(h264e_hal_rkv_stream *s)
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{
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RK_S32 offset = 0;
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RK_U8 *p_buf = NULL;
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p_buf = s->buf + 8; //NOTE
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h264e_hal_debug_enter();
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offset = (size_t)(p_buf) & 3;
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s->p = s->p_start = p_buf - offset;
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//s->p_end = (RK_U8*)s->buf + i_data;
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offset = (size_t)(s->buf_plus8) & 3;
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s->p = s->p_start;
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s->i_left = (4 - offset) * 8;
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//s->cur_bits = endian_fix32(M32(s->p));
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s->cur_bits = (*(s->p) << 24) + (*(s->p + 1) << 16) + (*(s->p + 2) << 8) + (*(s->p + 3) << 0);
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s->cur_bits >>= (4 - offset) * 8;
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s->count_bit = 0;
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h264e_hal_debug_leave();
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return MPP_OK;
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}
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@@ -2003,7 +1999,7 @@ MPP_RET hal_h264e_rkv_stream_flush(h264e_hal_rkv_stream *s)
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void hal_h264e_rkv_nals_init(h264e_hal_rkv_extra_info *out)
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{
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out->nal_buf = mpp_calloc(RK_U8, 512);
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out->nal_buf = mpp_calloc(RK_U8, H264E_EXTRA_INFO_BUF_SIZE);
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out->nal_num = 0;
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}
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@@ -2017,30 +2013,27 @@ void hal_h264e_rkv_nals_deinit(h264e_hal_rkv_extra_info *out)
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void hal_h264e_rkv_nal_start(h264e_hal_rkv_extra_info *out, RK_S32 i_type, RK_S32 i_ref_idc)
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{
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h264e_hal_rkv_stream *s = &out->stream;
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RK_U8 *stream_buf = s->p_start;
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out->nal[out->nal_num].i_ref_idc = i_ref_idc;
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out->nal[out->nal_num].i_type = i_type;
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out->nal[out->nal_num].b_long_startcode = 1;
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h264e_hal_rkv_nal *nal = &out->nal[out->nal_num];
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out->nal[out->nal_num].i_payload = 0;
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out->nal[out->nal_num].p_payload = &stream_buf[hal_h264e_rkv_stream_get_pos(s) / 8];
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out->nal[out->nal_num].i_padding = 0;
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nal->i_ref_idc = i_ref_idc;
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nal->i_type = i_type;
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nal->b_long_startcode = 1;
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nal->i_payload = 0;
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nal->p_payload = &s->buf_plus8[hal_h264e_rkv_stream_get_pos(s) / 8]; ////NOTE: consistent with stream_init
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nal->i_padding = 0;
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}
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void hal_h264e_rkv_nal_end(h264e_hal_rkv_extra_info *out)
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{
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h264e_hal_rkv_nal *nal = &(out->nal[out->nal_num]);
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h264e_hal_rkv_stream *s = &out->stream;
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RK_U8 *stream_buf = s->p_start;
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RK_U8 *end = &stream_buf[hal_h264e_rkv_stream_get_pos(s) / 8];
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RK_U8 *end = &s->buf_plus8[hal_h264e_rkv_stream_get_pos(s) / 8]; //NOTE: consistent with stream_init
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nal->i_payload = (RK_S32)(end - nal->p_payload);
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/* Assembly implementation of nal_escape reads past the end of the input.
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* While undefined padding wouldn't actually affect the output, it makes valgrind unhappy. */
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memset(end, 0xff, 64);
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//if (h->param.nalu_process)
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// h->param.nalu_process(h, nal, h->fenc->opaque);
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out->nal_num++;
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//return x264_nal_check_buffer(h);
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}
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RK_U8 *hal_h264e_rkv_nal_escape_c(RK_U8 *dst, RK_U8 *src, RK_U8 *end)
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@@ -2129,7 +2122,100 @@ MPP_RET hal_h264e_rkv_encapsulate_nals(h264e_hal_rkv_extra_info *out)
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return MPP_OK;
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}
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static MPP_RET hal_h264e_rkv_sei_pack2str(char *str, h264e_hal_rkv_extra_info *extra_info)
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{
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h264e_hal_sei *sei = &extra_info->sei;
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h264e_control_extra_info_cfg *extra_info_cfg = &sei->extra_info_cfg;
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MppEncRcCfg *rc_cfg = &sei->rc_cfg;
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h264e_hal_debug_enter();
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H264E_HAL_SPRINT(str, "frame %d rkvenc_cfg: ", sei->frame_cnt);
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if (extra_info->sei_change_flg & H264E_SEI_CHG_SPSPPS) {
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h264e_hal_log_sei("write sei extra_info_cfg");
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H264E_HAL_SPRINT(str, "extra_info: ");
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H264E_HAL_SPRINT(str, "pic_w %d ", extra_info_cfg->pic_luma_width);
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H264E_HAL_SPRINT(str, "pic_h %d ", extra_info_cfg->pic_luma_height);
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H264E_HAL_SPRINT(str, "en_cabac %d ", extra_info_cfg->enable_cabac);
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H264E_HAL_SPRINT(str, "t8x8 %d ", extra_info_cfg->transform8x8_mode);
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H264E_HAL_SPRINT(str, "cb_qp_ofst %d ", extra_info_cfg->chroma_qp_index_offset);
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H264E_HAL_SPRINT(str, "pic_init_qp %d ", extra_info_cfg->pic_init_qp);
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H264E_HAL_SPRINT(str, "fps %d ", extra_info_cfg->frame_rate);
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H264E_HAL_SPRINT(str, "src_fmt %d ", extra_info_cfg->input_image_format);
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H264E_HAL_SPRINT(str, "profile %d ", extra_info_cfg->profile_idc);
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H264E_HAL_SPRINT(str, "level %d ", extra_info_cfg->level_idc);
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H264E_HAL_SPRINT(str, "key_interval %d ", extra_info_cfg->keyframe_max_interval);
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H264E_HAL_SPRINT(str, "cr_qp_ofst %d ", extra_info_cfg->second_chroma_qp_index_offset);
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H264E_HAL_SPRINT(str, "pps_id %d ", extra_info_cfg->pps_id);
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extra_info->sei_change_flg &= ~H264E_SEI_CHG_SPSPPS;
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}
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if (extra_info->sei_change_flg & H264E_SEI_CHG_RC) {
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h264e_hal_log_sei("write sei rc_cfg");
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H264E_HAL_SPRINT(str, "rc: ");
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H264E_HAL_SPRINT(str, "mode %d ", rc_cfg->rc_mode);
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H264E_HAL_SPRINT(str, "qlt %d ", rc_cfg->quality);
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H264E_HAL_SPRINT(str, "bps_tgt %d ", rc_cfg->bps_target);
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H264E_HAL_SPRINT(str, "bps_max %d ", rc_cfg->bps_max);
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H264E_HAL_SPRINT(str, "bps_min %d ", rc_cfg->bps_min);
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H264E_HAL_SPRINT(str, "fps_in %d ", rc_cfg->fps_in);
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H264E_HAL_SPRINT(str, "fps_out %d ", rc_cfg->fps_out);
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H264E_HAL_SPRINT(str, "gop %d ", rc_cfg->gop);
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H264E_HAL_SPRINT(str, "skip_cnt %d ", rc_cfg->skip_cnt);
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extra_info->sei_change_flg &= ~H264E_SEI_CHG_RC;
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}
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h264e_hal_debug_leave();
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return MPP_OK;
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}
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static MPP_RET hal_h264e_rkv_sei_write(h264e_hal_rkv_stream *s, RK_U8 *payload, RK_S32 payload_size, RK_S32 payload_type)
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{
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RK_S32 i = 0;
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h264e_hal_debug_enter();
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s->count_bit = 0;
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hal_h264e_rkv_stream_realign(s);
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for (i = 0; i <= payload_type - 255; i += 255)
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hal_h264e_rkv_stream_write_with_log(s, 8, 0xff, "sei_payload_type_ff_byte");
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hal_h264e_rkv_stream_write_with_log(s, 8, payload_type - i, "sei_last_payload_type_byte");
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for (i = 0; i <= payload_size - 255; i += 255)
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hal_h264e_rkv_stream_write_with_log(s, 8, 0xff, "sei_payload_size_ff_byte");
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hal_h264e_rkv_stream_write_with_log( s, 8, payload_size - i , "sei_last_payload_size_byte");
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for (i = 0; i < payload_size; i++)
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hal_h264e_rkv_stream_write_with_log(s, 8, (RK_U32)payload[i], "sei_payload_data");
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hal_h264e_rkv_stream_rbsp_trailing(s);
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hal_h264e_rkv_stream_flush(s);
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h264e_hal_debug_leave();
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return MPP_OK;
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}
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MPP_RET hal_h264e_rkv_sei_encode(h264e_hal_rkv_extra_info *info)
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{
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char *str = (char *)info->sei_buf;
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RK_S32 str_len = 0;
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hal_h264e_rkv_sei_pack2str(str + H264E_UUID_LENGTH, info);
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str_len = strlen(str) + 1;
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if (str_len > H264E_SEI_BUF_SIZE) {
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h264e_hal_log_err("SEI actual string length %d exceed malloced size %d", str_len, H264E_SEI_BUF_SIZE);
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return MPP_NOK;
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} else {
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hal_h264e_rkv_sei_write(&info->stream, (RK_U8 *)str, str_len, H264E_SEI_USER_DATA_UNREGISTERED);
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}
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return MPP_OK;
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}
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MPP_RET hal_h264e_rkv_sps_write(h264e_hal_sps *sps, h264e_hal_rkv_stream *s)
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{
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@@ -2456,9 +2542,21 @@ MPP_RET hal_h264e_rkv_pps_write(h264e_hal_pps *pps, h264e_hal_sps *sps, h264e_ha
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static MPP_RET hal_h264e_rkv_init_extra_info(h264e_hal_rkv_extra_info *extra_info)
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{
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// random ID number generated according to ISO-11578
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// NOTE: any element of h264e_sei_uuid should NOT be 0x00,
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// otherwise the string length of sei_buf will always be the distance between the
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// element 0x00 address and the sei_buf start address.
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static const RK_U8 h264e_sei_uuid[H264E_UUID_LENGTH] = {
|
||||
0x63, 0xfc, 0x6a, 0x3c, 0xd8, 0x5c, 0x44, 0x1e,
|
||||
0x87, 0xfb, 0x3f, 0xab, 0xec, 0xb3, 0xb6, 0x77
|
||||
};
|
||||
|
||||
hal_h264e_rkv_nals_init(extra_info);
|
||||
hal_h264e_rkv_stream_init(&extra_info->stream);
|
||||
|
||||
extra_info->sei_buf = mpp_calloc_size(RK_U8, H264E_SEI_BUF_SIZE);
|
||||
memcpy(extra_info->sei_buf, h264e_sei_uuid, H264E_UUID_LENGTH);
|
||||
|
||||
return MPP_OK;
|
||||
}
|
||||
|
||||
@@ -2468,6 +2566,8 @@ static MPP_RET hal_h264e_rkv_deinit_extra_info(void *extra_info)
|
||||
hal_h264e_rkv_stream_deinit(&info->stream);
|
||||
hal_h264e_rkv_nals_deinit(info);
|
||||
|
||||
MPP_FREE(info->sei_buf);
|
||||
|
||||
return MPP_OK;
|
||||
}
|
||||
|
||||
@@ -2476,13 +2576,15 @@ static MPP_RET hal_h264e_rkv_set_extra_info(h264e_hal_context *ctx, void *param)
|
||||
h264e_control_extra_info_cfg *cfg = (h264e_control_extra_info_cfg *)param;
|
||||
h264e_hal_param *par = &ctx->param;
|
||||
h264e_hal_rkv_extra_info *info = (h264e_hal_rkv_extra_info *)ctx->extra_info;
|
||||
h264e_hal_sei *sei = &info->sei;
|
||||
h264e_hal_sps *sps_info = &info->sps;
|
||||
h264e_hal_pps *pps_info = &info->pps;
|
||||
|
||||
h264e_hal_debug_enter();
|
||||
hal_h264e_rkv_dump_mpp_extra_info_cfg(ctx, cfg);
|
||||
|
||||
ctx->extra_info_cfg = *cfg;
|
||||
sei->extra_info_cfg = *cfg;
|
||||
|
||||
info->nal_num = 0;
|
||||
hal_h264e_rkv_stream_reset(&info->stream);
|
||||
|
||||
@@ -2496,6 +2598,13 @@ static MPP_RET hal_h264e_rkv_set_extra_info(h264e_hal_context *ctx, void *param)
|
||||
hal_h264e_rkv_pps_write(pps_info, sps_info, &info->stream);
|
||||
hal_h264e_rkv_nal_end(info);
|
||||
|
||||
if (ctx->sei_mode == MPP_ENC_SEI_MODE_ONE_SEQ || ctx->sei_mode == MPP_ENC_SEI_MODE_ONE_FRAME) {
|
||||
info->sei_change_flg |= H264E_SEI_CHG_SPSPPS;
|
||||
hal_h264e_rkv_nal_start(info, RKVENC_NAL_SEI, RKVENC_NAL_PRIORITY_DISPOSABLE);
|
||||
hal_h264e_rkv_sei_encode(info);
|
||||
hal_h264e_rkv_nal_end(info);
|
||||
}
|
||||
|
||||
hal_h264e_rkv_encapsulate_nals(info);
|
||||
|
||||
h264e_hal_debug_leave();
|
||||
@@ -2503,6 +2612,24 @@ static MPP_RET hal_h264e_rkv_set_extra_info(h264e_hal_context *ctx, void *param)
|
||||
return MPP_OK;
|
||||
}
|
||||
|
||||
static MPP_RET hal_h264e_rkv_get_extra_info(h264e_hal_context *ctx, MppPacket *pkt_out)
|
||||
{
|
||||
RK_S32 k = 0;
|
||||
size_t offset = 0;
|
||||
MppPacket pkt = ctx->packeted_param;
|
||||
h264e_hal_rkv_extra_info *src = (h264e_hal_rkv_extra_info *)ctx->extra_info;
|
||||
|
||||
for (k = 0; k < src->nal_num; k++) {
|
||||
h264e_hal_log_header("get extra info nal type %d, size %d bytes", src->nal[k].i_type, src->nal[k].i_payload);
|
||||
mpp_packet_write(pkt, offset, src->nal[k].p_payload, src->nal[k].i_payload);
|
||||
offset += src->nal[k].i_payload;
|
||||
}
|
||||
mpp_packet_set_length(pkt, offset);
|
||||
*pkt_out = pkt;
|
||||
|
||||
return MPP_OK;
|
||||
}
|
||||
|
||||
static MPP_RET hal_h264e_rkv_set_osd_plt(h264e_hal_context *ctx, void *param)
|
||||
{
|
||||
MppEncOSDPlt *plt = (MppEncOSDPlt *)param;
|
||||
@@ -2593,9 +2720,8 @@ MPP_RET hal_h264e_rkv_init(void *hal, MppHalCfg *cfg)
|
||||
ctx->extra_info = mpp_calloc(h264e_hal_rkv_extra_info, 1);
|
||||
ctx->dpb_ctx = mpp_calloc(h264e_hal_rkv_dpb_ctx, 1);
|
||||
ctx->dump_files = mpp_calloc(h264e_hal_rkv_dump_files, 1);
|
||||
ctx->param_size = H264E_MAX_PACKETED_PARAM_SIZE;
|
||||
ctx->param_buf = mpp_calloc_size(void, ctx->param_size);
|
||||
mpp_packet_init(&ctx->packeted_param, ctx->param_buf, ctx->param_size);
|
||||
ctx->param_buf = mpp_calloc_size(void, H264E_EXTRA_INFO_BUF_SIZE);
|
||||
mpp_packet_init(&ctx->packeted_param, ctx->param_buf, H264E_EXTRA_INFO_BUF_SIZE);
|
||||
hal_h264e_rkv_open_dump_files(ctx->dump_files);
|
||||
hal_h264e_rkv_init_extra_info(ctx->extra_info);
|
||||
hal_h264e_rkv_reference_init(ctx->dpb_ctx, &ctx->param);
|
||||
@@ -2645,6 +2771,7 @@ MPP_RET hal_h264e_rkv_deinit(void *hal)
|
||||
MPP_FREE(ctx->regs);
|
||||
MPP_FREE(ctx->ioctl_input);
|
||||
MPP_FREE(ctx->ioctl_output);
|
||||
MPP_FREE(ctx->param_buf);
|
||||
|
||||
if (ctx->buffers) {
|
||||
hal_h264e_rkv_free_buffers(ctx);
|
||||
@@ -2661,10 +2788,6 @@ MPP_RET hal_h264e_rkv_deinit(void *hal)
|
||||
ctx->packeted_param = NULL;
|
||||
}
|
||||
|
||||
MPP_FREE(ctx->param_buf);
|
||||
|
||||
ctx->param_size = 0;
|
||||
|
||||
if (ctx->dpb_ctx) {
|
||||
hal_h264e_rkv_reference_deinit(ctx->dpb_ctx);
|
||||
MPP_FREE(ctx->dpb_ctx);
|
||||
@@ -2791,7 +2914,8 @@ MPP_RET hal_h264e_rkv_set_rc_regs(h264e_hal_context *ctx, h264e_rkv_reg_set *reg
|
||||
|
||||
regs->swreg55.ctu_ebits = mb_target_size; //sw_ctu_target_bits;
|
||||
} else {
|
||||
h264e_control_extra_info_cfg *extra_info_cfg = &ctx->extra_info_cfg;
|
||||
h264e_hal_rkv_extra_info *extra_info = (h264e_hal_rkv_extra_info *)ctx->extra_info;
|
||||
h264e_control_extra_info_cfg *extra_info_cfg = &extra_info->sei.extra_info_cfg;
|
||||
RK_U32 num_mbs_oneframe = (syn->pic_luma_width + 15) / 16 * ((syn->pic_luma_height + 15) / 16);
|
||||
RK_U32 frame_target_bitrate = (syn->pic_luma_width * syn->pic_luma_height / 1920 / 1080) * 8000000 / 8; //Bytes
|
||||
RK_U32 frame_target_size = frame_target_bitrate / extra_info_cfg->keyframe_max_interval;
|
||||
@@ -3089,6 +3213,14 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
|
||||
|
||||
h264e_hal_log_simple("frame %d | type %d | start gen regs", ctx->frame_cnt, syn->slice_type);
|
||||
|
||||
if (ctx->sei_mode == MPP_ENC_SEI_MODE_ONE_FRAME && extra_info->sei_change_flg) {
|
||||
extra_info->nal_num = 0;
|
||||
hal_h264e_rkv_stream_reset(&extra_info->stream);
|
||||
hal_h264e_rkv_nal_start(extra_info, RKVENC_NAL_SEI, RKVENC_NAL_PRIORITY_DISPOSABLE);
|
||||
hal_h264e_rkv_sei_encode(extra_info);
|
||||
hal_h264e_rkv_nal_end(extra_info);
|
||||
}
|
||||
|
||||
if (ctx->frame_cnt == 0) {
|
||||
if (MPP_OK != hal_h264e_rkv_allocate_buffers(ctx, syn, sps, test_cfg)) {
|
||||
h264e_hal_log_err("hal_h264e_rkv_allocate_buffers failed, free buffers and return");
|
||||
@@ -3483,6 +3615,7 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
|
||||
|
||||
ctx->frame_cnt_gen_ready++;
|
||||
ctx->frame_cnt++;
|
||||
extra_info->sei.frame_cnt++;
|
||||
|
||||
h264e_hal_debug_leave();
|
||||
|
||||
@@ -3702,21 +3835,9 @@ MPP_RET hal_h264e_rkv_control(void *hal, RK_S32 cmd_type, void *param)
|
||||
break;
|
||||
}
|
||||
case MPP_ENC_GET_EXTRA_INFO: {
|
||||
RK_S32 k = 0;
|
||||
size_t offset = 0;
|
||||
MppPacket pkt = ctx->packeted_param;
|
||||
MppPacket *pkt_out = (MppPacket *)param;
|
||||
h264e_hal_rkv_extra_info *src = (h264e_hal_rkv_extra_info *)ctx->extra_info;
|
||||
|
||||
for (k = 0; k < src->nal_num; k++) {
|
||||
h264e_hal_log_header("get extra info nal type %d, size %d bytes", src->nal[k].i_type, src->nal[k].i_payload);
|
||||
mpp_packet_write(pkt, offset, src->nal[k].p_payload, src->nal[k].i_payload);
|
||||
offset += src->nal[k].i_payload;
|
||||
}
|
||||
mpp_packet_set_length(pkt, offset);
|
||||
*pkt_out = pkt;
|
||||
|
||||
hal_h264e_rkv_dump_mpp_strm_out_header(ctx, pkt);
|
||||
hal_h264e_rkv_get_extra_info(ctx, pkt_out);
|
||||
hal_h264e_rkv_dump_mpp_strm_out_header(ctx, *pkt_out);
|
||||
break;
|
||||
}
|
||||
case MPP_ENC_SET_OSD_PLT_CFG: {
|
||||
@@ -3727,6 +3848,14 @@ MPP_RET hal_h264e_rkv_control(void *hal, RK_S32 cmd_type, void *param)
|
||||
hal_h264e_rkv_set_osd_data(ctx, param);
|
||||
break;
|
||||
}
|
||||
case MPP_ENC_SET_SEI_CFG: {
|
||||
ctx->sei_mode = *((MppEncSeiMode *)param);
|
||||
break;
|
||||
}
|
||||
case MPP_ENC_GET_SEI_DATA: {
|
||||
hal_h264e_rkv_get_extra_info(ctx, (MppPacket *)param);
|
||||
break;
|
||||
}
|
||||
default : {
|
||||
h264e_hal_log_err("unrecognizable cmd type %d", cmd_type);
|
||||
} break;
|
||||
|
@@ -84,6 +84,9 @@ enc_mode
|
||||
#define RKV_H264E_INT_BUS_READ_ERROR 0x00000080
|
||||
#define RKV_H264E_INT_TIMEOUT_ERROR 0x00000100
|
||||
|
||||
#define H264E_SEI_CHG_SPSPPS 0x00000001
|
||||
#define H264E_SEI_CHG_RC 0x00000010
|
||||
|
||||
#if RKV_H264E_SDK_TEST
|
||||
typedef struct h264e_hal_rkv_coveragetest_cfg_t {
|
||||
RK_U32 qp;
|
||||
@@ -201,7 +204,8 @@ typedef struct h264e_hal_rkv_stream_t {
|
||||
|
||||
//add buf pointer
|
||||
RK_U8 *buf;
|
||||
RK_U32 count_bit;
|
||||
RK_U8 *buf_plus8;
|
||||
RK_U32 count_bit; // only for debug
|
||||
} h264e_hal_rkv_stream;
|
||||
|
||||
|
||||
@@ -209,10 +213,14 @@ typedef struct h264e_hal_rkv_extra_info_t {
|
||||
RK_S32 nal_num;
|
||||
h264e_hal_rkv_nal nal[RKV_H264E_RKV_NAL_IDX_BUTT];
|
||||
RK_U8 *nal_buf;
|
||||
RK_U8 *sei_buf;
|
||||
RK_U32 sei_change_flg;
|
||||
h264e_hal_rkv_stream stream;
|
||||
h264e_hal_sps sps;
|
||||
h264e_hal_pps pps;
|
||||
h264e_hal_sei sei;
|
||||
} h264e_hal_rkv_extra_info;
|
||||
|
||||
#define RKV_H264E_REF_MAX 16
|
||||
typedef RK_U8 pixel;
|
||||
struct h264e_hal_rkv_weight_t;
|
||||
|
@@ -1645,7 +1645,7 @@ static MPP_RET hal_h264e_vpu_set_extra_info(h264e_hal_context *ctx, void *param)
|
||||
h264e_hal_pps *pps = &info->pps;
|
||||
h264e_hal_debug_enter();
|
||||
|
||||
ctx->extra_info_cfg = *cfg;
|
||||
info->sei.extra_info_cfg = *cfg;
|
||||
hal_h264e_vpu_stream_buffer_reset(sps_stream);
|
||||
hal_h264e_vpu_stream_buffer_reset(pps_stream);
|
||||
|
||||
@@ -1686,9 +1686,8 @@ MPP_RET hal_h264e_vpu_init(void *hal, MppHalCfg *cfg)
|
||||
ctx->buffers = mpp_calloc(h264e_hal_vpu_buffers, 1);
|
||||
ctx->extra_info = mpp_calloc(h264e_hal_vpu_extra_info, 1);
|
||||
ctx->dump_files = mpp_calloc(h264e_hal_vpu_dump_files, 1);
|
||||
ctx->param_size = H264E_MAX_PACKETED_PARAM_SIZE;
|
||||
ctx->param_buf = mpp_calloc_size(void, ctx->param_size);
|
||||
mpp_packet_init(&ctx->packeted_param, ctx->param_buf, ctx->param_size);
|
||||
ctx->param_buf = mpp_calloc_size(void, H264E_EXTRA_INFO_BUF_SIZE);
|
||||
mpp_packet_init(&ctx->packeted_param, ctx->param_buf, H264E_EXTRA_INFO_BUF_SIZE);
|
||||
|
||||
hal_h264e_vpu_init_extra_info(ctx->extra_info);
|
||||
#ifdef H264E_DUMP_DATA_TO_FILE
|
||||
@@ -1727,6 +1726,7 @@ MPP_RET hal_h264e_vpu_deinit(void *hal)
|
||||
h264e_hal_debug_enter();
|
||||
|
||||
MPP_FREE(ctx->regs);
|
||||
MPP_FREE(ctx->param_buf);
|
||||
|
||||
if (ctx->extra_info) {
|
||||
hal_h264e_vpu_deinit_extra_info(ctx->extra_info);
|
||||
@@ -1738,13 +1738,6 @@ MPP_RET hal_h264e_vpu_deinit(void *hal)
|
||||
ctx->packeted_param = NULL;
|
||||
}
|
||||
|
||||
if (ctx->param_buf) {
|
||||
mpp_free(ctx->param_buf);
|
||||
ctx->param_buf = NULL;
|
||||
}
|
||||
|
||||
ctx->param_size = 0;
|
||||
|
||||
if (ctx->buffers) {
|
||||
hal_h264e_vpu_free_buffers(ctx);
|
||||
MPP_FREE(ctx->buffers);
|
||||
@@ -2246,6 +2239,10 @@ MPP_RET hal_h264e_vpu_control(void *hal, RK_S32 cmd_type, void *param)
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
case MPP_ENC_SET_SEI_CFG: {
|
||||
ctx->sei_mode = *((MppEncSeiMode *)param);
|
||||
break;
|
||||
}
|
||||
default : {
|
||||
mpp_err("unrecognizable cmd type %d", cmd_type);
|
||||
} break;
|
||||
|
@@ -663,6 +663,7 @@ typedef struct h264e_hal_vpu_extra_info_t {
|
||||
h264e_hal_vpu_stream pps_stream;
|
||||
h264e_hal_sps sps;
|
||||
h264e_hal_pps pps;
|
||||
h264e_hal_sei sei;
|
||||
} h264e_hal_vpu_extra_info;
|
||||
|
||||
typedef enum h264e_hal_vpu_buf_grp_t {
|
||||
|
@@ -1363,7 +1363,7 @@ MPP_RET h264e_hal_vpu_test()
|
||||
h264e_syntax syntax_data;
|
||||
h264e_control_extra_info_cfg extra_info_cfg;
|
||||
MppPacket extra_info_pkt;
|
||||
RK_U8 extra_info_buf[H264E_MAX_PACKETED_PARAM_SIZE] = {0};
|
||||
RK_U8 extra_info_buf[H264E_EXTRA_INFO_BUF_SIZE] = {0};
|
||||
MppBufferGroup hw_input_buf_grp = NULL;
|
||||
MppBufferGroup hw_output_buf_grp = NULL;
|
||||
MppBuffer hw_input_buf = NULL; //Y, U, V
|
||||
@@ -1373,7 +1373,7 @@ MPP_RET h264e_hal_vpu_test()
|
||||
|
||||
RK_U8 *input_sw_buf = mpp_malloc(RK_U8, MAX_FRAME_TOTAL_SIZE);
|
||||
|
||||
mpp_packet_init(&extra_info_pkt, (void *)extra_info_buf, H264E_MAX_PACKETED_PARAM_SIZE);
|
||||
mpp_packet_init(&extra_info_pkt, (void *)extra_info_buf, H264E_EXTRA_INFO_BUF_SIZE);
|
||||
|
||||
get_vpu_syntax_in(&syntax_data, hw_input_buf, hw_output_strm_buf, frame_luma_size);
|
||||
if (fp_golden_syntax_in)
|
||||
@@ -1476,8 +1476,7 @@ MPP_RET h264e_hal_rkv_test(h264e_hal_test_cfg *test_cfg)
|
||||
HalTaskInfo task_info;
|
||||
h264e_control_extra_info_cfg extra_info_cfg;
|
||||
MppPacket extra_info_pkt;
|
||||
RK_U8 extra_info_buf[H264E_MAX_PACKETED_PARAM_SIZE] = {0};
|
||||
//h264e_hal_rkv_dbg_info dbg_info;
|
||||
RK_U8 extra_info_buf[H264E_EXTRA_INFO_BUF_SIZE] = {0};
|
||||
h264e_syntax syntax_data[RKV_H264E_LINKTABLE_FRAME_NUM];
|
||||
MppBufferGroup hw_input_buf_grp = NULL;
|
||||
MppBufferGroup hw_output_buf_grp = NULL;
|
||||
@@ -1499,7 +1498,7 @@ MPP_RET h264e_hal_rkv_test(h264e_hal_test_cfg *test_cfg)
|
||||
MPP_ENC_OSD_PLT_BLACK
|
||||
};
|
||||
|
||||
mpp_packet_init(&extra_info_pkt, (void *)extra_info_buf, H264E_MAX_PACKETED_PARAM_SIZE);
|
||||
mpp_packet_init(&extra_info_pkt, (void *)extra_info_buf, H264E_EXTRA_INFO_BUF_SIZE);
|
||||
|
||||
|
||||
get_rkv_syntax_in(&syntax_data[0], hw_input_buf_mul, hw_output_strm_buf_mul, test_cfg);
|
||||
|
@@ -178,6 +178,7 @@ int mpi_enc_test(MpiEncTestCmd *cmd)
|
||||
MppBuffer md_buf[MPI_ENC_IO_COUNT] = { NULL };
|
||||
MppBuffer osd_idx_buf[MPI_ENC_IO_COUNT] = { NULL };
|
||||
MppEncOSDPlt osd_plt;
|
||||
MppEncSeiMode sei_mode = MPP_ENC_SEI_MODE_ONE_SEQ;
|
||||
|
||||
// paramter for resource malloc
|
||||
RK_U32 width = cmd->width;
|
||||
@@ -301,6 +302,12 @@ int mpi_enc_test(MpiEncTestCmd *cmd)
|
||||
mpp_cfg.level = 41;
|
||||
mpp_cfg.cabac_en = 1;
|
||||
|
||||
ret = mpi->control(ctx, MPP_ENC_SET_SEI_CFG, &sei_mode);
|
||||
if (MPP_OK != ret) {
|
||||
mpp_err("mpi control enc set sei cfg failed\n");
|
||||
goto MPP_TEST_OUT;
|
||||
}
|
||||
|
||||
ret = mpi->control(ctx, MPP_ENC_SET_CFG, &mpp_cfg);
|
||||
if (MPP_OK != ret) {
|
||||
mpp_err("mpi control enc set cfg failed\n");
|
||||
|
Reference in New Issue
Block a user