From f94ae6d0a0349c0ee2c204927b9acec40e1f998b Mon Sep 17 00:00:00 2001 From: Herman Chen Date: Wed, 29 Dec 2021 18:47:22 +0800 Subject: [PATCH] [vepu580]: Add YUV444 support for vepu580 Change-Id: I58859e59094fcecc13011b16f33b3810abbc7882 Signed-off-by: Herman Chen --- inc/mpp_frame.h | 1 + mpp/hal/rkenc/common/vepu541_common.c | 11 ++++- mpp/hal/rkenc/common/vepu541_common.h | 5 ++ mpp/hal/rkenc/h264e/hal_h264e_vepu580.c | 47 ++++++++++++++++--- mpp/hal/rkenc/h265e/hal_h265e_vepu580.c | 61 ++++++++++++------------- mpp/mpi.cpp | 2 + utils/mpi_enc_utils.c | 4 ++ utils/utils.c | 38 +++++++++++++++ 8 files changed, 129 insertions(+), 40 deletions(-) diff --git a/inc/mpp_frame.h b/inc/mpp_frame.h index 3a670268..29805480 100644 --- a/inc/mpp_frame.h +++ b/inc/mpp_frame.h @@ -221,6 +221,7 @@ typedef enum { MPP_FMT_YUV440SP = (MPP_FRAME_FMT_YUV + 13), /* YYYY... UVUV... */ MPP_FMT_YUV411SP = (MPP_FRAME_FMT_YUV + 14), /* YYYY... UV... */ MPP_FMT_YUV444SP = (MPP_FRAME_FMT_YUV + 15), /* YYYY... UVUVUVUV... */ + MPP_FMT_YUV444P = (MPP_FRAME_FMT_YUV + 16), /* YYYY... UUUU... VVVV... */ MPP_FMT_YUV_BUTT, MPP_FMT_RGB565 = (MPP_FRAME_FMT_RGB + 0), /* 16-bit RGB */ diff --git a/mpp/hal/rkenc/common/vepu541_common.c b/mpp/hal/rkenc/common/vepu541_common.c index bf19da53..081547f4 100644 --- a/mpp/hal/rkenc/common/vepu541_common.c +++ b/mpp/hal/rkenc/common/vepu541_common.c @@ -163,7 +163,7 @@ static VepuFmtCfg vepu541_yuv_cfg[MPP_FMT_YUV_BUTT] = { .offset = zeros, }, { /* MPP_FMT_YUV444SP */ - .format = VEPU541_FMT_NONE, + .format = VEPU580_FMT_YUV444SP, .alpha_swap = 0, .rbuv_swap = 0, .src_range = 0, @@ -171,6 +171,15 @@ static VepuFmtCfg vepu541_yuv_cfg[MPP_FMT_YUV_BUTT] = { .weight = zeros, .offset = zeros, }, + { /* MPP_FMT_YUV444P */ + .format = VEPU580_FMT_YUV444P, + .alpha_swap = 0, + .rbuv_swap = 1, + .src_range = 0, + .src_endian = 0, + .weight = zeros, + .offset = zeros, + }, }; static VepuFmtCfg vepu541_rgb_cfg[MPP_FMT_RGB_BUTT - MPP_FRAME_FMT_RGB] = { diff --git a/mpp/hal/rkenc/common/vepu541_common.h b/mpp/hal/rkenc/common/vepu541_common.h index 391e924a..d0abb7a7 100644 --- a/mpp/hal/rkenc/common/vepu541_common.h +++ b/mpp/hal/rkenc/common/vepu541_common.h @@ -42,6 +42,11 @@ typedef enum Vepu541Fmt_e { /* vepu540 add YUV400 support */ VEPU540_FMT_YUV400 = VEPU541_FMT_BUTT, // 10 VEPU540_FMT_BUTT, // 11 + + /* vepu580 add YUV444 support */ + VEPU580_FMT_YUV444SP = 12, + VEPU580_FMT_YUV444P = 13, + VEPU580_FMT_BUTT, // 14 } Vepu541Fmt; typedef struct VepuFmtCfg_t { diff --git a/mpp/hal/rkenc/h264e/hal_h264e_vepu580.c b/mpp/hal/rkenc/h264e/hal_h264e_vepu580.c index f4480978..c5ba5b1f 100644 --- a/mpp/hal/rkenc/h264e/hal_h264e_vepu580.c +++ b/mpp/hal/rkenc/h264e/hal_h264e_vepu580.c @@ -459,9 +459,36 @@ static MPP_RET setup_vepu580_prep(HalVepu580RegSet *regs, MppEncPrepCfg *prep) regs->reg_base.src_fmt.src_range = cfg.src_range; regs->reg_base.src_fmt.out_fmt = 1; - y_stride = (prep->hor_stride) ? (prep->hor_stride) : (prep->width); - c_stride = (hw_fmt == VEPU541_FMT_YUV422SP || hw_fmt == VEPU541_FMT_YUV420SP) ? - y_stride : y_stride / 2; + if (MPP_FRAME_FMT_IS_FBC(fmt)) { + y_stride = MPP_ALIGN(prep->width, 16); + } else if (prep->hor_stride) { + y_stride = prep->hor_stride; + } else { + if (hw_fmt == VEPU541_FMT_BGRA8888 ) + y_stride = prep->width * 4; + else if (hw_fmt == VEPU541_FMT_BGR888 ) + y_stride = prep->width * 3; + else if (hw_fmt == VEPU541_FMT_BGR565 || + hw_fmt == VEPU541_FMT_YUYV422 || + hw_fmt == VEPU541_FMT_UYVY422) + y_stride = prep->width * 2; + else + y_stride = prep->width; + } + + switch (hw_fmt) { + case VEPU580_FMT_YUV444SP : { + c_stride = y_stride * 2; + } break; + case VEPU541_FMT_YUV422SP : + case VEPU541_FMT_YUV420SP : + case VEPU580_FMT_YUV444P : { + c_stride = y_stride; + } break; + default : { + c_stride = y_stride / 2; + } break; + } if (hw_fmt < VEPU541_FMT_NONE) { regs->reg_base.src_udfy.csc_wgt_b2y = 25; @@ -501,14 +528,14 @@ static MPP_RET setup_vepu580_prep(HalVepu580RegSet *regs, MppEncPrepCfg *prep) } regs->reg_base.src_proc.afbcd_en = MPP_FRAME_FMT_IS_FBC(fmt) ? 1 : 0; - regs->reg_base.src_strd0.src_strd0 = y_stride; - regs->reg_base.src_strd1.src_strd1 = c_stride; + regs->reg_base.src_strd0.src_strd0 = y_stride; + regs->reg_base.src_strd1.src_strd1 = c_stride; regs->reg_base.src_proc.src_mirr = prep->mirroring > 0; regs->reg_base.src_proc.src_rot = prep->rotation; regs->reg_base.src_proc.txa_en = 0; - regs->reg_base.sli_cfg.sli_crs_en = 1; + regs->reg_base.sli_cfg.sli_crs_en = 1; regs->reg_base.pic_ofst.pic_ofst_y = 0; regs->reg_base.pic_ofst.pic_ofst_x = 0; @@ -1075,6 +1102,14 @@ static void setup_vepu580_io_buf(HalVepu580RegSet *regs, MppDev dev, off_in[0] = 0; off_in[1] = 0; } break; + case VEPU580_FMT_YUV444SP : { + off_in[0] = hor_stride * ver_stride; + off_in[1] = hor_stride * ver_stride; + } break; + case VEPU580_FMT_YUV444P : { + off_in[0] = hor_stride * ver_stride; + off_in[1] = hor_stride * ver_stride * 2; + } break; case VEPU541_FMT_NONE : default : { off_in[0] = 0; diff --git a/mpp/hal/rkenc/h265e/hal_h265e_vepu580.c b/mpp/hal/rkenc/h265e/hal_h265e_vepu580.c index 5c6c16da..1352aef0 100644 --- a/mpp/hal/rkenc/h265e/hal_h265e_vepu580.c +++ b/mpp/hal/rkenc/h265e/hal_h265e_vepu580.c @@ -262,7 +262,6 @@ static MPP_RET vepu580_h265_setup_hal_bufs(H265eV580HalContext *ctx) MPP_RET ret = MPP_OK; VepuFmtCfg *fmt = (VepuFmtCfg *)ctx->input_fmt; RK_U32 frame_size; - Vepu541Fmt input_fmt = VEPU541_FMT_YUV420P; RK_S32 mb_wd64, mb_h64; MppEncRefCfg ref_cfg = ctx->cfg->ref_cfg; MppEncPrepCfg *prep = &ctx->cfg->prep; @@ -276,30 +275,6 @@ static MPP_RET vepu580_h265_setup_hal_bufs(H265eV580HalContext *ctx) frame_size = MPP_ALIGN(prep->width, 16) * MPP_ALIGN(prep->height, 16); vepu541_set_fmt(fmt, ctx->cfg->prep.format); - input_fmt = (Vepu541Fmt)fmt->format; - switch (input_fmt) { - case VEPU541_FMT_YUV420P: - case VEPU541_FMT_YUV420SP: { - frame_size = frame_size * 3 / 2; - } break; - case VEPU541_FMT_YUV422P: - case VEPU541_FMT_YUV422SP: - case VEPU541_FMT_YUYV422: - case VEPU541_FMT_UYVY422: - case VEPU541_FMT_BGR565: { - frame_size *= 2; - } break; - case VEPU541_FMT_BGR888: { - frame_size *= 3; - } break; - case VEPU541_FMT_BGRA8888: { - frame_size *= 4; - } break; - default: { - hal_h265e_err("invalid src color space: %d\n", input_fmt); - return MPP_NOK; - } - } if (ref_cfg) { MppEncCpbInfo *info = mpp_enc_ref_cfg_get_cpb_info(ref_cfg); @@ -1173,6 +1148,14 @@ vepu580_h265_set_patch_info(MppDev dev, H265eSyntax_new *syn, Vepu541Fmt input_f u_offset = 0; v_offset = 0; } break; + case VEPU580_FMT_YUV444SP : { + u_offset = hor_stride * ver_stride; + v_offset = hor_stride * ver_stride; + } break; + case VEPU580_FMT_YUV444P : { + u_offset = hor_stride * ver_stride; + v_offset = hor_stride * ver_stride * 2; + } break; case VEPU541_FMT_BGR565: case VEPU541_FMT_BGR888: case VEPU541_FMT_BGRA8888: { @@ -1347,19 +1330,31 @@ static MPP_RET vepu580_h265_set_pp_regs(H265eV580RegSet *regs, VepuFmtCfg *fmt, if (prep_cfg->hor_stride) { stridey = prep_cfg->hor_stride; } else { - if (reg_base->reg0198_src_fmt.src_cfmt == VEPU541_FMT_BGRA8888 ) + if (fmt->format == VEPU541_FMT_BGRA8888 ) stridey = prep_cfg->width * 4; - else if (reg_base->reg0198_src_fmt.src_cfmt == VEPU541_FMT_BGR888 ) + else if (fmt->format == VEPU541_FMT_BGR888 ) stridey = prep_cfg->width * 3; - else if (reg_base->reg0198_src_fmt.src_cfmt == VEPU541_FMT_BGR565 || - reg_base->reg0198_src_fmt.src_cfmt == VEPU541_FMT_YUYV422 || - reg_base->reg0198_src_fmt.src_cfmt == VEPU541_FMT_UYVY422) + else if (fmt->format == VEPU541_FMT_BGR565 || + fmt->format == VEPU541_FMT_YUYV422 || + fmt->format == VEPU541_FMT_UYVY422) stridey = prep_cfg->width * 2; + else + stridey = prep_cfg->width; } - stridec = (reg_base->reg0198_src_fmt.src_cfmt == VEPU541_FMT_YUV422SP || - reg_base->reg0198_src_fmt.src_cfmt == VEPU541_FMT_YUV420SP) ? - stridey : stridey / 2; + switch (fmt->format) { + case VEPU580_FMT_YUV444SP : { + stridec = stridey * 2; + } break; + case VEPU541_FMT_YUV422SP : + case VEPU541_FMT_YUV420SP : + case VEPU580_FMT_YUV444P : { + stridec = stridey; + } break; + default : { + stridec = stridey / 2; + } break; + } if (reg_base->reg0198_src_fmt.src_cfmt < VEPU541_FMT_NONE) { reg_base->reg0199_src_udfy.csc_wgt_r2y = 66; diff --git a/mpp/mpi.cpp b/mpp/mpi.cpp index a171bd49..6e5e2368 100644 --- a/mpp/mpi.cpp +++ b/mpp/mpi.cpp @@ -566,6 +566,8 @@ static MppFrameFormatInfo color_list[] = { { MPP_FMT_YUV422_YUYV, "YUV422-YUYV, YUY2" }, { MPP_FMT_YUV422_UYVY, "YUV422-UYVY, UYVY" }, { MPP_FMT_YUV400, "YUV400-Y8, Y800" }, + { MPP_FMT_YUV444SP, "YUV444SP" }, + { MPP_FMT_YUV444P, "YUV444P" }, { MPP_FMT_RGB565, "RGB565" }, { MPP_FMT_BGR565, "BGR565" }, diff --git a/utils/mpi_enc_utils.c b/utils/mpi_enc_utils.c index 8d62562d..37944530 100644 --- a/utils/mpi_enc_utils.c +++ b/utils/mpi_enc_utils.c @@ -48,6 +48,10 @@ RK_S32 mpi_enc_width_default_stride(RK_S32 width, MppFrameFormat fmt) /* NOTE: 422 need to align to 8 so chroma can align to 16 */ stride = MPP_ALIGN(width, 8); } break; + case MPP_FMT_YUV444SP : + case MPP_FMT_YUV444P : { + stride = MPP_ALIGN(width, 8); + } break; case MPP_FMT_RGB565: case MPP_FMT_BGR565: case MPP_FMT_RGB555: diff --git a/utils/utils.c b/utils/utils.c index 67f0a39b..7e66ddd7 100644 --- a/utils/utils.c +++ b/utils/utils.c @@ -1030,6 +1030,44 @@ MPP_RET fill_image(RK_U8 *buf, RK_U32 width, RK_U32 height, } } } break; + case MPP_FMT_YUV444SP : { + RK_U8 *p = buf_y; + + for (y = 0; y < height; y++, p += hor_stride) { + for (x = 0; x < width; x++) { + p[x] = x + y + frame_count * 3; + } + } + + p = buf + hor_stride * ver_stride; + for (y = 0; y < height; y++, p += hor_stride * 2) { + for (x = 0; x < width; x++) { + p[x * 2 + 0] = 128 + y / 2 + frame_count * 2; + p[x * 2 + 1] = 64 + x + frame_count * 5; + } + } + } break; + case MPP_FMT_YUV444P : { + RK_U8 *p = buf_y; + + for (y = 0; y < height; y++, p += hor_stride) { + for (x = 0; x < width; x++) { + p[x] = x + y + frame_count * 3; + } + } + p = buf + hor_stride * ver_stride; + for (y = 0; y < height; y++, p += hor_stride) { + for (x = 0; x < width; x++) { + p[x] = 128 + y / 2 + frame_count * 2; + } + } + p = buf + hor_stride * ver_stride * 2; + for (y = 0; y < height; y++, p += hor_stride) { + for (x = 0; x < width; x++) { + p[x] = 64 + x + frame_count * 5; + } + } + } break; case MPP_FMT_RGB565 : case MPP_FMT_BGR565 : case MPP_FMT_RGB555 :