diff --git a/mpp/codec/dec/vp9/vp9d_parser.c b/mpp/codec/dec/vp9/vp9d_parser.c index 0ee0f392..3254a4b1 100644 --- a/mpp/codec/dec/vp9/vp9d_parser.c +++ b/mpp/codec/dec/vp9/vp9d_parser.c @@ -382,11 +382,6 @@ MPP_RET vp9d_parser_deinit(Vp9CodecContext *vp9_ctx) return MPP_OK; } -static RK_U32 hor_align_64(RK_U32 val) -{ - return MPP_ALIGN(val, 64); -} - static RK_S32 vp9_alloc_frame(Vp9CodecContext *ctx, VP9Frame *frame) { VP9Context *s = ctx->priv_data; @@ -403,17 +398,20 @@ static RK_S32 vp9_alloc_frame(Vp9CodecContext *ctx, VP9Frame *frame) mpp_frame_set_poc(frame->f, s->cur_poc); if (MPP_FRAME_FMT_IS_FBC(s->cfg->base.out_fmt)) { - RK_U32 fbc_hdr_stride = MPP_ALIGN(ctx->width, 64); + RK_U32 fbc_hdr_stride = mpp_align_64(ctx->width); - mpp_slots_set_prop(s->slots, SLOTS_HOR_ALIGN, hor_align_64); + mpp_slots_set_prop(s->slots, SLOTS_HOR_ALIGN, mpp_align_64); mpp_frame_set_fmt(frame->f, ctx->pix_fmt | ((s->cfg->base.out_fmt & (MPP_FRAME_FBC_MASK)))); if (*compat_ext_fbc_hdr_256_odd) - fbc_hdr_stride = MPP_ALIGN(ctx->width, 256) | 256; + fbc_hdr_stride = mpp_align_256_odd(ctx->width); mpp_frame_set_fbc_hdr_stride(frame->f, fbc_hdr_stride); - } else + } else { + mpp_slots_set_prop(s->slots, SLOTS_HOR_ALIGN, mpp_align_256_odd); + mpp_slots_set_prop(s->slots, SLOTS_VER_ALIGN, mpp_align_64); mpp_frame_set_fmt(frame->f, ctx->pix_fmt); + } if (s->cfg->base.enable_thumbnail && s->hw_info->cap_down_scale) mpp_frame_set_thumbnail_en(frame->f, 1); diff --git a/osal/inc/mpp_common.h b/osal/inc/mpp_common.h index b80c0c4f..fb8eb98d 100644 --- a/osal/inc/mpp_common.h +++ b/osal/inc/mpp_common.h @@ -213,6 +213,8 @@ static __inline RK_U32 mpp_is_32bit() RK_S32 axb_div_c(RK_S32 a, RK_S32 b, RK_S32 c); RK_U32 mpp_align_16(RK_U32 val); RK_U32 mpp_align_64(RK_U32 val); +RK_U32 mpp_align_128(RK_U32 val); +RK_U32 mpp_align_256_odd(RK_U32 val); #ifdef __cplusplus } diff --git a/osal/mpp_common.cpp b/osal/mpp_common.cpp index 295e5824..ae612ee6 100644 --- a/osal/mpp_common.cpp +++ b/osal/mpp_common.cpp @@ -116,3 +116,13 @@ RK_U32 mpp_align_64(RK_U32 val) { return MPP_ALIGN(val, 64); } + +RK_U32 mpp_align_128(RK_U32 val) +{ + return MPP_ALIGN(val, 128); +} + +RK_U32 mpp_align_256_odd(RK_U32 val) +{ + return MPP_ALIGN(val, 256) | 256; +}