package/mpp
1
0
Fork 0
mirror of https://github.com/nyanmisaka/mpp.git synced 2025-10-18 23:14:35 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity

[jpege]: Add jpeg slice encoding mode

Browse Source 
Change-Id: Ib0a919bd2e1c4da5968a0d7f378e455e9a40367c
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
This commit is contained in:
Herman Chen
2021-01-30 14:42:18 +08:00
parent ed7e3af8fd
commit f35aae8a04
4 changed files with 59 additions and 44 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
mpp/codec/enc/jpeg/jpege_api_v2.c
View File

@@ -520,6 +520,7 @@ static MPP_RET jpege_start(void *ctx, HalEncTask *task)
static MPP_RET jpege_proc_hal(void *ctx, HalEncTask *task) static MPP_RET jpege_proc_hal(void *ctx, HalEncTask *task)
{ {
JpegeCtx *p = (JpegeCtx *)ctx; JpegeCtx *p = (JpegeCtx *)ctx;
MppFrame frame = task->frame;
JpegeSyntax *syntax = &p->syntax; JpegeSyntax *syntax = &p->syntax;
MppEncCfgSet *cfg = p->cfg; MppEncCfgSet *cfg = p->cfg;
MppEncPrepCfg *prep = &cfg->prep; MppEncPrepCfg *prep = &cfg->prep;
@@ -537,6 +538,8 @@ static MPP_RET jpege_proc_hal(void *ctx, HalEncTask *task)
syntax->format = prep->format; syntax->format = prep->format;
syntax->color = prep->color; syntax->color = prep->color;
syntax->rotation = prep->rotation; syntax->rotation = prep->rotation;
syntax->offset_x = mpp_frame_get_offset_x(frame);
syntax->offset_y = mpp_frame_get_offset_y(frame);
syntax->quality = codec->jpeg.quant; syntax->quality = codec->jpeg.quant;
syntax->q_factor = codec->jpeg.q_factor; syntax->q_factor = codec->jpeg.q_factor;
syntax->qf_min = codec->jpeg.qf_min; syntax->qf_min = codec->jpeg.qf_min;
@@ -544,9 +547,12 @@ static MPP_RET jpege_proc_hal(void *ctx, HalEncTask *task)
syntax->qtable_y = codec->jpeg.qtable_y; syntax->qtable_y = codec->jpeg.qtable_y;
syntax->qtable_c = codec->jpeg.qtable_u; syntax->qtable_c = codec->jpeg.qtable_u;
syntax->part_rows = 0; syntax->part_rows = 0;
syntax->restart_ri = 0;
syntax->low_delay = 0;
if (split->split_mode) { if (split->split_mode) {
RK_U32 mb_h = MPP_ALIGN(prep->height, 16) / 16; RK_U32 mb_h = MPP_ALIGN(prep->height, 16) / 16;
RK_U32 part_rows = 0;
if (split->split_mode == MPP_ENC_SPLIT_BY_CTU) { if (split->split_mode == MPP_ENC_SPLIT_BY_CTU) {
RK_U32 part_mbs = split->split_arg; RK_U32 part_mbs = split->split_arg;
@@ -554,8 +560,9 @@ static MPP_RET jpege_proc_hal(void *ctx, HalEncTask *task)
RK_U32 mb_all = mb_w * mb_h; RK_U32 mb_all = mb_w * mb_h;
if (part_mbs > 0 && part_mbs <= mb_all) { if (part_mbs > 0 && part_mbs <= mb_all) {
syntax->part_rows = (part_mbs + mb_w - 1) / mb_w; part_rows = (part_mbs + mb_w - 1) / mb_w;
mpp_assert(syntax->part_rows > 0 && syntax->part_rows <= mb_h); if (part_rows >= mb_h)
part_rows = 0;
} else { } else {
mpp_err_f("warning: invalid split arg %d > max %d\n", mpp_err_f("warning: invalid split arg %d > max %d\n",
part_mbs, mb_all); part_mbs, mb_all);
@@ -564,9 +571,10 @@ static MPP_RET jpege_proc_hal(void *ctx, HalEncTask *task)
mpp_err_f("warning: only mcu split is supported\n"); mpp_err_f("warning: only mcu split is supported\n");
} }
if (!syntax->part_rows) { if (part_rows) {
mpp_err_f("disable partition encoding\n"); syntax->part_rows = part_rows;
syntax->part_rows = mb_h; syntax->restart_ri = syntax->mcu_w * part_rows;
syntax->low_delay = cfg->base.low_delay && part_rows;
} }
} }

6
mpp/common/jpege_syntax.h
View File

@@ -30,6 +30,8 @@ typedef struct JpegeSyntax_t {
MppFrameFormat format; MppFrameFormat format;
MppFrameColorSpace color; MppFrameColorSpace color;
MppEncRotationCfg rotation; MppEncRotationCfg rotation;
RK_U32 offset_x;
RK_U32 offset_y;
/* For quantization table */ /* For quantization table */
RK_U32 quality; RK_U32 quality;
@@ -76,7 +78,9 @@ typedef struct JpegeSyntax_t {
RK_U8 *comment_data; RK_U8 *comment_data;
/* For jpeg low delay slice encoding */ /* For jpeg low delay slice encoding */
RK_U8 part_rows; RK_U32 low_delay;
RK_U32 part_rows;
RK_U32 restart_ri;
} JpegeSyntax; } JpegeSyntax;
typedef struct JpegeFeedback_t { typedef struct JpegeFeedback_t {

6
mpp/hal/vpu/jpege/hal_jpege_hdr.c
View File

@@ -891,12 +891,10 @@ static void write_jpeg_sos_header(JpegeBits *bits)
void write_jpeg_RestartInterval(JpegeBits *bits, JpegeSyntax *syntax) void write_jpeg_RestartInterval(JpegeBits *bits, JpegeSyntax *syntax)
{ {
RK_U32 restart_ri = syntax->mcu_w * syntax->part_rows; if (syntax->restart_ri) {
if (restart_ri) {
jpege_bits_put(bits, 0xFFDD, 16); jpege_bits_put(bits, 0xFFDD, 16);
jpege_bits_put(bits, 4, 16); jpege_bits_put(bits, 4, 16);
jpege_bits_put(bits, restart_ri, 16); jpege_bits_put(bits, syntax->restart_ri, 16);
} }
} }

73
mpp/hal/vpu/jpege/hal_jpege_vepu2_v2.c
View File

@@ -31,6 +31,9 @@
#include "hal_jpege_base.h" #include "hal_jpege_base.h"
#define VEPU_JPEGE_VEPU2_NUM_REGS 184 #define VEPU_JPEGE_VEPU2_NUM_REGS 184
#define VEPU2_REG_INPUT_Y 48
#define VEPU2_REG_INPUT_U 49
#define VEPU2_REG_INPUT_V 50
typedef struct jpege_vepu2_reg_set_t { typedef struct jpege_vepu2_reg_set_t {
RK_U32 val[VEPU_JPEGE_VEPU2_NUM_REGS]; RK_U32 val[VEPU_JPEGE_VEPU2_NUM_REGS];
@@ -127,6 +130,7 @@ MPP_RET hal_jpege_vepu2_get_task(void *hal, HalEncTask *task)
ctx->part_bytepos = 0; ctx->part_bytepos = 0;
ctx->part_x_fill = 0; ctx->part_x_fill = 0;
ctx->part_y_fill = 0; ctx->part_y_fill = 0;
ctx->rst_marker_idx = 0;
task->part_first = 1; task->part_first = 1;
task->part_last = 0; task->part_last = 0;
@@ -138,47 +142,38 @@ MPP_RET hal_jpege_vepu2_get_task(void *hal, HalEncTask *task)
static MPP_RET hal_jpege_vepu2_set_extra_info(MppDev dev, JpegeSyntax *syntax, static MPP_RET hal_jpege_vepu2_set_extra_info(MppDev dev, JpegeSyntax *syntax,
RK_U32 start_mbrow) RK_U32 start_mbrow)
{ {
MppFrameFormat fmt = syntax->format; VepuOffsetCfg cfg;
RK_U32 hor_stride = syntax->hor_stride;
RK_U32 ver_stride = syntax->ver_stride;
RK_U32 offset = 0;
MppDevRegOffsetCfg trans_cfg; MppDevRegOffsetCfg trans_cfg;
switch (fmt) { cfg.fmt = syntax->format;
case MPP_FMT_YUV420SP : cfg.width = syntax->width;
case MPP_FMT_YUV420P : { cfg.height = syntax->height;
if (start_mbrow) { cfg.hor_stride = syntax->hor_stride;
offset = 16 * start_mbrow * hor_stride; cfg.ver_stride = syntax->ver_stride;
cfg.offset_x = syntax->offset_x;
cfg.offset_y = syntax->offset_y + start_mbrow * 16;
trans_cfg.reg_idx = 48; get_vepu_offset_cfg(&cfg);
trans_cfg.offset = offset;
mpp_dev_ioctl(dev, MPP_DEV_REG_OFFSET, &trans_cfg);
}
offset = hor_stride * ver_stride + hor_stride * start_mbrow * 16 / 2; if (cfg.offset_byte[0]) {
if (fmt == MPP_FMT_YUV420P) trans_cfg.reg_idx = VEPU2_REG_INPUT_Y;
offset = hor_stride * start_mbrow * 16 / 4 + hor_stride * ver_stride; trans_cfg.offset = cfg.offset_byte[0];
trans_cfg.reg_idx = 49;
trans_cfg.offset = offset;
mpp_dev_ioctl(dev, MPP_DEV_REG_OFFSET, &trans_cfg); mpp_dev_ioctl(dev, MPP_DEV_REG_OFFSET, &trans_cfg);
}
if (fmt == MPP_FMT_YUV420P) if (cfg.offset_byte[1]) {
offset = hor_stride * start_mbrow * 16 / 4 + hor_stride * ver_stride * 5 / 4; trans_cfg.reg_idx = VEPU2_REG_INPUT_U;
trans_cfg.offset = cfg.offset_byte[1];
trans_cfg.reg_idx = 50;
trans_cfg.offset = offset;
mpp_dev_ioctl(dev, MPP_DEV_REG_OFFSET, &trans_cfg); mpp_dev_ioctl(dev, MPP_DEV_REG_OFFSET, &trans_cfg);
} break; }
default : {
if (start_mbrow) {
offset = start_mbrow * hor_stride;
trans_cfg.reg_idx = 48; if (cfg.offset_byte[2]) {
trans_cfg.offset = offset; trans_cfg.reg_idx = VEPU2_REG_INPUT_V;
mpp_dev_ioctl(dev, MPP_DEV_REG_OFFSET, &trans_cfg); trans_cfg.offset = cfg.offset_byte[2];
}
} break; mpp_dev_ioctl(dev, MPP_DEV_REG_OFFSET, &trans_cfg);
} }
return MPP_OK; return MPP_OK;
@@ -255,9 +250,9 @@ MPP_RET hal_jpege_vepu2_gen_regs(void *hal, HalEncTask *task)
memset(regs, 0, sizeof(RK_U32) * VEPU_JPEGE_VEPU2_NUM_REGS); memset(regs, 0, sizeof(RK_U32) * VEPU_JPEGE_VEPU2_NUM_REGS);
// input address setup // input address setup
regs[48] = mpp_buffer_get_fd(input); regs[VEPU2_REG_INPUT_Y] = mpp_buffer_get_fd(input);
regs[49] = mpp_buffer_get_fd(input); regs[VEPU2_REG_INPUT_U] = regs[VEPU2_REG_INPUT_Y];
regs[50] = regs[49]; regs[VEPU2_REG_INPUT_V] = regs[VEPU2_REG_INPUT_Y];
// output address setup // output address setup
bitpos = jpege_bits_get_bitpos(bits); bitpos = jpege_bits_get_bitpos(bits);
@@ -356,10 +351,20 @@ MPP_RET hal_jpege_vepu2_gen_regs(void *hal, HalEncTask *task)
(fmt_cfg.swap_8_in & 1) << 31; (fmt_cfg.swap_8_in & 1) << 31;
} }
regs[107] = ((syntax->part_rows & 0xff) << 16) |
jpege_restart_marker[ctx->rst_marker_idx & 7];
/* encoder interrupt */ /* encoder interrupt */
regs[109] = 1 << 12 | /* clock gating */ regs[109] = 1 << 12 | /* clock gating */
1 << 10; /* enable timeout interrupt */ 1 << 10; /* enable timeout interrupt */
if (syntax->low_delay) {
/* slice encode end by RST */
regs[107] |= (1 << 24);
/* slice interrupt enable */
regs[109] |= (1 << 16);
}
/* 0 ~ 31 quantization tables */ /* 0 ~ 31 quantization tables */
{ {
RK_S32 i; RK_S32 i;