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[hal_h265d]: use macro to set register length

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Change-Id: I910942a34b44173ace6a6e29ff79a814eb79857c
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
This commit is contained in:
Ding Wei
2018-07-26 16:30:48 +08:00
committed by Herman Chen
parent 993dbb0f8c
commit f2385c1134
2 changed files with 4 additions and 2 deletions
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4
mpp/hal/rkdec/h265d/hal_h265d_reg.c
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@@ -1528,7 +1528,7 @@ MPP_RET hal_h265d_start(void *hal, HalTaskInfo *task)
}
#ifdef RKPLATFORM
// 68 is the nb of uint32_t
ret = mpp_device_send_reg(reg_cxt->dev_ctx, (RK_U32*)hw_regs, 78);
ret = mpp_device_send_reg(reg_cxt->dev_ctx, (RK_U32*)hw_regs, RKVDEC_HEVC_REGISTERS);
if (ret != 0) {
mpp_err("RK_HEVC_DEC: ERROR: mpp_device_send_reg Failed!!!\n");
return MPP_ERR_VPUHW;
@@ -1556,7 +1556,7 @@ MPP_RET hal_h265d_wait(void *hal, HalTaskInfo *task)
hw_regs = ( H265d_REGS_t *)reg_cxt->hw_regs;
}
p = (RK_U8*)hw_regs;
ret = mpp_device_wait_reg(reg_cxt->dev_ctx, (RK_U32*)hw_regs, 78);
ret = mpp_device_wait_reg(reg_cxt->dev_ctx, (RK_U32*)hw_regs, RKVDEC_HEVC_REGISTERS);
if (hw_regs->sw_interrupt.sw_dec_error_sta
|| hw_regs->sw_interrupt.sw_dec_empty_sta) {

2
mpp/hal/rkdec/h265d/hal_h265d_reg.h
View File

@@ -39,6 +39,8 @@
#define HEVC_DECODER_REG_NUM (48)
#define RKVDEC_REG_PERF_CYCLE_INDEX (64)
#define RKVDEC_HEVC_REGISTERS (68)
#define h265h_dbg(flag, fmt, ...) _mpp_dbg(h265h_debug, flag, fmt, ## __VA_ARGS__)
extern RK_U32 h265h_debug;