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[h264e_rkv]: Implement OSD function
1. add description for OSD cmd in rk_mpi_cmd.h 2. judge if input MppBuffer for OSD is NULL Change-Id: I6d674c81790d9cf57acdfa23f20c929b56f263e9 Signed-off-by: Lin Kesheng <lks@rock-chips.com>
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@@ -77,8 +77,8 @@ typedef enum {
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MPP_ENC_GET_RC_CFG,
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MPP_ENC_SET_PREP_CFG,
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MPP_ENC_GET_PREP_CFG,
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MPP_ENC_SET_OSD_PLT_CFG,
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MPP_ENC_SET_OSD_DATA_CFG,
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MPP_ENC_SET_OSD_PLT_CFG, /* set OSD palette, parameter should be pointer to MppEncOSDPlt */
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MPP_ENC_SET_OSD_DATA_CFG, /* set OSD data with at most 8 regions, parameter should be pointer to MppEncOSDData */
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MPP_ENC_GET_OSD_CFG,
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MPP_ENC_SET_CFG,
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MPP_ENC_GET_CFG,
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@@ -2882,47 +2882,55 @@ MPP_RET hal_h264e_rkv_set_roi_regs(h264e_rkv_reg_set *regs, h264e_syntax *syn, M
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MPP_RET hal_h264e_rkv_set_osd_regs(h264e_hal_context *ctx, h264e_rkv_reg_set *regs)
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{
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#define H264E_DEFAULT_OSD_INV_THR 15 //TODO: open interface later
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RK_U32 k = 0;
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MppEncOSDData *osd_data = &ctx->osd_data;
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RK_U32 num = osd_data->num_region;
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MppEncOSDRegion *region = osd_data->region;
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RK_U32 buf_fd = mpp_buffer_get_fd(osd_data->buf);
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regs->swreg65.osd_clk_sel = 1;
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regs->swreg65.osd_plt_type = ctx->osd_plt_type;
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if (osd_data->buf) {
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for (k = 0; k < num; k++) {
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regs->swreg65.osd_en |= region[k].enable << k;
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regs->swreg65.osd_inv |= region[k].inverse << k;
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RK_S32 buf_fd = mpp_buffer_get_fd(osd_data->buf);
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if (region[k].enable) {
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regs->swreg67_osd_pos[k].lt_pos_x = region[k].start_mb_x;
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regs->swreg67_osd_pos[k].lt_pos_y = region[k].start_mb_y;
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regs->swreg67_osd_pos[k].rd_pos_x = region[k].start_mb_x + region[k].num_mb_x - 1;
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regs->swreg67_osd_pos[k].rd_pos_y = region[k].start_mb_y + region[k].num_mb_y - 1;
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if (buf_fd >= 0) {
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regs->swreg68_indx_addr_i[k] = buf_fd | (region[k].buf_offset << 10);
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RK_U32 k = 0;
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RK_U32 num = osd_data->num_region;
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MppEncOSDRegion *region = osd_data->region;
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regs->swreg65.osd_clk_sel = 1;
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regs->swreg65.osd_plt_type = ctx->osd_plt_type;
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for (k = 0; k < num; k++) {
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regs->swreg65.osd_en |= region[k].enable << k;
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regs->swreg65.osd_inv |= region[k].inverse << k;
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if (region[k].enable) {
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regs->swreg67_osd_pos[k].lt_pos_x = region[k].start_mb_x;
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regs->swreg67_osd_pos[k].lt_pos_y = region[k].start_mb_y;
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regs->swreg67_osd_pos[k].rd_pos_x = region[k].start_mb_x + region[k].num_mb_x - 1;
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regs->swreg67_osd_pos[k].rd_pos_y = region[k].start_mb_y + region[k].num_mb_y - 1;
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regs->swreg68_indx_addr_i[k] = buf_fd | (region[k].buf_offset << 10);
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}
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}
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if (region[0].inverse)
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regs->swreg66.osd_inv_r0 = H264E_DEFAULT_OSD_INV_THR;
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if (region[1].inverse)
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regs->swreg66.osd_inv_r1 = H264E_DEFAULT_OSD_INV_THR;
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if (region[2].inverse)
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regs->swreg66.osd_inv_r2 = H264E_DEFAULT_OSD_INV_THR;
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if (region[3].inverse)
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regs->swreg66.osd_inv_r3 = H264E_DEFAULT_OSD_INV_THR;
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if (region[4].inverse)
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regs->swreg66.osd_inv_r4 = H264E_DEFAULT_OSD_INV_THR;
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if (region[5].inverse)
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regs->swreg66.osd_inv_r5 = H264E_DEFAULT_OSD_INV_THR;
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if (region[6].inverse)
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regs->swreg66.osd_inv_r6 = H264E_DEFAULT_OSD_INV_THR;
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if (region[7].inverse)
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regs->swreg66.osd_inv_r7 = H264E_DEFAULT_OSD_INV_THR;
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}
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}
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if (region[0].inverse)
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regs->swreg66.osd_inv_r0 = H264E_DEFAULT_OSD_INV_THR;
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if (region[1].inverse)
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regs->swreg66.osd_inv_r1 = H264E_DEFAULT_OSD_INV_THR;
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if (region[2].inverse)
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regs->swreg66.osd_inv_r2 = H264E_DEFAULT_OSD_INV_THR;
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if (region[3].inverse)
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regs->swreg66.osd_inv_r3 = H264E_DEFAULT_OSD_INV_THR;
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if (region[4].inverse)
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regs->swreg66.osd_inv_r4 = H264E_DEFAULT_OSD_INV_THR;
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if (region[5].inverse)
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regs->swreg66.osd_inv_r5 = H264E_DEFAULT_OSD_INV_THR;
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if (region[6].inverse)
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regs->swreg66.osd_inv_r6 = H264E_DEFAULT_OSD_INV_THR;
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if (region[7].inverse)
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regs->swreg66.osd_inv_r7 = H264E_DEFAULT_OSD_INV_THR;
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return MPP_OK;
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}
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