From e402a8423f31ea9833acb9558b7f8d6a0811529f Mon Sep 17 00:00:00 2001
From: Herman Chen <herman.chen@rock-chips.com>
Date: Fri, 30 Dec 2022 16:44:07 +0800
Subject: [PATCH] [h264d]: Fix fbc_hdr_offset error issue

The impl->width is invalid before it is initialized.
So move fbc_hdr_stride setup after impl->width is initialized.

This issue is introduced by:

commit 5469f9d08b43e5f9146cc1ae665a255491865a26
Author: Herman Chen <herman.chen@rock-chips.com>
Date:   Fri Dec 23 16:38:54 2022 +0800

    [misc]: Add compatible for fbc header alignment

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I3f3f4bfd2d84b813c900e05492eb6df5ea6f7a29
---
 mpp/codec/dec/avs2/avs2d_dpb.c  | 10 +++++++++-
 mpp/codec/dec/h264/h264d_init.c | 11 ++++++-----
 2 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/mpp/codec/dec/avs2/avs2d_dpb.c b/mpp/codec/dec/avs2/avs2d_dpb.c
index e6ae58b2..93747540 100644
--- a/mpp/codec/dec/avs2/avs2d_dpb.c
+++ b/mpp/codec/dec/avs2/avs2d_dpb.c
@@ -22,8 +22,9 @@
 #include "mpp_mem.h"
 #include "mpp_log.h"
 #include "mpp_debug.h"
-#include "hal_task.h"
+#include "mpp_compat_impl.h"
 
+#include "hal_task.h"
 #include "avs2d_dpb.h"
 
 #ifndef INT_MAX
@@ -483,7 +484,14 @@ static Avs2dFrame_t *dpb_alloc_frame(Avs2dCtx_t *p_dec, HalDecTask *task)
     }
 
     if (MPP_FRAME_FMT_IS_FBC(p_dec->init.cfg->base.out_fmt)) {
+        RK_U32 fbc_hdr_stride = MPP_ALIGN(vsh->horizontal_size, 64);
+
         mpp_frame_set_fmt(mframe, mpp_frame_get_fmt(mframe) | (p_dec->init.cfg->base.out_fmt & (MPP_FRAME_FBC_MASK)));
+
+        if (*compat_ext_fbc_hdr_256_odd)
+            fbc_hdr_stride = MPP_ALIGN(vsh->horizontal_size, 256) | 256;
+
+        mpp_frame_set_fbc_hdr_stride(mframe, fbc_hdr_stride);
     }
 
     if (p_dec->is_hdr)
diff --git a/mpp/codec/dec/h264/h264d_init.c b/mpp/codec/dec/h264/h264d_init.c
index 47ee140e..50df9ad2 100644
--- a/mpp/codec/dec/h264/h264d_init.c
+++ b/mpp/codec/dec/h264/h264d_init.c
@@ -465,6 +465,12 @@ static MPP_RET dpb_mark_malloc(H264dVideoCtx_t *p_Vid, H264_StorePic_t *dec_pic)
             impl->hor_stride = hor_stride;
             impl->ver_stride = ver_stride;
 
+            /* After cropped */
+            impl->width = p_Vid->width_after_crop;
+            impl->height = p_Vid->height_after_crop;
+            impl->pts = p_Vid->p_Cur->last_pts;
+            impl->dts = p_Vid->p_Cur->last_dts;
+
             if (MPP_FRAME_FMT_IS_FBC(out_fmt)) {
                 impl->offset_x = 0;
                 impl->offset_y = 4;
@@ -477,11 +483,6 @@ static MPP_RET dpb_mark_malloc(H264dVideoCtx_t *p_Vid, H264_StorePic_t *dec_pic)
                     impl->fbc_hdr_stride =  MPP_ALIGN(impl->width, 256) | 256;
             }
 
-            /* After cropped */
-            impl->width = p_Vid->width_after_crop;
-            impl->height = p_Vid->height_after_crop;
-            impl->pts = p_Vid->p_Cur->last_pts;
-            impl->dts = p_Vid->p_Cur->last_dts;
             /* Setting the interlace mode for the picture */
             switch (structure) {
             case FRAME: