From dde7c5ae487c5e2fa71241f07c22b0c2186b2925 Mon Sep 17 00:00:00 2001 From: Herman Chen Date: Fri, 23 Dec 2022 18:17:47 +0800 Subject: [PATCH] [vepu5xx]: Fix encoder hw stuck Set rfp_load_thd to zero to avoid reference window timeout stuck. Signed-off-by: Herman Chen Change-Id: I0d24ef109304cb3262167538e2872447bad707f7 --- mpp/hal/rkenc/h264e/hal_h264e_vepu580.c | 2 +- mpp/hal/rkenc/h265e/hal_h265e_vepu540c.c | 2 +- mpp/hal/rkenc/h265e/hal_h265e_vepu580.c | 2 +- mpp/hal/rkenc/jpege/hal_jpege_vepu540c.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/mpp/hal/rkenc/h264e/hal_h264e_vepu580.c b/mpp/hal/rkenc/h264e/hal_h264e_vepu580.c index dbafc435..6cc33e97 100644 --- a/mpp/hal/rkenc/h264e/hal_h264e_vepu580.c +++ b/mpp/hal/rkenc/h264e/hal_h264e_vepu580.c @@ -567,7 +567,7 @@ static void setup_vepu580_normal(HalVepu580RegSet *regs) /* reg007 INT_STA is read only */ /* reg008 ~ reg0011 gap */ regs->reg_ctl.enc_wdg.vs_load_thd = 0x1fffff; - regs->reg_ctl.enc_wdg.rfp_load_thd = 0xff; + regs->reg_ctl.enc_wdg.rfp_load_thd = 0; /* reg015 DTRNS_MAP */ regs->reg_ctl.dtrns_map.cmvw_bus_ordr = 0; diff --git a/mpp/hal/rkenc/h265e/hal_h265e_vepu540c.c b/mpp/hal/rkenc/h265e/hal_h265e_vepu540c.c index 75a39343..71d837a9 100644 --- a/mpp/hal/rkenc/h265e/hal_h265e_vepu540c.c +++ b/mpp/hal/rkenc/h265e/hal_h265e_vepu540c.c @@ -1200,7 +1200,7 @@ MPP_RET hal_h265e_v540c_gen_regs(void *hal, HalEncTask *task) // reg_ctl->reg0013_dtrns_cfg.dspr_otsd = (ctx->frame_type == INTER_P_FRAME); reg_ctl->reg0013_dtrns_cfg.axi_brsp_cke = 0x0; reg_ctl->reg0014_enc_wdg.vs_load_thd = 0x1fffff; - reg_ctl->reg0014_enc_wdg.rfp_load_thd = 0xff; + reg_ctl->reg0014_enc_wdg.rfp_load_thd = 0; reg_ctl->reg0021_func_en.cke = 1; reg_ctl->reg0021_func_en.resetn_hw_en = 1; diff --git a/mpp/hal/rkenc/h265e/hal_h265e_vepu580.c b/mpp/hal/rkenc/h265e/hal_h265e_vepu580.c index bfce9c28..91b0626a 100644 --- a/mpp/hal/rkenc/h265e/hal_h265e_vepu580.c +++ b/mpp/hal/rkenc/h265e/hal_h265e_vepu580.c @@ -2402,7 +2402,7 @@ MPP_RET hal_h265e_v580_gen_regs(void *hal, HalEncTask *task) reg_ctl->reg0013_dtrns_cfg.dspr_otsd = (ctx->frame_type == INTER_P_FRAME); reg_ctl->reg0013_dtrns_cfg.axi_brsp_cke = 0x0; reg_ctl->reg0014_enc_wdg.vs_load_thd = 0x1fffff; - reg_ctl->reg0014_enc_wdg.rfp_load_thd = 0xff; + reg_ctl->reg0014_enc_wdg.rfp_load_thd = 0; reg_ctl->reg0021_func_en.cke = 1; reg_ctl->reg0021_func_en.resetn_hw_en = 1; diff --git a/mpp/hal/rkenc/jpege/hal_jpege_vepu540c.c b/mpp/hal/rkenc/jpege/hal_jpege_vepu540c.c index 7607ef8a..11e08802 100644 --- a/mpp/hal/rkenc/jpege/hal_jpege_vepu540c.c +++ b/mpp/hal/rkenc/jpege/hal_jpege_vepu540c.c @@ -195,7 +195,7 @@ MPP_RET hal_jpege_v540c_gen_regs(void *hal, HalEncTask *task) reg_ctl->reg0013_dtrns_cfg.axi_brsp_cke = 0x0; reg_ctl->reg0014_enc_wdg.vs_load_thd = 0x1fffff; - reg_ctl->reg0014_enc_wdg.rfp_load_thd = 0xff; + reg_ctl->reg0014_enc_wdg.rfp_load_thd = 0; vepu540c_set_jpeg_reg(&cfg); {