[hal_h264e_vepu541]: Add H.264E ROI and OSD

1. When ROI is enabled the qp_area_en should be always true to avoid
bug.
2. Use meta data to transmit ROI and OSD infomation to HAL.
3. Fix crash when roi is not set.

Change-Id: Ia40c139fcec5b334634c871cf12d7bb250d93b56
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
This commit is contained in:
Herman Chen
2020-02-28 15:26:03 +08:00
parent 54b047e396
commit ce5e257e87
3 changed files with 19 additions and 7 deletions

View File

@@ -388,9 +388,13 @@ static MPP_RET h264e_proc_cfg(void *ctx, MpiCmd cmd, void *param)
} break;
case MPP_ENC_SET_SEI_CFG : {
} break;
case MPP_ENC_SET_IDR_FRAME: {
case MPP_ENC_SET_IDR_FRAME : {
p->idr_request++;
} break;
case MPP_ENC_SET_OSD_PLT_CFG : {
} break;
case MPP_ENC_SET_OSD_DATA_CFG : {
} break;
default:
mpp_err("No correspond cmd found, and can not config!");
ret = MPP_NOK;

View File

@@ -353,7 +353,8 @@ MPP_RET vepu541_set_roi(void *buf, MppEncROICfg *roi, RK_S32 w, RK_S32 h)
cfg.force_intra = region->intra;
cfg.reserved = 0;
cfg.qp_area_idx = region->qp_area_idx;
cfg.qp_area_en = region->area_map_en;
// NOTE: When roi is enabled the qp_area_en should be one.
cfg.qp_area_en = 1; // region->area_map_en;
cfg.qp_adj = region->quality;
cfg.qp_adj_mode = region->abs_qp_en;

View File

@@ -66,7 +66,7 @@ typedef struct HalH264eVepu541Ctx_t {
RcHalCfg hal_rc_cfg;
/* roi */
MppEncROICfg *roi;
MppEncROICfg *roi_data;
MppBufferGroup roi_grp;
MppBuffer roi_buf;
RK_S32 roi_buf_size;
@@ -202,7 +202,7 @@ static RK_U32 update_vepu541_syntax(HalH264eVepu541Ctx *ctx, MppSyntax *syntax)
} break;
case H264E_SYN_ROI : {
hal_h264e_dbg_detail("update roi");
ctx->roi = desc->p;
ctx->roi_data = desc->p;
} break;
default : {
mpp_log_f("invalid syntax type %d\n", desc->type);
@@ -253,6 +253,13 @@ static MPP_RET hal_h264e_vepu541_get_task(void *hal, HalEncTask *task)
}
}
ctx->roi_data = NULL;
ctx->osd_data = NULL;
MppMeta meta = mpp_frame_get_meta(task->frame);
mpp_meta_get_ptr(meta, KEY_ROI_DATA, (void **)&ctx->roi_data);
mpp_meta_get_ptr(meta, KEY_OSD_DATA, (void **)&ctx->osd_data);
hal_h264e_dbg_func("leave %p\n", hal);
return MPP_OK;
@@ -603,12 +610,12 @@ static void setup_vepu541_orig(Vepu541H264eRegSet *regs, MppFrame frm)
static void setup_vepu541_roi(Vepu541H264eRegSet *regs, HalH264eVepu541Ctx *ctx)
{
MppEncCfgSet *cfg = ctx->cfg;
MppEncROICfg *roi = ctx->roi_data;
RK_U32 w = ctx->sps->pic_width_in_mbs * 16;
RK_U32 h = ctx->sps->pic_height_in_mbs * 16;
/* roi setup */
if (cfg->roi.number && cfg->roi.regions) {
if (roi && roi->number && roi->regions) {
RK_S32 roi_buf_size = vepu541_get_roi_buf_size(w, h);
if (!ctx->roi_buf || roi_buf_size != ctx->roi_buf_size) {
@@ -637,7 +644,7 @@ static void setup_vepu541_roi(Vepu541H264eRegSet *regs, HalH264eVepu541Ctx *ctx)
regs->reg013.roi_enc = 1;
regs->reg073.roi_addr = fd;
vepu541_set_roi(buf, &cfg->roi, w, h);
vepu541_set_roi(buf, roi, w, h);
} else {
regs->reg013.roi_enc = 0;
regs->reg073.roi_addr = 0;