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https://github.com/nyanmisaka/mpp.git
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[h264e]: add rotation configuration
Change-Id: I148814a644264b341d6db1d7af767dd485942829 Signed-off-by: Lin Kesheng <lks@rock-chips.com>
This commit is contained in:
@@ -386,7 +386,7 @@ typedef enum MppEncPrepCfgChange_e {
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* 5x5 sharpen core
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* 5x5 sharpen core
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*
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*
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* enable_y - enable luma sharpen
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* enable_y - enable luma sharpen
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* enable_c - enable chroma sharpen
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* enable_uv - enable chroma sharpen
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*/
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*/
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typedef struct {
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typedef struct {
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RK_U32 enable_y;
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RK_U32 enable_y;
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@@ -396,6 +396,21 @@ typedef struct {
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RK_S32 threshold;
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RK_S32 threshold;
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} MppEncPrepSharpenCfg;
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} MppEncPrepSharpenCfg;
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/*
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* input frame rotation parameter
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* 0 - disable rotation
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* 1 - 90 degree
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* 2 - 180 degree
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* 3 - 270 degree
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*/
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typedef enum MppEncRotationCfg_t {
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MPP_ENC_ROT_0,
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MPP_ENC_ROT_90,
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MPP_ENC_ROT_180,
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MPP_ENC_ROT_270,
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MPP_ENC_ROT_BUTT
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} MppEncRotationCfg;
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typedef struct MppEncPrepCfg_t {
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typedef struct MppEncPrepCfg_t {
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RK_U32 change;
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RK_U32 change;
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@@ -418,14 +433,7 @@ typedef struct MppEncPrepCfg_t {
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MppFrameFormat format;
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MppFrameFormat format;
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MppFrameColorSpace color;
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MppFrameColorSpace color;
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/*
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MppEncRotationCfg rotation;
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* input frame rotation parameter
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* 0 - disable rotation
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* 1 - 90 degree
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* 2 - 180 degree
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* 3 - 270 degree
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*/
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RK_S32 rotation;
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/*
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/*
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* input frame mirroring parameter
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* input frame mirroring parameter
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@@ -81,7 +81,7 @@ MPP_RET h264e_init(void *ctx, ControllerCfg *ctrl_cfg)
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prep->hor_stride = 1280;
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prep->hor_stride = 1280;
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prep->ver_stride = 720;
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prep->ver_stride = 720;
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prep->format = MPP_FMT_YUV420SP;
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prep->format = MPP_FMT_YUV420SP;
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prep->rotation = 0;
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prep->rotation = MPP_ENC_ROT_0;
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prep->mirroring = 0;
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prep->mirroring = 0;
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prep->denoise = 0;
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prep->denoise = 0;
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@@ -535,12 +535,6 @@ void mpp_enc_update_prep_cfg(MppEncPrepCfg *dst, MppEncPrepCfg *src)
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RK_U32 change = src->change;
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RK_U32 change = src->change;
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if (change) {
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if (change) {
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if (change & MPP_ENC_PREP_CFG_CHANGE_INPUT) {
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dst->width = src->width;
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dst->height = src->height;
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dst->hor_stride = src->hor_stride;
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dst->ver_stride = src->ver_stride;
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}
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if (change & MPP_ENC_PREP_CFG_CHANGE_FORMAT)
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if (change & MPP_ENC_PREP_CFG_CHANGE_FORMAT)
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dst->format = src->format;
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dst->format = src->format;
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@@ -557,6 +551,18 @@ void mpp_enc_update_prep_cfg(MppEncPrepCfg *dst, MppEncPrepCfg *src)
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if (change & MPP_ENC_PREP_CFG_CHANGE_SHARPEN)
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if (change & MPP_ENC_PREP_CFG_CHANGE_SHARPEN)
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dst->sharpen = src->sharpen;
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dst->sharpen = src->sharpen;
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if (change & MPP_ENC_PREP_CFG_CHANGE_INPUT) {
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if (dst->rotation == MPP_ENC_ROT_90 || dst->rotation == MPP_ENC_ROT_270) {
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dst->width = src->height;
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dst->height = src->width;
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} else {
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dst->width = src->width;
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dst->height = src->height;
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}
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dst->hor_stride = src->hor_stride;
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dst->ver_stride = src->ver_stride;
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}
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/*
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/*
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* NOTE: use OR here for avoiding overwrite on multiple config
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* NOTE: use OR here for avoiding overwrite on multiple config
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* When next encoding is trigger the change flag will be clear
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* When next encoding is trigger the change flag will be clear
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@@ -2432,7 +2432,8 @@ static MPP_RET h264e_rkv_set_pp_regs(H264eRkvRegSet *regs, H264eHwCfg *syn,
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RK_S32 stridey = 0;
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RK_S32 stridey = 0;
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RK_S32 stridec = 0;
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RK_S32 stridec = 0;
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regs->swreg14.src_cfmt = syn->input_format;
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regs->swreg14.src_cfmt = syn->input_format;
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regs->swreg19.src_rot = prep_cfg->rotation;
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for (k = 0; k < 5; k++)
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for (k = 0; k < 5; k++)
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regs->swreg21_scr_stbl[k] = 0;
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regs->swreg21_scr_stbl[k] = 0;
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@@ -2443,8 +2444,7 @@ static MPP_RET h264e_rkv_set_pp_regs(H264eRkvRegSet *regs, H264eHwCfg *syn,
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if (syn->hor_stride) {
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if (syn->hor_stride) {
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stridey = syn->hor_stride - 1;
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stridey = syn->hor_stride - 1;
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} else {
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} else {
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stridey = (regs->swreg19.src_rot == 1 || regs->swreg19.src_rot == 3)
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stridey = syn->width - 1;
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? (syn->height - 1) : (syn->width - 1);
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if (regs->swreg14.src_cfmt == 0 )
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if (regs->swreg14.src_cfmt == 0 )
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stridey = (stridey + 1) * 4 - 1;
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stridey = (stridey + 1) * 4 - 1;
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else if (regs->swreg14.src_cfmt == 1 )
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else if (regs->swreg14.src_cfmt == 1 )
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@@ -2531,18 +2531,13 @@ h264e_rkv_update_hw_cfg(H264eHalContext *ctx, HalEncTask *task,
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if (change & MPP_ENC_PREP_CFG_CHANGE_INPUT) {
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if (change & MPP_ENC_PREP_CFG_CHANGE_INPUT) {
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hw_cfg->width = prep->width;
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hw_cfg->width = prep->width;
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hw_cfg->height = prep->height;
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hw_cfg->height = prep->height;
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hw_cfg->input_format = prep->format;
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hw_cfg->hor_stride = prep->hor_stride;
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hw_cfg->hor_stride = prep->hor_stride;
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hw_cfg->ver_stride = prep->ver_stride;
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hw_cfg->ver_stride = prep->ver_stride;
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// for smaller resolution, SEI may have a bad influence on RC
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if (hw_cfg->width * hw_cfg->height < 640 * 480)
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ctx->sei_mode = MPP_ENC_SEI_MODE_DISABLE;
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h264e_rkv_set_format(hw_cfg, prep);
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}
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}
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if (change & MPP_ENC_PREP_CFG_CHANGE_FORMAT) {
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if (change & MPP_ENC_PREP_CFG_CHANGE_FORMAT) {
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hw_cfg->input_format = prep->format;
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h264e_rkv_set_format(hw_cfg, prep);
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switch (prep->color) {
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switch (prep->color) {
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case MPP_FRAME_SPC_RGB : {
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case MPP_FRAME_SPC_RGB : {
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/* BT.601 */
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/* BT.601 */
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@@ -2880,7 +2875,7 @@ MPP_RET hal_h264e_rkv_gen_regs(void *hal, HalTaskInfo *task)
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regs->swreg13.axi_brsp_cke = 0x7f;
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regs->swreg13.axi_brsp_cke = 0x7f;
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regs->swreg13.cime_dspw_orsd = 0x0;
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regs->swreg13.cime_dspw_orsd = 0x0;
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h264e_rkv_set_pp_regs(regs, syn, &ctx->set->prep,
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h264e_rkv_set_pp_regs(regs, syn, &ctx->cfg->prep,
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bufs->hw_pp_buf[buf2_idx], bufs->hw_pp_buf[1 - buf2_idx]);
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bufs->hw_pp_buf[buf2_idx], bufs->hw_pp_buf[1 - buf2_idx]);
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h264e_rkv_set_ioctl_extra_info(&ioctl_reg_info->extra_info, syn, regs);
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h264e_rkv_set_ioctl_extra_info(&ioctl_reg_info->extra_info, syn, regs);
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@@ -817,18 +817,18 @@ MPP_RET h264e_vpu_update_hw_cfg(H264eHalContext *ctx, HalEncTask *task,
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if (change & MPP_ENC_PREP_CFG_CHANGE_INPUT) {
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if (change & MPP_ENC_PREP_CFG_CHANGE_INPUT) {
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hw_cfg->width = prep->width;
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hw_cfg->width = prep->width;
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hw_cfg->height = prep->height;
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hw_cfg->height = prep->height;
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hw_cfg->input_format = prep->format;
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// for libvpu, 8-pixel alignment is enough
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mpp_assert(prep->hor_stride == MPP_ALIGN(prep->width, 8));
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mpp_assert(prep->hor_stride == MPP_ALIGN(prep->width, 8));
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mpp_assert(prep->ver_stride == MPP_ALIGN(prep->height, 8));
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mpp_assert(prep->ver_stride == MPP_ALIGN(prep->height, 8));
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hw_cfg->hor_stride = prep->hor_stride;
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hw_cfg->hor_stride = prep->hor_stride;
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hw_cfg->ver_stride = prep->ver_stride;
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hw_cfg->ver_stride = prep->ver_stride;
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h264e_vpu_set_format(hw_cfg, prep);
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}
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}
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if (change & MPP_ENC_PREP_CFG_CHANGE_FORMAT) {
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if (change & MPP_ENC_PREP_CFG_CHANGE_FORMAT) {
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hw_cfg->input_format = prep->format;
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h264e_vpu_set_format(hw_cfg, prep);
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switch (prep->color) {
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switch (prep->color) {
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case MPP_FRAME_SPC_RGB : {
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case MPP_FRAME_SPC_RGB : {
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/* BT.601 */
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/* BT.601 */
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@@ -521,12 +521,14 @@ MPP_RET test_mpp_setup(MpiEncTestData *p)
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p->qp_init = (p->type == MPP_VIDEO_CodingMJPEG) ? (10) : (26);
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p->qp_init = (p->type == MPP_VIDEO_CodingMJPEG) ? (10) : (26);
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prep_cfg->change = MPP_ENC_PREP_CFG_CHANGE_INPUT |
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prep_cfg->change = MPP_ENC_PREP_CFG_CHANGE_INPUT |
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MPP_ENC_PREP_CFG_CHANGE_ROTATION |
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MPP_ENC_PREP_CFG_CHANGE_FORMAT;
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MPP_ENC_PREP_CFG_CHANGE_FORMAT;
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prep_cfg->width = p->width;
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prep_cfg->width = p->width;
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prep_cfg->height = p->height;
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prep_cfg->height = p->height;
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prep_cfg->hor_stride = p->hor_stride;
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prep_cfg->hor_stride = p->hor_stride;
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prep_cfg->ver_stride = p->ver_stride;
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prep_cfg->ver_stride = p->ver_stride;
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prep_cfg->format = p->fmt;
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prep_cfg->format = p->fmt;
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prep_cfg->rotation = MPP_ENC_ROT_0;
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ret = mpi->control(ctx, MPP_ENC_SET_PREP_CFG, prep_cfg);
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ret = mpi->control(ctx, MPP_ENC_SET_PREP_CFG, prep_cfg);
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if (ret) {
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if (ret) {
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mpp_err("mpi control enc set prep cfg failed ret %d\n", ret);
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mpp_err("mpi control enc set prep cfg failed ret %d\n", ret);
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