From c5a794515d0c5f74d4183bb162b0fdb43a08cd32 Mon Sep 17 00:00:00 2001 From: "vic.hong" Date: Fri, 19 Nov 2021 17:20:39 +0800 Subject: [PATCH] [mpi_buf_slot]: Fix hor_stride_pixel calc issue Align the pixel bit depth to 8bit Signed-off-by: vic.hong Change-Id: I19c4f47d19dfb8eba9cb0b17f20ed4ed839c8a80 --- mpp/base/mpp_buf_slot.cpp | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/mpp/base/mpp_buf_slot.cpp b/mpp/base/mpp_buf_slot.cpp index 9f3815d5..f7d5cc44 100644 --- a/mpp/base/mpp_buf_slot.cpp +++ b/mpp/base/mpp_buf_slot.cpp @@ -262,8 +262,26 @@ static void generate_info_set(MppBufSlotsImpl *impl, MppFrame frame, RK_U32 forc RK_U32 hal_ver_stride = (codec_ver_stride) ? (impl->hal_ver_align(codec_ver_stride)) : (impl->hal_ver_align(height)); + RK_U32 hor_stride_pixel; - RK_U32 hor_stride_pixel = width; + switch (fmt & MPP_FRAME_FMT_MASK) { + case MPP_FMT_YUV420SP_10BIT: { + hor_stride_pixel = hal_hor_stride * 8 / 10; + } break; + case MPP_FMT_YUV422_YVYU: + case MPP_FMT_YUV422_YUYV: + case MPP_FMT_RGB565: + case MPP_FMT_BGR565: { + hor_stride_pixel = hal_hor_stride / 2; + } break; + case MPP_FMT_RGB888: + case MPP_FMT_BGR888: { + hor_stride_pixel = hal_hor_stride / 3; + } break; + default : { + hor_stride_pixel = hal_hor_stride; + } break; + } hal_hor_stride = (force_default_align && codec_hor_stride) ? codec_hor_stride : hal_hor_stride; hal_ver_stride = (force_default_align && codec_ver_stride) ? codec_ver_stride : hal_ver_stride;