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fix[vepu510]: Sync code from enc_tune branch
1. Fix AQ setup error for smart H.264 2. Fix initial value error of qp_min 3. Adjust H.264 regs setup for CVR scene Change-Id: I38b09edb95532a3c1e9a544584c6d258f05fc43b Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
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@@ -35,6 +35,16 @@
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#include "mpp_enc_roi_utils.h"
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#include "mpp_rc_api.h"
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static RK_S32 aq_thd_smart[16] = {
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0, 0, 0, 0, 3, 3, 5, 5,
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8, 8, 8, 15, 15, 20, 25, 28
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};
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static RK_S32 aq_step_smart[16] = {
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-8, -7, -6, -5, -4, -3, -2, -1,
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0, 1, 2, 3, 4, 6, 8, 10
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};
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typedef struct {
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// base flow context
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MppCtx ctx;
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@@ -345,6 +355,14 @@ MPP_RET test_mpp_enc_cfg_setup(MpiEncMultiCtxInfo *info)
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if (!p->bps)
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p->bps = p->width * p->height / 8 * (p->fps_out_num / p->fps_out_den);
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if (cmd->rc_mode == MPP_ENC_RC_MODE_SMTRC) {
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mpp_enc_cfg_set_st(cfg, "hw:aq_thrd_i", aq_thd_smart);
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mpp_enc_cfg_set_st(cfg, "hw:aq_thrd_p", aq_thd_smart);
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mpp_enc_cfg_set_st(cfg, "hw:aq_step_i", aq_step_smart);
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mpp_enc_cfg_set_st(cfg, "hw:aq_step_p", aq_step_smart);
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}
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mpp_enc_cfg_set_s32(cfg, "rc:max_reenc_times", 0);
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mpp_enc_cfg_set_s32(cfg, "rc:cu_qp_delta_depth", p->cu_qp_delta_depth);
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mpp_enc_cfg_set_s32(cfg, "tune:anti_flicker_str", p->anti_flicker_str);
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mpp_enc_cfg_set_s32(cfg, "tune:atr_str_i", p->atr_str_i);
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