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fix[hal_av1d_vdpu383]: add segid reg base config

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Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: Ibb140bc11997156f75c8a9661b9f09e262ae6d5b
This commit is contained in:
Chandler Chen
2024-06-24 15:24:42 +08:00
parent 7f6ea0ad8c
commit b29e4b798d
2 changed files with 13 additions and 9 deletions
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11
mpp/hal/rkdec/av1d/hal_av1d_vdpu383.c
View File

@@ -2013,7 +2013,7 @@ __RETURN:
return ret;
}
static MPP_RET vdpu383_av1d_cdf_setup(Av1dHalCtx *p_hal)
static MPP_RET vdpu383_av1d_cdf_setup(Av1dHalCtx *p_hal, DXVA_PicParams_AV1 *dxva)
{
MPP_RET ret = MPP_ERR_UNKNOW;
Vdpu383Av1dRegCtx *reg_ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;
@@ -2021,6 +2021,11 @@ static MPP_RET vdpu383_av1d_cdf_setup(Av1dHalCtx *p_hal)
/* the worst case is the frame is error with whole frame */
if (reg_ctx->cdf_bufs == NULL) {
size_t size = ALL_CDF_SIZE;
size_t segid_size = (MPP_ALIGN(dxva->width, 128) / 128) * \
(MPP_ALIGN(dxva->height, 128) / 128) * \
32 * 16;
size += segid_size;
if (reg_ctx->cdf_bufs) {
hal_bufs_deinit(reg_ctx->cdf_bufs);
@@ -2106,10 +2111,12 @@ static void vdpu383_av1d_set_cdf(Av1dHalCtx *p_hal, DXVA_PicParams_AV1 *dxva)
cdf_buf = hal_bufs_get_buf(reg_ctx->cdf_bufs, dxva->CurrPic.Index7Bits);
regs->av1d_addrs.reg185_av1_noncoef_wr_base = mpp_buffer_get_fd(cdf_buf->buf[0]);
regs->av1d_addrs.reg179_av1_coef_wr_base = mpp_buffer_get_fd(cdf_buf->buf[0]);
regs->av1d_addrs.reg182_av1_segid_cur_base = mpp_buffer_get_fd(cdf_buf->buf[0]);
/* byte, 434 x 128 bit = 434 x 16 byte */
mpp_dev_set_reg_offset(p_hal->dev, 178, NON_COEF_CDF_SIZE + COEF_CDF_SIZE * coeff_cdf_idx);
mpp_dev_set_reg_offset(p_hal->dev, 179, NON_COEF_CDF_SIZE);
mpp_dev_set_reg_offset(p_hal->dev, 182, ALL_CDF_SIZE);
/* update params sync with "update buffer" */
for (i = 0; i < NUM_REF_FRAMES; i++) {
@@ -2419,7 +2426,7 @@ MPP_RET vdpu383_av1d_gen_regs(void *hal, HalTaskInfo *task)
}
{
vdpu383_av1d_cdf_setup(p_hal);
vdpu383_av1d_cdf_setup(p_hal, dxva);
vdpu383_av1d_set_cdf(p_hal, dxva);
}
mpp_buffer_sync_end(ctx->bufs);

11
mpp/hal/rkdec/av1d/hal_av1d_vdpu383_reg.h
View File

@@ -265,21 +265,18 @@ typedef struct Vdpu383RegAv1dAddr_t {
RK_U32 reg179_av1_coef_wr_base;
/* SWREG180_H26X_REF10_BASE */
// RK_U32 reg180_refer10_base;
RK_U32 reg180_refer10_base;
/* SWREG181_H26X_REF11_BASE */
// RK_U32 reg181_refer11_base;
// RK_U32 reg181_av1segidlast_base;
RK_U32 reg181_av1_segid_last_base;
/* SWREG182_H26X_REF12_BASE */
// RK_U32 reg182_refer12_base;
// RK_U32 reg182_av1segidcur_base;
RK_U32 reg182_av1_segid_cur_base;
/* SWREG183_H26X_REF13_BASE */
// RK_U32 reg183_refer13_base;
// RK_U32 reg183_kf_prob_base;
RK_U32 reserve_reg180_183[4];
RK_U32 reg183_kf_prob_base;
/* SWREG184_H26X_REF14_BASE */
// RK_U32 reg184_refer14_base;