package/mpp
1
0
Fork 0
mirror of https://github.com/nyanmisaka/mpp.git synced 2025-10-10 19:40:03 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity

[mpp_enc]: Add MppDev and HalInfo to mpp_enc

Browse Source 
1. Add MppDev output for all encoder.
2. Update HalInfo to MppDev on each header update.

Change-Id: I8fce811dda7232740042917c9738bc11253ee672
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
This commit is contained in:
Herman Chen
2020-11-06 18:00:05 +08:00
parent 49894453bb
commit b0c1f86b32
15 changed files with 104 additions and 51 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
mpp/codec/enc/h264/h264e_api_v2.c
View File

@@ -44,7 +44,7 @@ RK_U32 h264e_debug = 0;
typedef struct {
/* config from mpp_enc */
MppDeviceId dev_id;
MppClientType type;
MppEncCfgSet *cfg;
MppEncRefs refs;
RK_U32 idr_request;
@@ -84,7 +84,7 @@ typedef struct {
H264eSyntaxDesc syntax[H264E_SYN_BUTT];
} H264eCtx;
static void init_h264e_cfg_set(MppEncCfgSet *cfg, MppDeviceId dev_id)
static void init_h264e_cfg_set(MppEncCfgSet *cfg, MppClientType type)
{
MppEncRcCfg *rc_cfg = &cfg->rc;
MppEncPrepCfg *prep = &cfg->prep;
@@ -108,13 +108,14 @@ static void init_h264e_cfg_set(MppEncCfgSet *cfg, MppDeviceId dev_id)
h264->qp_max_step = 8;
h264->qp_delta_ip = 8;
switch (dev_id) {
case DEV_VEPU : {
switch (type) {
case VPU_CLIENT_VEPU1 :
case VPU_CLIENT_VEPU2 : {
h264->poc_type = 2;
h264->log2_max_poc_lsb = 12;
h264->log2_max_frame_num = 12;
} break;
case DEV_RKVENC : {
case VPU_CLIENT_RKVENC : {
h264->poc_type = 0;
h264->log2_max_poc_lsb = 12;
h264->log2_max_frame_num = 12;
@@ -186,7 +187,7 @@ static MPP_RET h264e_init(void *ctx, EncImplCfg *ctrl_cfg)
h264e_dbg_func("enter\n");
p->dev_id = ctrl_cfg->dev_id;
p->type = ctrl_cfg->type;
p->hdr_size = SZ_1K;
p->hdr_buf = mpp_malloc_size(void, p->hdr_size);
mpp_assert(p->hdr_buf);
@@ -203,7 +204,7 @@ static MPP_RET h264e_init(void *ctx, EncImplCfg *ctrl_cfg)
h264e_dpb_init(&p->dpb, &p->reorder, &p->marking);
h264e_slice_init(&p->slice, &p->reorder, &p->marking);
init_h264e_cfg_set(p->cfg, p->dev_id);
init_h264e_cfg_set(p->cfg, p->type);
mpp_env_get_u32("h264e_debug", &h264e_debug, 0);

2
mpp/codec/inc/enc_impl_api.h
View File

@@ -30,7 +30,7 @@
typedef struct EncImplCfg_t {
// input
MppCodingType coding;
MppDeviceId dev_id;
MppClientType type;
MppEncCfgSet *cfg;
MppEncRefs refs;

45
mpp/codec/mpp_enc_v2.cpp
View File

@@ -34,8 +34,10 @@
#include "mpp_enc_hal.h"
#include "mpp_enc_ref.h"
#include "mpp_enc_refs.h"
#include "mpp_device.h"
#include "rc.h"
#include "hal_info.h"
RK_U32 mpp_enc_debug = 0;
@@ -61,6 +63,10 @@ typedef struct MppEncImpl_t {
EncImpl impl;
MppEncHal enc_hal;
/* device from hal */
MppDev dev;
HalInfo hal_info;
/*
* Rate control plugin parameters
*/
@@ -202,6 +208,22 @@ static void reset_enc_rc_task(EncRcTask *task)
memset(task, 0, sizeof(*task));
}
static void update_hal_info(MppEncImpl *enc)
{
MppDevInfoCfg data[32];
RK_S32 size = sizeof(data);
RK_S32 i;
hal_info_from_enc_cfg(enc->hal_info, &enc->cfg);
hal_info_get(enc->hal_info, data, &size);
if (size) {
size /= sizeof(data[0]);
for (i = 0; i < size; i++)
mpp_dev_ioctl(enc->dev, MPP_DEV_SET_INFO, &data[i]);
}
}
static MPP_RET release_task_in_port(MppPort port)
{
MPP_RET ret = MPP_OK;
@@ -602,6 +624,10 @@ MPP_RET mpp_enc_proc_cfg(MppEncImpl *enc, MpiCmd cmd, void *param)
if (check_resend_hdr(cmd, param, &enc->cfg)) {
enc->frm_cfg.force_flag |= ENC_FORCE_IDR;
enc->hdr_status.val = 0;
/* update hal_info */
if (enc->dev && enc->hal_info)
update_hal_info(enc);
}
if (check_rc_cfg_update(cmd, &enc->cfg))
enc->rc_status.rc_api_user_cfg = 1;
@@ -1387,10 +1413,11 @@ MPP_RET mpp_enc_init_v2(MppEnc *enc, MppEncInitCfg *cfg)
// create hal first
enc_hal_cfg.coding = coding;
enc_hal_cfg.cfg = &p->cfg;
enc_hal_cfg.device_id = DEV_VEPU;
enc_hal_cfg.type = VPU_CLIENT_BUTT;
enc_hal_cfg.dev = NULL;
ctrl_cfg.coding = coding;
ctrl_cfg.dev_id = DEV_VEPU;
ctrl_cfg.type = VPU_CLIENT_BUTT;
ctrl_cfg.cfg = &p->cfg;
ctrl_cfg.refs = p->refs;
ctrl_cfg.task_count = 2;
@@ -1401,7 +1428,7 @@ MPP_RET mpp_enc_init_v2(MppEnc *enc, MppEncInitCfg *cfg)
goto ERR_RET;
}
ctrl_cfg.dev_id = enc_hal_cfg.device_id;
ctrl_cfg.type = enc_hal_cfg.type;
ctrl_cfg.task_count = -1;
ret = enc_impl_init(&impl, &ctrl_cfg);
@@ -1410,9 +1437,16 @@ MPP_RET mpp_enc_init_v2(MppEnc *enc, MppEncInitCfg *cfg)
goto ERR_RET;
}
ret = hal_info_init(&p->hal_info, MPP_CTX_ENC, coding);
if (ret) {
mpp_err_f("could not init hal info\n");
goto ERR_RET;
}
p->coding = coding;
p->impl = impl;
p->enc_hal = enc_hal;
p->dev = enc_hal_cfg.dev;
p->mpp = cfg->mpp;
p->sei_mode = MPP_ENC_SEI_MODE_ONE_SEQ;
p->version_info = get_mpp_version();
@@ -1456,6 +1490,11 @@ MPP_RET mpp_enc_deinit_v2(MppEnc ctx)
return MPP_ERR_NULL_PTR;
}
if (enc->hal_info) {
hal_info_deinit(enc->hal_info);
enc->hal_info = NULL;
}
if (enc->impl) {
enc_impl_deinit(enc->impl);
enc->impl = NULL;

6
mpp/hal/common/h264/hal_h264e_api_v2.c
View File

@@ -45,7 +45,6 @@ static MPP_RET hal_h264e_init(void *hal, MppEncHalCfg *cfg)
HalH264eCtx *ctx = (HalH264eCtx *)hal;
const MppEncHalApi *api = NULL;
void *hw_ctx = NULL;
MppDeviceId dev = DEV_ID_BUTT;
MPP_RET ret = MPP_OK;
RK_U32 vcodec_type = mpp_get_vcodec_type();
@@ -53,13 +52,10 @@ static MPP_RET hal_h264e_init(void *hal, MppEncHalCfg *cfg)
if (vcodec_type & HAVE_RKVENC) {
api = &hal_h264e_vepu541;
dev = DEV_RKVENC;
} else if (vcodec_type & HAVE_VEPU2) {
api = &hal_h264e_vepu2;
dev = DEV_VEPU;
} else if (vcodec_type & HAVE_VEPU1) {
api = &hal_h264e_vepu1;
dev = DEV_VEPU;
} else {
mpp_err("vcodec type %08x can not find H.264 encoder device\n",
vcodec_type);
@@ -67,14 +63,12 @@ static MPP_RET hal_h264e_init(void *hal, MppEncHalCfg *cfg)
}
mpp_assert(api);
mpp_assert(dev != DEV_ID_BUTT);
if (!ret)
hw_ctx = mpp_calloc_size(void, api->ctx_size);
ctx->api = api;
ctx->hw_ctx = hw_ctx;
cfg->device_id = dev;
if (ret)
return ret;

6
mpp/hal/inc/mpp_enc_hal.h
View File

@@ -19,14 +19,16 @@
#include "hal_task.h"
#include "mpp_enc_cfg.h"
#include "mpp_device.h"
typedef struct MppEncHalCfg_t {
// input for encoder
MppCodingType coding;
MppEncCfgSet *cfg;
// output for enc_impl
MppDeviceId device_id;
// output from enc_impl
MppClientType type;
MppDev dev;
} MppEncHalCfg;
typedef struct MppEncHalApi_t {

5
mpp/hal/rkenc/h264e/hal_h264e_vepu541.c
View File

@@ -141,11 +141,14 @@ static MPP_RET hal_h264e_vepu541_init(void *hal, MppEncHalCfg *cfg)
p->cfg = cfg->cfg;
ret = mpp_dev_init(&p->dev, VPU_CLIENT_RKVENC);
/* update output to MppEnc */
cfg->type = VPU_CLIENT_RKVENC;
ret = mpp_dev_init(&cfg->dev, cfg->type);
if (ret) {
mpp_err_f("mpp_dev_init failed. ret: %d\n", ret);
goto DONE;
}
p->dev = cfg->dev;
ret = hal_bufs_init(&p->hw_recn);
if (ret) {

4
mpp/hal/rkenc/h265e/hal_h265e_vepu541.c
View File

@@ -375,11 +375,13 @@ MPP_RET hal_h265e_v541_init(void *hal, MppEncHalCfg *cfg)
ctx->num_frames_to_send = 1;
ctx->enc_mode = RKV_ENC_MODE;
ret = mpp_dev_init(&ctx->dev, VPU_CLIENT_RKVENC);
cfg->type = VPU_CLIENT_RKVENC;
ret = mpp_dev_init(&cfg->dev, cfg->type);
if (ret) {
mpp_err_f("mpp_dev_init failed. ret: %d\n", ret);
return ret;
}
ctx->dev = cfg->dev;
buffers = (h265e_v541_buffers *)ctx->buffers;
for (k = 0; k < H265E_V541_BUF_GRP_BUTT; k++) {

5
mpp/hal/vpu/h264e/hal_h264e_vepu1_v2.c
View File

@@ -109,11 +109,14 @@ static MPP_RET hal_h264e_vepu1_init_v2(void *hal, MppEncHalCfg *cfg)
p->cfg = cfg->cfg;
ret = mpp_dev_init(&p->dev, VPU_CLIENT_VEPU1);
/* update output to MppEnc */
cfg->type = VPU_CLIENT_VEPU1;
ret = mpp_dev_init(&cfg->dev, cfg->type);
if (ret) {
mpp_err_f("mpp_dev_init failed ret: %d\n", ret);
goto DONE;
}
p->dev = cfg->dev;
ret = h264e_vepu_buf_init(&p->hw_bufs);
if (ret) {

6
mpp/hal/vpu/h264e/hal_h264e_vepu2_v2.c
View File

@@ -109,11 +109,15 @@ static MPP_RET hal_h264e_vepu2_init_v2(void *hal, MppEncHalCfg *cfg)
p->cfg = cfg->cfg;
ret = mpp_dev_init(&p->dev, VPU_CLIENT_VEPU2);
/* update output to MppEnc */
cfg->type = VPU_CLIENT_VEPU2;
ret = mpp_dev_init(&cfg->dev, cfg->type);
if (ret) {
mpp_err_f("mpp_dev_init failed ret: %d\n", ret);
goto DONE;
}
p->dev = cfg->dev;
ret = h264e_vepu_buf_init(&p->hw_bufs);
if (ret) {

5
mpp/hal/vpu/jpege/hal_jpege_api_v2.c
View File

@@ -43,7 +43,6 @@ static MPP_RET hal_jpege_init(void *hal, MppEncHalCfg *cfg)
HaljpegeCtx *ctx = (HaljpegeCtx *)hal;
const MppEncHalApi *api = NULL;
void *hw_ctx = NULL;
MppDeviceId dev = DEV_ID_BUTT;
MPP_RET ret = MPP_OK;
RK_U32 vcodec_type = mpp_get_vcodec_type();
@@ -51,10 +50,8 @@ static MPP_RET hal_jpege_init(void *hal, MppEncHalCfg *cfg)
if (vcodec_type & HAVE_VEPU2) {
api = &hal_jpege_vepu2;
dev = DEV_VEPU;
} else if (vcodec_type & HAVE_VEPU1) {
api = &hal_jpege_vepu1;
dev = DEV_VEPU;
} else {
mpp_err("vcodec type %08x can not find H.264 encoder device\n",
vcodec_type);
@@ -62,14 +59,12 @@ static MPP_RET hal_jpege_init(void *hal, MppEncHalCfg *cfg)
}
mpp_assert(api);
mpp_assert(dev != DEV_ID_BUTT);
if (!ret)
hw_ctx = mpp_calloc_size(void, api->ctx_size);
ctx->api = api;
ctx->hw_ctx = hw_ctx;
cfg->device_id = dev;
if (ret)
return ret;

5
mpp/hal/vpu/jpege/hal_jpege_vepu1_v2.c
View File

@@ -55,11 +55,14 @@ static MPP_RET hal_jpege_vepu1_init_v2(void *hal, MppEncHalCfg *cfg)
mpp_env_get_u32("hal_jpege_debug", &hal_jpege_debug, 0);
hal_jpege_dbg_func("enter hal %p cfg %p\n", hal, cfg);
ret = mpp_dev_init(&ctx->dev, VPU_CLIENT_VEPU1);
/* update output to MppEnc */
cfg->type = VPU_CLIENT_VEPU1;
ret = mpp_dev_init(&cfg->dev, cfg->type);
if (ret) {
mpp_err_f("mpp_dev_init failed. ret: %d\n", ret);
return ret;
}
ctx->dev = cfg->dev;
jpege_bits_init(&ctx->bits);
mpp_assert(ctx->bits);

5
mpp/hal/vpu/jpege/hal_jpege_vepu2_v2.c
View File

@@ -55,11 +55,14 @@ MPP_RET hal_jpege_vepu2_init_v2(void *hal, MppEncHalCfg *cfg)
mpp_env_get_u32("hal_jpege_debug", &hal_jpege_debug, 0);
hal_jpege_dbg_func("enter hal %p cfg %p\n", hal, cfg);
ret = mpp_dev_init(&ctx->dev, VPU_CLIENT_VEPU2);
/* update output to MppEnc */
cfg->type = VPU_CLIENT_VEPU2;
ret = mpp_dev_init(&cfg->dev, cfg->type);
if (ret) {
mpp_err_f("mpp_dev_init failed. ret: %d\n", ret);
return ret;
}
ctx->dev = cfg->dev;
jpege_bits_init(&ctx->bits);
mpp_assert(ctx->bits);

10
mpp/hal/vpu/vp8e/hal_vp8e_api_v2.c
View File

@@ -43,7 +43,7 @@ static MPP_RET hal_vp8e_init(void *hal, MppEncHalCfg *cfg)
{
const MppEncHalApi *p_api = NULL;
Halvp8eCtx *ctx = (Halvp8eCtx *)hal;
MppDeviceId dev = DEV_ID_BUTT;
MppClientType type = VPU_CLIENT_BUTT;
void* hw_ctx = NULL;
memset(ctx, 0, sizeof(Halvp8eCtx));
@@ -54,10 +54,10 @@ static MPP_RET hal_vp8e_init(void *hal, MppEncHalCfg *cfg)
RK_U32 hw_flag = mpp_get_vcodec_type();
if (hw_flag & HAVE_VEPU2) {
p_api = &hal_vp8e_vepu2;
dev = DEV_VEPU;
type = VPU_CLIENT_VEPU2;
} else if (hw_flag & HAVE_VEPU1) {
p_api = &hal_vp8e_vepu1;
dev = DEV_VEPU;
type = VPU_CLIENT_VEPU1;
} else {
mpp_err_f("Failed to init due to unsupported hard mode, hw_flag = %d\n", hw_flag);
return MPP_ERR_INIT;
@@ -65,7 +65,7 @@ static MPP_RET hal_vp8e_init(void *hal, MppEncHalCfg *cfg)
}
mpp_assert(p_api);
mpp_assert(dev != DEV_ID_BUTT);
mpp_assert(type != VPU_CLIENT_BUTT);
hw_ctx = mpp_malloc_size(void, p_api->ctx_size);
if (NULL == hw_ctx)
@@ -73,7 +73,7 @@ static MPP_RET hal_vp8e_init(void *hal, MppEncHalCfg *cfg)
ctx->hw_ctx = hw_ctx;
ctx->api = p_api;
cfg->device_id = dev;
cfg->type = type;
return p_api->init(hw_ctx, cfg);
}

18
mpp/hal/vpu/vp8e/hal_vp8e_vepu1_v2.c
View File

@@ -275,7 +275,16 @@ static MPP_RET hal_vp8e_vepu1_init_v2(void *hal, MppEncHalCfg *cfg)
ctx->cfg = cfg->cfg;
//ctx->int_cb = cfg->hal_int_cb;
/* update output to MppEnc */
cfg->type = VPU_CLIENT_VEPU1;
ret = mpp_dev_init(&cfg->dev, cfg->type);
if (ret) {
mpp_err_f("mpp_dev_init failed. ret: %d\n", ret);
return ret;
}
ctx->dev = cfg->dev;
vp8e_hal_dbg(VP8E_DBG_HAL_FUNCTION, "mpp_dev_init success.\n");
ctx->buffers = mpp_calloc(Vp8eVpuBuf, 1);
if (ctx->buffers == NULL) {
@@ -300,13 +309,6 @@ static MPP_RET hal_vp8e_vepu1_init_v2(void *hal, MppEncHalCfg *cfg)
hal_vp8e_init_qp_table(hal);
ret = mpp_dev_init(&ctx->dev, VPU_CLIENT_VEPU1);
if (ret)
mpp_err_f("mpp_dev_init failed. ret: %d\n", ret);
else
vp8e_hal_dbg(VP8E_DBG_HAL_FUNCTION, "mpp_dev_init success.\n");
return ret;
}

18
mpp/hal/vpu/vp8e/hal_vp8e_vepu2_v2.c
View File

@@ -278,8 +278,16 @@ static MPP_RET hal_vp8e_vepu2_init_v2(void *hal, MppEncHalCfg *cfg)
ctx->cfg = cfg->cfg;
memset(ctx, 0, sizeof(HalVp8eCtx));
memset(hw_cfg, 0, sizeof(Vp8eHwCfg));
/* update output to MppEnc */
cfg->type = VPU_CLIENT_VEPU2;
ret = mpp_dev_init(&cfg->dev, cfg->type);
if (ret) {
mpp_err_f("mpp_dev_init failed. ret: %d\n", ret);
return ret;
}
ctx->dev = cfg->dev;
vp8e_hal_dbg(VP8E_DBG_HAL_FUNCTION, "mpp_dev_init success.\n");
ctx->buffers = mpp_calloc(Vp8eVpuBuf, 1);
if (ctx->buffers == NULL) {
@@ -306,12 +314,6 @@ static MPP_RET hal_vp8e_vepu2_init_v2(void *hal, MppEncHalCfg *cfg)
hal_vp8e_init_qp_table(hal);
ret = mpp_dev_init(&ctx->dev, VPU_CLIENT_VEPU2);
if (ret)
mpp_err_f("mpp_dev_init failed. ret: %d\n", ret);
else
vp8e_hal_dbg(VP8E_DBG_HAL_FUNCTION, "mpp_dev_init success.\n");
return ret;
}