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[vp9d_vdpu34x]: Vp9d support hw prob

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Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I6b4eadad2ea4e08eef8816f76bbabe3ec3f7494c
This commit is contained in:
Yandong Lin
2020-12-09 20:44:52 +08:00
committed by Herman Chen
parent de8ace6622
commit ad8d8a669a
9 changed files with 1877 additions and 121 deletions
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203
mpp/codec/dec/vp9/vp9d_parser.c
View File

@@ -454,7 +454,7 @@ static RK_S32 inv_recenter_nonneg(RK_S32 v, RK_S32 m)
} }
// differential forward probability updates // differential forward probability updates
static RK_S32 update_prob(VpxRangeCoder *c, RK_S32 p) static RK_S32 update_prob(VpxRangeCoder *c, RK_S32 p, RK_U8 *delta)
{ {
static const RK_S32 inv_map_table[255] = { static const RK_S32 inv_map_table[255] = {
7, 20, 33, 46, 59, 72, 85, 98, 111, 124, 137, 150, 163, 176, 7, 20, 33, 46, 59, 72, 85, 98, 111, 124, 137, 150, 163, 176,
@@ -507,7 +507,7 @@ static RK_S32 update_prob(VpxRangeCoder *c, RK_S32 p)
d += 64; d += 64;
//av_assert2(d < FF_ARRAY_ELEMS(inv_map_table)); //av_assert2(d < FF_ARRAY_ELEMS(inv_map_table));
} }
*delta = d;
return p <= 128 ? 1 + inv_recenter_nonneg(inv_map_table[d], p - 1) : return p <= 128 ? 1 + inv_recenter_nonneg(inv_map_table[d], p - 1) :
255 - inv_recenter_nonneg(inv_map_table[d], 255 - p); 255 - inv_recenter_nonneg(inv_map_table[d], 255 - p);
} }
@@ -1069,6 +1069,7 @@ static RK_S32 decode_parser_header(Vp9CodecContext *ctx,
// as explicit copies if the fw update is missing (and skip the copy upon // as explicit copies if the fw update is missing (and skip the copy upon
// fw update)? // fw update)?
s->prob.p = s->prob_ctx[c].p; s->prob.p = s->prob_ctx[c].p;
memset(&s->prob_flag_delta, 0, sizeof(s->prob_flag_delta));
// txfm updates // txfm updates
if (s->lossless) { if (s->lossless) {
s->txfmmode = TX_4X4; s->txfmmode = TX_4X4;
@@ -1080,23 +1081,32 @@ static RK_S32 decode_parser_header(Vp9CodecContext *ctx,
if (s->txfmmode == TX_SWITCHABLE) { if (s->txfmmode == TX_SWITCHABLE) {
for (i = 0; i < 2; i++) { for (i = 0; i < 2; i++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.tx8p[i] = update_prob(&s->c, s->prob.p.tx8p[i]); s->prob_flag_delta.p_flag.tx8p[i] = 1;
s->prob.p.tx8p[i] = update_prob(&s->c, s->prob.p.tx8p[i],
&s->prob_flag_delta.p_delta.tx8p[i]);
}
} }
for (i = 0; i < 2; i++) for (i = 0; i < 2; i++)
for (j = 0; j < 2; j++) { for (j = 0; j < 2; j++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob_flag_delta.p_flag.tx16p[i][j] = 1;
s->prob.p.tx16p[i][j] = s->prob.p.tx16p[i][j] =
update_prob(&s->c, s->prob.p.tx16p[i][j]); update_prob(&s->c, s->prob.p.tx16p[i][j],
&s->prob_flag_delta.p_delta.tx16p[i][j]);
}
} }
for (i = 0; i < 2; i++) for (i = 0; i < 2; i++)
for (j = 0; j < 3; j++) { for (j = 0; j < 3; j++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob_flag_delta.p_flag.tx32p[i][j] = 1;
s->prob.p.tx32p[i][j] = s->prob.p.tx32p[i][j] =
update_prob(&s->c, s->prob.p.tx32p[i][j]); update_prob(&s->c, s->prob.p.tx32p[i][j],
&s->prob_flag_delta.p_delta.tx32p[i][j]);
}
} }
} }
} }
@@ -1110,17 +1120,20 @@ static RK_S32 decode_parser_header(Vp9CodecContext *ctx,
for (l = 0; l < 6; l++) for (l = 0; l < 6; l++)
for (m = 0; m < 6; m++) { for (m = 0; m < 6; m++) {
RK_U8 *p = s->prob.coef[i][j][k][l][m]; RK_U8 *p = s->prob.coef[i][j][k][l][m];
RK_U8 *p_flag = s->prob_flag_delta.coef_flag[i][j][k][l][m];
RK_U8 *p_delta = s->prob_flag_delta.coef_delta[i][j][k][l][m];
RK_U8 *r = ref[j][k][l][m]; RK_U8 *r = ref[j][k][l][m];
if (m >= 3 && l == 0) // dc only has 3 pt if (l == 0 && m >= 3) // dc only has 3 pt
break; break;
for (n = 0; n < 3; n++) { for (n = 0; n < 3; n++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) { if (vpx_rac_get_prob_branchy(&s->c, 252)) {
p[n] = update_prob(&s->c, r[n]); p_flag[n] = 1;
p[n] = update_prob(&s->c, r[n], &p_delta[n]);
} else { } else {
p_flag[n] = 0;
p[n] = r[n]; p[n] = r[n];
} }
} }
p[3] = 0;
} }
} else { } else {
for (j = 0; j < 2; j++) for (j = 0; j < 2; j++)
@@ -1129,10 +1142,9 @@ static RK_S32 decode_parser_header(Vp9CodecContext *ctx,
for (m = 0; m < 6; m++) { for (m = 0; m < 6; m++) {
RK_U8 *p = s->prob.coef[i][j][k][l][m]; RK_U8 *p = s->prob.coef[i][j][k][l][m];
RK_U8 *r = ref[j][k][l][m]; RK_U8 *r = ref[j][k][l][m];
if (m > 3 && l == 0) // dc only has 3 pt if (m >= 3 && l == 0) // dc only has 3 pt
break; break;
memcpy(p, r, 3); memcpy(p, r, 3);
p[3] = 0;
} }
} }
if (s->txfmmode == (RK_U32)i) if (s->txfmmode == (RK_U32)i)
@@ -1142,28 +1154,42 @@ static RK_S32 decode_parser_header(Vp9CodecContext *ctx,
// mode updates // mode updates
for (i = 0; i < 3; i++) { for (i = 0; i < 3; i++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.skip[i] = update_prob(&s->c, s->prob.p.skip[i]); s->prob_flag_delta.p_flag.skip[i] = 1;
s->prob.p.skip[i] = update_prob(&s->c, s->prob.p.skip[i],
&s->prob_flag_delta.p_delta.skip[i]);
}
} }
if (!s->keyframe && !s->intraonly) { if (!s->keyframe && !s->intraonly) {
for (i = 0; i < 7; i++) for (i = 0; i < 7; i++)
for (j = 0; j < 3; j++) for (j = 0; j < 3; j++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob_flag_delta.p_flag.mv_mode[i][j] = 1;
s->prob.p.mv_mode[i][j] = s->prob.p.mv_mode[i][j] =
update_prob(&s->c, s->prob.p.mv_mode[i][j]); update_prob(&s->c, s->prob.p.mv_mode[i][j],
&s->prob_flag_delta.p_delta.mv_mode[i][j]);
}
}
if (s->filtermode == FILTER_SWITCHABLE) if (s->filtermode == FILTER_SWITCHABLE)
for (i = 0; i < 4; i++) for (i = 0; i < 4; i++)
for (j = 0; j < 2; j++) for (j = 0; j < 2; j++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob_flag_delta.p_flag.filter[i][j] = 1;
s->prob.p.filter[i][j] = s->prob.p.filter[i][j] =
update_prob(&s->c, s->prob.p.filter[i][j]); update_prob(&s->c, s->prob.p.filter[i][j],
&s->prob_flag_delta.p_delta.filter[i][j]);
}
}
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.intra[i] = update_prob(&s->c, s->prob.p.intra[i]); s->prob_flag_delta.p_flag.intra[i] = 1;
s->prob.p.intra[i] = update_prob(&s->c, s->prob.p.intra[i],
&s->prob_flag_delta.p_delta.intra[i]);
}
} }
@@ -1172,90 +1198,135 @@ static RK_S32 decode_parser_header(Vp9CodecContext *ctx,
if (s->comppredmode) if (s->comppredmode)
s->comppredmode += vpx_rac_get(&s->c); s->comppredmode += vpx_rac_get(&s->c);
if (s->comppredmode == PRED_SWITCHABLE) if (s->comppredmode == PRED_SWITCHABLE)
for (i = 0; i < 5; i++) for (i = 0; i < 5; i++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob_flag_delta.p_flag.comp[i] = 1;
s->prob.p.comp[i] = s->prob.p.comp[i] =
update_prob(&s->c, s->prob.p.comp[i]); update_prob(&s->c, s->prob.p.comp[i],
&s->prob_flag_delta.p_delta.comp[i]);
}
}
} else { } else {
s->comppredmode = PRED_SINGLEREF; s->comppredmode = PRED_SINGLEREF;
} }
if (s->comppredmode != PRED_COMPREF) { if (s->comppredmode != PRED_COMPREF) {
for (i = 0; i < 5; i++) { for (i = 0; i < 5; i++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob_flag_delta.p_flag.single_ref[i][0] = 1;
s->prob.p.single_ref[i][0] = s->prob.p.single_ref[i][0] =
update_prob(&s->c, s->prob.p.single_ref[i][0]); update_prob(&s->c, s->prob.p.single_ref[i][0],
if (vpx_rac_get_prob_branchy(&s->c, 252)) &s->prob_flag_delta.p_delta.single_ref[i][0]);
}
if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob_flag_delta.p_flag.single_ref[i][1] = 1;
s->prob.p.single_ref[i][1] = s->prob.p.single_ref[i][1] =
update_prob(&s->c, s->prob.p.single_ref[i][1]); update_prob(&s->c, s->prob.p.single_ref[i][1],
&s->prob_flag_delta.p_delta.single_ref[i][1]);
}
} }
} }
if (s->comppredmode != PRED_SINGLEREF) { if (s->comppredmode != PRED_SINGLEREF) {
for (i = 0; i < 5; i++) for (i = 0; i < 5; i++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob_flag_delta.p_flag.comp_ref[i] = 1;
s->prob.p.comp_ref[i] = s->prob.p.comp_ref[i] =
update_prob(&s->c, s->prob.p.comp_ref[i]); update_prob(&s->c, s->prob.p.comp_ref[i],
&s->prob_flag_delta.p_delta.comp_ref[i]);
}
}
} }
for (i = 0; i < 4; i++) for (i = 0; i < 4; i++)
for (j = 0; j < 9; j++) for (j = 0; j < 9; j++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob_flag_delta.p_flag.y_mode[i][j] = 1;
s->prob.p.y_mode[i][j] = s->prob.p.y_mode[i][j] =
update_prob(&s->c, s->prob.p.y_mode[i][j]); update_prob(&s->c, s->prob.p.y_mode[i][j],
&s->prob_flag_delta.p_delta.y_mode[i][j]);
}
}
for (i = 0; i < 4; i++) for (i = 0; i < 4; i++)
for (j = 0; j < 4; j++) for (j = 0; j < 4; j++)
for (k = 0; k < 3; k++) for (k = 0; k < 3; k++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob_flag_delta.p_flag.partition[3 - i][j][k] = 1;
s->prob.p.partition[3 - i][j][k] = s->prob.p.partition[3 - i][j][k] =
update_prob(&s->c, s->prob.p.partition[3 - i][j][k]); update_prob(&s->c, s->prob.p.partition[3 - i][j][k],
&s->prob_flag_delta.p_delta.partition[3 - i][j][k]);
}
}
// mv fields don't use the update_prob subexp model for some reason // mv fields don't use the update_prob subexp model for some reason
for (i = 0; i < 3; i++) for (i = 0; i < 3; i++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.mv_joint[i] = (vpx_rac_get_uint(&s->c, 7) << 1) | 1; s->prob_flag_delta.p_flag.mv_joint[i] = 1;
s->prob_flag_delta.p_delta.mv_joint[i] =
s->prob.p.mv_joint[i] = (vpx_rac_get_uint(&s->c, 7) << 1) | 1;
}
}
for (i = 0; i < 2; i++) { for (i = 0; i < 2; i++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.mv_comp[i].sign = (vpx_rac_get_uint(&s->c, 7) << 1) | 1; s->prob_flag_delta.p_flag.mv_comp[i].sign = 1;
s->prob_flag_delta.p_delta.mv_comp[i].sign =
s->prob.p.mv_comp[i].sign = (vpx_rac_get_uint(&s->c, 7) << 1) | 1;
}
for (j = 0; j < 10; j++) for (j = 0; j < 10; j++)
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.mv_comp[i].classes[j] = s->prob_flag_delta.p_flag.mv_comp[i].classes[j] = 1;
(vpx_rac_get_uint(&s->c, 7) << 1) | 1; s->prob_flag_delta.p_delta.mv_comp[i].classes[j] =
s->prob.p.mv_comp[i].classes[j] = (vpx_rac_get_uint(&s->c, 7) << 1) | 1;
}
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.mv_comp[i].class0 = (vpx_rac_get_uint(&s->c, 7) << 1) | 1; s->prob_flag_delta.p_flag.mv_comp[i].class0 = 1;
s->prob_flag_delta.p_delta.mv_comp[i].class0 =
s->prob.p.mv_comp[i].class0 = (vpx_rac_get_uint(&s->c, 7) << 1) | 1;
}
for (j = 0; j < 10; j++) for (j = 0; j < 10; j++)
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.mv_comp[i].bits[j] = s->prob_flag_delta.p_flag.mv_comp[i].bits[j] = 1;
(vpx_rac_get_uint(&s->c, 7) << 1) | 1; s->prob_flag_delta.p_delta.mv_comp[i].bits[j] =
s->prob.p.mv_comp[i].bits[j] = (vpx_rac_get_uint(&s->c, 7) << 1) | 1;
}
} }
for (i = 0; i < 2; i++) { for (i = 0; i < 2; i++) {
for (j = 0; j < 2; j++) for (j = 0; j < 2; j++)
for (k = 0; k < 3; k++) for (k = 0; k < 3; k++)
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.mv_comp[i].class0_fp[j][k] = s->prob_flag_delta.p_flag.mv_comp[i].class0_fp[j][k] = 1;
(vpx_rac_get_uint(&s->c, 7) << 1) | 1; s->prob_flag_delta.p_delta.mv_comp[i].class0_fp[j][k] =
s->prob.p.mv_comp[i].class0_fp[j][k] = (vpx_rac_get_uint(&s->c, 7) << 1) | 1;
}
for (j = 0; j < 3; j++) for (j = 0; j < 3; j++)
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.mv_comp[i].fp[j] = s->prob_flag_delta.p_flag.mv_comp[i].fp[j] = 1;
(vpx_rac_get_uint(&s->c, 7) << 1) | 1; s->prob_flag_delta.p_delta.mv_comp[i].fp[j] =
s->prob.p.mv_comp[i].fp[j] =
(vpx_rac_get_uint(&s->c, 7) << 1) | 1;
}
} }
if (s->highprecisionmvs) { if (s->highprecisionmvs) {
for (i = 0; i < 2; i++) { for (i = 0; i < 2; i++) {
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.mv_comp[i].class0_hp = s->prob_flag_delta.p_flag.mv_comp[i].class0_hp = 1;
(vpx_rac_get_uint(&s->c, 7) << 1) | 1; s->prob_flag_delta.p_delta.mv_comp[i].class0_hp =
s->prob.p.mv_comp[i].class0_hp = (vpx_rac_get_uint(&s->c, 7) << 1) | 1;
}
if (vpx_rac_get_prob_branchy(&s->c, 252)) if (vpx_rac_get_prob_branchy(&s->c, 252)) {
s->prob.p.mv_comp[i].hp = s->prob_flag_delta.p_flag.mv_comp[i].hp = 1;
(vpx_rac_get_uint(&s->c, 7) << 1) | 1; s->prob_flag_delta.p_delta.mv_comp[i].hp =
s->prob.p.mv_comp[i].hp = (vpx_rac_get_uint(&s->c, 7) << 1) | 1;
}
} }
} }
} }

8
mpp/codec/dec/vp9/vp9d_parser.h
View File

@@ -188,10 +188,16 @@ typedef struct VP9Context {
} prob_ctx[4]; } prob_ctx[4];
struct { struct {
prob_context p; prob_context p;
RK_U8 coef[4][2][2][6][6][11]; RK_U8 coef[4][2][2][6][6][3];
RK_U8 seg[7]; RK_U8 seg[7];
RK_U8 segpred[3]; RK_U8 segpred[3];
} prob; } prob;
struct {
prob_context p_flag;
prob_context p_delta;
RK_U8 coef_flag[4][2][2][6][6][3];
RK_U8 coef_delta[4][2][2][6][6][3];
} prob_flag_delta;
struct { struct {
RK_U32 partition[4][4][4]; RK_U32 partition[4][4][4];
RK_U32 skip[3][2]; RK_U32 skip[3][2];

71
mpp/codec/dec/vp9/vp9d_parser2_syntax.c
View File

@@ -3,6 +3,29 @@
#include "vp9d_parser.h" #include "vp9d_parser.h"
#include "vp9d_syntax.h" #include "vp9d_syntax.h"
#define TRANS_TO_HW_STYLE(uv_mode) \
do{ \
RK_U8 *uv_ptr = NULL; \
RK_U8 uv_mode_prob[10][9]; \
for (i = 0; i < 10; i++) { \
if (i == 0) { \
uv_ptr = uv_mode[2]; \
} else if ( i == 1) { \
uv_ptr = uv_mode[0]; \
} else if ( i == 2) { \
uv_ptr = uv_mode[1]; \
} else if ( i == 7) { \
uv_ptr = uv_mode[8]; \
} else if (i == 8) { \
uv_ptr = uv_mode[7]; \
} else { \
uv_ptr = uv_mode[i]; \
} \
memcpy(&uv_mode_prob[i], uv_ptr, 9); \
} \
memcpy(uv_mode, uv_mode_prob, sizeof(uv_mode_prob)); \
}while(0)
static int vp9d_fill_segmentation(VP9Context *s, DXVA_segmentation_VP9 *seg) static int vp9d_fill_segmentation(VP9Context *s, DXVA_segmentation_VP9 *seg)
{ {
int i; int i;
@@ -49,7 +72,10 @@ static int vp9d_fill_picparams(Vp9CodecContext *ctx, DXVA_PicParams_VP9 *pic)
{ {
VP9Context *s = ctx->priv_data; VP9Context *s = ctx->priv_data;
RK_U8 partition_probs[16][3]; RK_U8 partition_probs[16][3];
RK_U8 uv_mode_prob[10][9]; RK_U8 partition_probs_flag[16][3];
RK_U8 partition_probs_delata[16][3];
DXVA_prob_vp9* prob_flag = &pic->prob_flag_delta.p_flag;
DXVA_prob_vp9* prob_delta = &pic->prob_flag_delta.p_delta;
int i; int i;
pic->profile = ctx->profile; pic->profile = ctx->profile;
@@ -105,10 +131,9 @@ static int vp9d_fill_picparams(Vp9CodecContext *ctx, DXVA_PicParams_VP9 *pic)
pic->log2_tile_rows = s->tiling.log2_tile_rows; pic->log2_tile_rows = s->tiling.log2_tile_rows;
pic->first_partition_size = s->first_partition_size; pic->first_partition_size = s->first_partition_size;
memcpy(pic->mvscale, s->mvscale, sizeof(s->mvscale)); memcpy(pic->mvscale, s->mvscale, sizeof(s->mvscale));
memcpy(&ctx->pic_params.prob, &s->prob, sizeof(ctx->pic_params.prob)); memcpy(&pic->prob, &s->prob, sizeof(pic->prob));
memcpy(&pic->prob_flag_delta, &s->prob_flag_delta, sizeof(pic->prob_flag_delta));
{ {
RK_U8 *uv_ptr = NULL;
RK_U32 m = 0;
/*change partition to hardware need style*/ /*change partition to hardware need style*/
/* /*
hardware syntax hardware syntax
@@ -117,11 +142,20 @@ static int vp9d_fill_picparams(Vp9CodecContext *ctx, DXVA_PicParams_VP9 *pic)
*+++++32x32+++* *++++16x16++++* *+++++32x32+++* *++++16x16++++*
*+++++64x64+++* *++++8x8++++++* *+++++64x64+++* *++++8x8++++++*
*/ */
m = 0; RK_U32 m = 0;
for (i = 3; i >= 0; i--) { RK_U32 len = sizeof(pic->prob.partition[0]);
memcpy(&partition_probs[m][0], &ctx->pic_params.prob.partition[i][0][0], 12); RK_U32 step = len / sizeof(partition_probs[0]);
m += 4;
for (i = MPP_ARRAY_ELEMS(pic->prob.partition) - 1; i >= 0; i--) {
memcpy(&partition_probs[m][0], &pic->prob.partition[i][0][0], len);
memcpy(&partition_probs_flag[m][0], &prob_flag->partition[i][0][0], len);
memcpy(&partition_probs_delata[m][0], &prob_delta->partition[i][0][0], len);
m += step;
} }
memcpy(pic->prob.partition, partition_probs, sizeof(partition_probs));
memcpy(prob_flag->partition, partition_probs_flag, sizeof(partition_probs_flag));
memcpy(prob_delta->partition, partition_probs_delata, sizeof(partition_probs_delata));
/*change uv_mode to hardware need style*/ /*change uv_mode to hardware need style*/
/* /*
hardware syntax hardware syntax
@@ -137,24 +171,9 @@ static int vp9d_fill_picparams(Vp9CodecContext *ctx, DXVA_PicParams_VP9 *pic)
*+++++ tm ++++* *++++ tm ++++* *+++++ tm ++++* *++++ tm ++++*
*/ */
for (i = 0; i < 10; i++) { TRANS_TO_HW_STYLE(pic->prob.uv_mode);
if (i == 0) { TRANS_TO_HW_STYLE(prob_flag->uv_mode);
uv_ptr = ctx->pic_params.prob.uv_mode[2];//dc TRANS_TO_HW_STYLE(prob_delta->uv_mode);
} else if ( i == 1) {
uv_ptr = ctx->pic_params.prob.uv_mode[0]; //h
} else if ( i == 2) {
uv_ptr = ctx->pic_params.prob.uv_mode[1]; //h
} else if ( i == 7) {
uv_ptr = ctx->pic_params.prob.uv_mode[8]; //d207
} else if (i == 8) {
uv_ptr = ctx->pic_params.prob.uv_mode[7]; //d63
} else {
uv_ptr = ctx->pic_params.prob.uv_mode[i];
}
memcpy(&uv_mode_prob[i], uv_ptr, 9);
}
memcpy(ctx->pic_params.prob.partition, partition_probs, sizeof(partition_probs));
memcpy(ctx->pic_params.prob.uv_mode, uv_mode_prob, sizeof(uv_mode_prob));
} }
return 0; return 0;
} }

35
mpp/common/vp9d_syntax.h
View File

@@ -60,6 +60,33 @@ typedef struct _segmentation_VP9 {
UCHAR feature_mask[8]; UCHAR feature_mask[8];
} DXVA_segmentation_VP9; } DXVA_segmentation_VP9;
typedef struct {
RK_U8 y_mode[4][9];
RK_U8 uv_mode[10][9];
RK_U8 filter[4][2];
RK_U8 mv_mode[7][3];
RK_U8 intra[4];
RK_U8 comp[5];
RK_U8 single_ref[5][2];
RK_U8 comp_ref[5];
RK_U8 tx32p[2][3];
RK_U8 tx16p[2][2];
RK_U8 tx8p[2];
RK_U8 skip[3];
RK_U8 mv_joint[3];
struct {
RK_U8 sign;
RK_U8 classes[10];
RK_U8 class0;
RK_U8 bits[10];
RK_U8 class0_fp[2][3];
RK_U8 fp[3];
RK_U8 class0_hp;
RK_U8 hp;
} mv_comp[2];
RK_U8 partition[4][4][3];
} DXVA_prob_vp9;
typedef struct _DXVA_PicParams_VP9 { typedef struct _DXVA_PicParams_VP9 {
DXVA_PicEntry_VPx CurrPic; DXVA_PicEntry_VPx CurrPic;
UCHAR profile; UCHAR profile;
@@ -142,7 +169,7 @@ typedef struct _DXVA_PicParams_VP9 {
UCHAR hp; UCHAR hp;
} mv_comp[2]; } mv_comp[2];
UCHAR partition[4][4][3]; UCHAR partition[4][4][3];
UCHAR coef[4][2][2][6][6][11]; UCHAR coef[4][2][2][6][6][3];
} prob; } prob;
struct { struct {
UINT partition[4][4][4]; UINT partition[4][4][4];
@@ -170,6 +197,12 @@ typedef struct _DXVA_PicParams_VP9 {
UINT coef[4][2][2][6][6][3]; UINT coef[4][2][2][6][6][3];
UINT eob[4][2][2][6][6][2]; UINT eob[4][2][2][6][6][2];
} counts; } counts;
struct {
DXVA_prob_vp9 p_flag;
DXVA_prob_vp9 p_delta;
RK_U8 coef_flag[4][2][2][6][6][3];
RK_U8 coef_delta[4][2][2][6][6][3];
} prob_flag_delta;
USHORT mvscale[3][2]; USHORT mvscale[3][2];
CHAR txmode; CHAR txmode;
CHAR refmode; CHAR refmode;

3
mpp/hal/rkdec/inc/vdpu34x_vp9d.h
View File

@@ -228,7 +228,7 @@ typedef struct Vdpu34xRegVp9dAddr_t {
RK_U32 reg161_pps_base; RK_U32 reg161_pps_base;
RK_U32 reg162_last_porb_base; RK_U32 reg162_last_prob_base;
RK_U32 reg163_rps_base; RK_U32 reg163_rps_base;
@@ -250,7 +250,6 @@ typedef struct Vdpu34xRegVp9dAddr_t {
RK_U32 reg172_update_prob_wr_base; RK_U32 reg172_update_prob_wr_base;
RK_U32 reg173_179_no_use[7]; RK_U32 reg173_179_no_use[7];
RK_U32 reg180_scanlist_base; RK_U32 reg180_scanlist_base;

1493
mpp/hal/rkdec/vp9d/hal_vp9d_com.c
View File

File diff suppressed because it is too large Load Diff

6
mpp/hal/rkdec/vp9d/hal_vp9d_com.h
View File

@@ -52,7 +52,7 @@ typedef RK_U8 vp9_prob;
#define MV_OFFSET_BITS (MV_CLASSES + CLASS0_BITS - 2) #define MV_OFFSET_BITS (MV_CLASSES + CLASS0_BITS - 2)
#define MV_FP_SIZE 4 #define MV_FP_SIZE 4
#define PROBE_SIZE 4864 #define PROB_SIZE 4864
#define COUNT_SIZE 13208 #define COUNT_SIZE 13208
/* /*
* nCtuX*nCtuY*8*8/2 * nCtuX*nCtuY*8*8/2
@@ -61,6 +61,8 @@ typedef RK_U8 vp9_prob;
*/ */
#define MAX_SEGMAP_SIZE 73728 #define MAX_SEGMAP_SIZE 73728
#define VP9_DUMP 0
//!< memory malloc check //!< memory malloc check
#define MEM_CHECK(ret, val, ...)\ #define MEM_CHECK(ret, val, ...)\
do{\ do{\
@@ -83,7 +85,9 @@ RK_U32 vp9_ver_align(RK_U32 val);
RK_U32 vp9_hor_align(RK_U32 val); RK_U32 vp9_hor_align(RK_U32 val);
MPP_RET hal_vp9d_output_probe(void *buf, void *dxva); MPP_RET hal_vp9d_output_probe(void *buf, void *dxva);
MPP_RET hal_vp9d_prob_flag_delta(void *buf, void *dxva);
void hal_vp9d_update_counts(void *buf, void *dxva); void hal_vp9d_update_counts(void *buf, void *dxva);
MPP_RET hal_vp9d_prob_default(void *buf, void *dxva);
#ifdef __cplusplus #ifdef __cplusplus
} }

4
mpp/hal/rkdec/vp9d/hal_vp9d_rkv.c
View File

@@ -61,7 +61,7 @@ static MPP_RET hal_vp9d_alloc_res(HalVp9dCtx *hal)
for (i = 0; i < MAX_GEN_REG; i++) { for (i = 0; i < MAX_GEN_REG; i++) {
hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(VP9_REGS)); hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(VP9_REGS));
ret = mpp_buffer_get(p_hal->group, ret = mpp_buffer_get(p_hal->group,
&hw_ctx->g_buf[i].probe_base, PROBE_SIZE); &hw_ctx->g_buf[i].probe_base, PROB_SIZE);
if (ret) { if (ret) {
mpp_err("vp9 probe_base get buffer failed\n"); mpp_err("vp9 probe_base get buffer failed\n");
return ret; return ret;
@@ -87,7 +87,7 @@ static MPP_RET hal_vp9d_alloc_res(HalVp9dCtx *hal)
} }
} else { } else {
hw_ctx->hw_regs = mpp_calloc_size(void, sizeof(VP9_REGS)); hw_ctx->hw_regs = mpp_calloc_size(void, sizeof(VP9_REGS));
ret = mpp_buffer_get(p_hal->group, &hw_ctx->probe_base, PROBE_SIZE); ret = mpp_buffer_get(p_hal->group, &hw_ctx->probe_base, PROB_SIZE);
if (ret) { if (ret) {
mpp_err("vp9 probe_base get buffer failed\n"); mpp_err("vp9 probe_base get buffer failed\n");
return ret; return ret;

175
mpp/hal/rkdec/vp9d/hal_vp9d_vdpu34x.c
View File

@@ -34,12 +34,15 @@
#include "vdpu34x_vp9d.h" #include "vdpu34x_vp9d.h"
#include "vp9d_syntax.h" #include "vp9d_syntax.h"
#define HW_PROB 1
typedef struct Vdpu34xVp9dCtx_t { typedef struct Vdpu34xVp9dCtx_t {
Vp9dRegBuf g_buf[MAX_GEN_REG]; Vp9dRegBuf g_buf[MAX_GEN_REG];
MppBuffer probe_base; MppBuffer probe_base;
MppBuffer count_base; MppBuffer count_base;
MppBuffer segid_cur_base; MppBuffer segid_cur_base;
MppBuffer segid_last_base; MppBuffer segid_last_base;
MppBuffer prob_default_base;
void* hw_regs; void* hw_regs;
RK_S32 mv_base_addr; RK_S32 mv_base_addr;
RK_S32 pre_mv_base_addr; RK_S32 pre_mv_base_addr;
@@ -61,6 +64,8 @@ typedef struct Vdpu34xVp9dCtx_t {
HalBufs cmv_bufs; HalBufs cmv_bufs;
RK_S32 mv_size; RK_S32 mv_size;
RK_S32 mv_count; RK_S32 mv_count;
RK_U32 prob_ctx_valid[4];
MppBuffer prob_loop_base[4];
} Vdpu34xVp9dCtx; } Vdpu34xVp9dCtx;
static MPP_RET hal_vp9d_alloc_res(HalVp9dCtx *hal) static MPP_RET hal_vp9d_alloc_res(HalVp9dCtx *hal)
@@ -74,7 +79,7 @@ static MPP_RET hal_vp9d_alloc_res(HalVp9dCtx *hal)
for (i = 0; i < MAX_GEN_REG; i++) { for (i = 0; i < MAX_GEN_REG; i++) {
hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu34xVp9dRegSet)); hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu34xVp9dRegSet));
ret = mpp_buffer_get(p_hal->group, ret = mpp_buffer_get(p_hal->group,
&hw_ctx->g_buf[i].probe_base, PROBE_SIZE); &hw_ctx->g_buf[i].probe_base, PROB_SIZE);
if (ret) { if (ret) {
mpp_err("vp9 probe_base get buffer failed\n"); mpp_err("vp9 probe_base get buffer failed\n");
return ret; return ret;
@@ -100,11 +105,24 @@ static MPP_RET hal_vp9d_alloc_res(HalVp9dCtx *hal)
} }
} else { } else {
hw_ctx->hw_regs = mpp_calloc_size(void, sizeof(Vdpu34xVp9dRegSet)); hw_ctx->hw_regs = mpp_calloc_size(void, sizeof(Vdpu34xVp9dRegSet));
ret = mpp_buffer_get(p_hal->group, &hw_ctx->probe_base, PROBE_SIZE); ret = mpp_buffer_get(p_hal->group, &hw_ctx->probe_base, PROB_SIZE);
if (ret) { if (ret) {
mpp_err("vp9 probe_base get buffer failed\n"); mpp_err("vp9 probe_base get buffer failed\n");
return ret; return ret;
} }
ret = mpp_buffer_get(p_hal->group, &hw_ctx->prob_default_base, PROB_SIZE);
if (ret) {
mpp_err("vp9 probe_default_base get buffer failed\n");
return ret;
}
for (i = 0; i < 4; i++) {
ret = mpp_buffer_get(p_hal->group, &hw_ctx->prob_loop_base[i], PROB_SIZE);
if (ret) {
mpp_err("vp9 probe_loop_base get buffer failed\n");
return ret;
}
}
ret = mpp_buffer_get(p_hal->group, &hw_ctx->count_base, COUNT_SIZE); ret = mpp_buffer_get(p_hal->group, &hw_ctx->count_base, COUNT_SIZE);
if (ret) { if (ret) {
mpp_err("vp9 count_base get buffer failed\n"); mpp_err("vp9 count_base get buffer failed\n");
@@ -174,6 +192,22 @@ static MPP_RET hal_vp9d_release_res(HalVp9dCtx *hal)
return ret; return ret;
} }
} }
if (hw_ctx->prob_default_base) {
ret = mpp_buffer_put(hw_ctx->prob_default_base);
if (ret) {
mpp_err("vp9 probe_wr_base get buffer failed\n");
return ret;
}
}
for (i = 0; i < 4; i++) {
if (hw_ctx->prob_loop_base[i]) {
ret = mpp_buffer_put(hw_ctx->prob_loop_base[i]);
if (ret) {
mpp_err("vp9 probe_base put buffer failed\n");
return ret;
}
}
}
if (hw_ctx->count_base) { if (hw_ctx->count_base) {
ret = mpp_buffer_put(hw_ctx->count_base); ret = mpp_buffer_put(hw_ctx->count_base);
if (ret) { if (ret) {
@@ -309,8 +343,9 @@ static MPP_RET hal_vp9d_vdpu34x_gen_regs(void *hal, HalTaskInfo *task)
Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx;
DXVA_PicParams_VP9 *pic_param = (DXVA_PicParams_VP9*)task->dec.syntax.data; DXVA_PicParams_VP9 *pic_param = (DXVA_PicParams_VP9*)task->dec.syntax.data;
RK_S32 mv_size = pic_param->width * pic_param->height / 2; RK_S32 mv_size = pic_param->width * pic_param->height / 2;
RK_U32 frame_ctx_id = pic_param->frame_context_idx;
if (p_hal ->fast_mode) { if (p_hal->fast_mode) {
for (i = 0; i < MAX_GEN_REG; i++) { for (i = 0; i < MAX_GEN_REG; i++) {
if (!hw_ctx->g_buf[i].use_flag) { if (!hw_ctx->g_buf[i].use_flag) {
task->dec.reg_index = i; task->dec.reg_index = i;
@@ -349,10 +384,80 @@ static MPP_RET hal_vp9d_vdpu34x_gen_regs(void *hal, HalTaskInfo *task)
Vdpu34xVp9dRegSet *vp9_hw_regs = (Vdpu34xVp9dRegSet*)hw_ctx->hw_regs; Vdpu34xVp9dRegSet *vp9_hw_regs = (Vdpu34xVp9dRegSet*)hw_ctx->hw_regs;
intraFlag = (!pic_param->frame_type || pic_param->intra_only); intraFlag = (!pic_param->frame_type || pic_param->intra_only);
hal_vp9d_output_probe(mpp_buffer_get_ptr(hw_ctx->probe_base), task->dec.syntax.data);
stream_len = (RK_S32)mpp_packet_get_length(task->dec.input_packet); stream_len = (RK_S32)mpp_packet_get_length(task->dec.input_packet);
memset(hw_ctx->hw_regs, 0, sizeof(Vdpu34xVp9dRegSet)); memset(hw_ctx->hw_regs, 0, sizeof(Vdpu34xVp9dRegSet));
vp9_hw_regs->common.reg013.cur_pic_is_idr = intraFlag; #if HW_PROB
hal_vp9d_prob_flag_delta(mpp_buffer_get_ptr(hw_ctx->probe_base), task->dec.syntax.data);
if (intraFlag)
hal_vp9d_prob_default(mpp_buffer_get_ptr(hw_ctx->prob_default_base), task->dec.syntax.data);
/* config reg103 */
vp9_hw_regs->vp9d_param.reg103.prob_update_en = 1;
vp9_hw_regs->vp9d_param.reg103.intra_only_flag = intraFlag;
if (!intraFlag) {
vp9_hw_regs->vp9d_param.reg103.txfmmode_rfsh_en = (pic_param->txmode == 4) ? 1 : 0;
vp9_hw_regs->vp9d_param.reg103.interp_filter_switch_en = pic_param->interp_filter == 4 ? 1 : 0;
}
vp9_hw_regs->vp9d_param.reg103.ref_mode_rfsh_en = 1;
vp9_hw_regs->vp9d_param.reg103.single_ref_rfsh_en = 1;
vp9_hw_regs->vp9d_param.reg103.comp_ref_rfsh_en = 1;
vp9_hw_regs->vp9d_param.reg103.inter_coef_rfsh_flag = 0;
vp9_hw_regs->vp9d_param.reg103.refresh_en =
!pic_param->error_resilient_mode && !pic_param->parallelmode;
vp9_hw_regs->vp9d_param.reg103.prob_save_en = pic_param->refresh_frame_context;
vp9_hw_regs->vp9d_param.reg103.allow_high_precision_mv = pic_param->allow_high_precision_mv;
vp9_hw_regs->vp9d_param.reg103.last_key_frame_flag = hw_ctx->ls_info.last_intra_only;
/* config last prob base and update write base */
{
if (intraFlag || pic_param->error_resilient_mode) {
if (intraFlag
|| pic_param->error_resilient_mode
|| (pic_param->reset_frame_context == 3)) {
memset(hw_ctx->prob_ctx_valid, 0, sizeof(hw_ctx->prob_ctx_valid));
} else if (pic_param->reset_frame_context == 2) {
hw_ctx->prob_ctx_valid[frame_ctx_id] = 0;
}
}
#if VP9_DUMP
{
static RK_U32 file_cnt = 0;
char file_name[128];
RK_U32 i = 0;
sprintf(file_name, "/data/vp9/prob_last_%d.txt", file_cnt);
FILE *fp = fopen(file_name, "wb");
RK_U32 *tmp = NULL;
if (hw_ctx->prob_ctx_valid[frame_ctx_id]) {
tmp = (RK_U32 *)mpp_buffer_get_ptr(hw_ctx->prob_loop_base[pic_param->frame_context_idx]);
} else {
tmp = (RK_U32 *)mpp_buffer_get_ptr(hw_ctx->prob_default_base);
}
for (i = 0; i < PROB_SIZE / 4; i += 2) {
fprintf(fp, "%08x%08x\n", tmp[i + 1], tmp[i]);
}
file_cnt++;
fflush(fp);
fclose(fp);
}
#endif
if (hw_ctx->prob_ctx_valid[frame_ctx_id]) {
vp9_hw_regs->vp9d_addr.reg162_last_prob_base =
mpp_buffer_get_fd(hw_ctx->prob_loop_base[frame_ctx_id]);
} else {
vp9_hw_regs->vp9d_addr.reg162_last_prob_base = mpp_buffer_get_fd(hw_ctx->prob_default_base);
hw_ctx->prob_ctx_valid[frame_ctx_id] |= pic_param->refresh_frame_context;
}
vp9_hw_regs->vp9d_addr.reg172_update_prob_wr_base =
mpp_buffer_get_fd(hw_ctx->prob_loop_base[frame_ctx_id]);
}
vp9_hw_regs->vp9d_addr.reg160_delta_prob_base = mpp_buffer_get_fd(hw_ctx->probe_base);
#else
hal_vp9d_output_probe(mpp_buffer_get_ptr(hw_ctx->probe_base), task->dec.syntax.data);
#endif
vp9_hw_regs->common.reg013.cur_pic_is_idr = !pic_param->frame_type;
vp9_hw_regs->common.reg009.dec_mode = 2; //set as vp9 dec vp9_hw_regs->common.reg009.dec_mode = 2; //set as vp9 dec
vp9_hw_regs->common.reg016_str_len = ((stream_len + 15) & (~15)) + 0x80; vp9_hw_regs->common.reg016_str_len = ((stream_len + 15) & (~15)) + 0x80;
@@ -488,13 +593,13 @@ static MPP_RET hal_vp9d_vdpu34x_gen_regs(void *hal, HalTaskInfo *task)
} }
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_qp_delta_en = (hw_ctx->ls_info.feature_mask[i]) & 0x1; vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_qp_delta_en = (hw_ctx->ls_info.feature_mask[i]) & 0x1;
vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_qp_delta = hw_ctx->ls_info.feature_data[i][0]; vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_qp_delta = hw_ctx->ls_info.feature_data[i][0];
vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_loopfitler_value_en = (hw_ctx->ls_info.feature_mask[i] >> 1) & 0x1; vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_loopfitler_value_en = (hw_ctx->ls_info.feature_mask[i] >> 1) & 0x1;
vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_loopfilter_value = hw_ctx->ls_info.feature_data[i][1]; vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_loopfilter_value = hw_ctx->ls_info.feature_data[i][1];
vp9_hw_regs->vp9d_param.reg67_74[i].segid_referinfo_en = (hw_ctx->ls_info.feature_mask[i] >> 2) & 0x1; vp9_hw_regs->vp9d_param.reg67_74[i].segid_referinfo_en = (hw_ctx->ls_info.feature_mask[i] >> 2) & 0x1;
vp9_hw_regs->vp9d_param.reg67_74[i].segid_referinfo = hw_ctx->ls_info.feature_data[i][2]; vp9_hw_regs->vp9d_param.reg67_74[i].segid_referinfo = hw_ctx->ls_info.feature_data[i][2];
vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_skip_en = (hw_ctx->ls_info.feature_mask[i] >> 3) & 0x1; vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_skip_en = (hw_ctx->ls_info.feature_mask[i] >> 3) & 0x1;
} }
vp9_hw_regs->vp9d_param.reg67_74[0].segid_abs_delta = hw_ctx->ls_info.abs_delta_last; vp9_hw_regs->vp9d_param.reg67_74[0].segid_abs_delta = hw_ctx->ls_info.abs_delta_last;
@@ -507,18 +612,17 @@ static MPP_RET hal_vp9d_vdpu34x_gen_regs(void *hal, HalTaskInfo *task)
vp9_hw_regs->vp9d_param.reg94.ref_deltas_lastframe |= (hw_ctx->ls_info.last_ref_deltas[i] & 0x7f) << (7 * i); vp9_hw_regs->vp9d_param.reg94.ref_deltas_lastframe |= (hw_ctx->ls_info.last_ref_deltas[i] & 0x7f) << (7 * i);
for (i = 0; i < 2; i++) for (i = 0; i < 2; i++)
vp9_hw_regs->vp9d_param.reg75.mode_deltas_lastframe |= (hw_ctx->ls_info.last_mode_deltas[i] & 0x7f) << (7 * i); vp9_hw_regs->vp9d_param.reg75.mode_deltas_lastframe |= (hw_ctx->ls_info.last_mode_deltas[i] & 0x7f) << (7 * i);
} else { } else {
hw_ctx->ls_info.segmentation_enable_flag_last = 0; hw_ctx->ls_info.segmentation_enable_flag_last = 0;
hw_ctx->ls_info.last_intra_only = 1; hw_ctx->ls_info.last_intra_only = 1;
} }
vp9_hw_regs->vp9d_param.reg75.mode_deltas_lastframe = 0;
vp9_hw_regs->vp9d_param.reg75.segmentation_enable_lstframe = hw_ctx->ls_info.segmentation_enable_flag_last; vp9_hw_regs->vp9d_param.reg75.segmentation_enable_lstframe = hw_ctx->ls_info.segmentation_enable_flag_last;
vp9_hw_regs->vp9d_param.reg75.last_show_frame = hw_ctx->ls_info.last_show_frame; vp9_hw_regs->vp9d_param.reg75.last_show_frame = hw_ctx->ls_info.last_show_frame;
vp9_hw_regs->vp9d_param.reg75.last_intra_only = hw_ctx->ls_info.last_intra_only; vp9_hw_regs->vp9d_param.reg75.last_intra_only = hw_ctx->ls_info.last_intra_only;
vp9_hw_regs->vp9d_param.reg75.last_widthheight_eqcur = (pic_param->width == hw_ctx->ls_info.last_width) && (pic_param->height == hw_ctx->ls_info.last_height); vp9_hw_regs->vp9d_param.reg75.last_widthheight_eqcur = (pic_param->width == hw_ctx->ls_info.last_width) && (pic_param->height == hw_ctx->ls_info.last_height);
vp9_hw_regs->vp9d_param.reg78.lasttile_size = stream_len - pic_param->first_partition_size; vp9_hw_regs->vp9d_param.reg78.lasttile_size = stream_len - pic_param->first_partition_size;
if (!intraFlag) { if (!intraFlag) {
@@ -530,7 +634,7 @@ static MPP_RET hal_vp9d_vdpu34x_gen_regs(void *hal, HalTaskInfo *task)
vp9_hw_regs->vp9d_param.reg93.aref_ver_scale = pic_param->mvscale[2][1]; vp9_hw_regs->vp9d_param.reg93.aref_ver_scale = pic_param->mvscale[2][1];
} }
vp9_hw_regs->common.reg010.dec_e = 1; vp9_hw_regs->common.reg010.dec_e = 1;
vp9_hw_regs->common.reg011.dec_timeout_e = 1; vp9_hw_regs->common.reg011.dec_timeout_e = 1;
vp9_hw_regs->common.reg011.buf_empty_en = 1; vp9_hw_regs->common.reg011.buf_empty_en = 1;
@@ -608,13 +712,39 @@ static MPP_RET hal_vp9d_vdpu34x_start(void *hal, HalTaskInfo *task)
mpp_assert(hw_regs); mpp_assert(hw_regs);
if (hal_vp9d_debug & HAL_VP9D_DBG_REG) {
RK_U32 *p = (RK_U32 *)hw_ctx->hw_regs;
RK_U32 i = 0;
for (i = 0; i < sizeof(Vdpu34xVp9dRegSet) / 4; i++) #if VP9_DUMP
mpp_log("set regs[%02d]: %08X\n", i, *p++); {
static RK_U32 file_cnt = 0;
char file_name[128];
sprintf(file_name, "/data/vp9_regs/reg_%d.txt", file_cnt);
FILE *fp = fopen(file_name, "wb");
RK_U32 i = 0;
RK_U32 *tmp = NULL;
tmp = (RK_U32 *)&hw_regs->common;
for (i = 0; i < sizeof(hw_regs->common) / 4; i++) {
fprintf(fp, "reg[%d] 0x%08x\n", i + 8, tmp[i]);
}
fprintf(fp, "\n");
tmp = (RK_U32 *)&hw_regs->vp9d_param;
for (i = 0; i < sizeof(hw_regs->vp9d_param) / 4; i++) {
fprintf(fp, "reg[%d] 0x%08x\n", i + 64, tmp[i]);
}
fprintf(fp, "\n");
tmp = (RK_U32 *)&hw_regs->common_addr;
for (i = 0; i < sizeof(hw_regs->common_addr) / 4; i++) {
fprintf(fp, "reg[%d] 0x%08x\n", i + 128, tmp[i]);
}
fprintf(fp, "\n");
tmp = (RK_U32 *)&hw_regs->vp9d_addr;
for (i = 0; i < sizeof(hw_regs->vp9d_addr) / 4; i++) {
fprintf(fp, "reg[%d] 0x%08x\n", i + 160, tmp[i]);
}
file_cnt++;
fflush(fp);
fclose(fp);
} }
#endif
do { do {
MppDevRegWrCfg wr_cfg; MppDevRegWrCfg wr_cfg;
@@ -712,12 +842,13 @@ static MPP_RET hal_vp9d_vdpu34x_wait(void *hal, HalTaskInfo *task)
mpp_buf_slot_get_prop(p_hal->slots, task->dec.output, SLOT_FRAME_PTR, &mframe); mpp_buf_slot_get_prop(p_hal->slots, task->dec.output, SLOT_FRAME_PTR, &mframe);
mpp_frame_set_errinfo(mframe, 1); mpp_frame_set_errinfo(mframe, 1);
} }
#if !HW_PROB
if (p_hal->dec_cb && task->dec.flags.wait_done) { if (p_hal->dec_cb && task->dec.flags.wait_done) {
DXVA_PicParams_VP9 *pic_param = (DXVA_PicParams_VP9*)task->dec.syntax.data; DXVA_PicParams_VP9 *pic_param = (DXVA_PicParams_VP9*)task->dec.syntax.data;
hal_vp9d_update_counts(mpp_buffer_get_ptr(hw_ctx->count_base), task->dec.syntax.data); hal_vp9d_update_counts(mpp_buffer_get_ptr(hw_ctx->count_base), task->dec.syntax.data);
mpp_callback(p_hal->dec_cb, DEC_PARSER_CALLBACK, &pic_param->counts); mpp_callback(p_hal->dec_cb, DEC_PARSER_CALLBACK, &pic_param->counts);
} }
#endif
if (p_hal->fast_mode) { if (p_hal->fast_mode) {
hw_ctx->g_buf[task->dec.reg_index].use_flag = 0; hw_ctx->g_buf[task->dec.reg_index].use_flag = 0;
} }