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[mpp_buf_slot]: fbc stride default 64 align
Signed-off-by: dawnming.huang <dawnming.huang@rock-chips.com> Change-Id: Ic22d6cf377c337d707eebe3cea79a510788fbf5b
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@@ -287,6 +287,14 @@ static void generate_info_set(MppBufSlotsImpl *impl, MppFrame frame, RK_U32 forc
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(impl->hal_ver_align(height));
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(impl->hal_ver_align(height));
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RK_U32 hor_stride_pixel;
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RK_U32 hor_stride_pixel;
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hal_hor_stride = (force_default_align && codec_hor_stride) ? codec_hor_stride : hal_hor_stride;
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hal_ver_stride = (force_default_align && codec_ver_stride) ? codec_ver_stride : hal_ver_stride;
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if (MPP_FRAME_FMT_IS_FBC(fmt)) {
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/*fbc stride default 64 align*/
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hal_hor_stride = MPP_ALIGN(width, 64) * depth >> 3;
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}
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switch (fmt & MPP_FRAME_FMT_MASK) {
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switch (fmt & MPP_FRAME_FMT_MASK) {
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case MPP_FMT_YUV420SP_10BIT: {
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case MPP_FMT_YUV420SP_10BIT: {
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hor_stride_pixel = hal_hor_stride * 8 / 10;
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hor_stride_pixel = hal_hor_stride * 8 / 10;
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@@ -306,12 +314,10 @@ static void generate_info_set(MppBufSlotsImpl *impl, MppFrame frame, RK_U32 forc
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} break;
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} break;
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}
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}
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hal_hor_stride = (force_default_align && codec_hor_stride) ? codec_hor_stride : hal_hor_stride;
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hal_ver_stride = (force_default_align && codec_ver_stride) ? codec_ver_stride : hal_ver_stride;
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RK_S32 size = hal_hor_stride * hal_ver_stride;
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RK_S32 size = hal_hor_stride * hal_ver_stride;
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if (MPP_FRAME_FMT_IS_FBC(fmt)) {
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if (MPP_FRAME_FMT_IS_FBC(fmt)) {
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hor_stride_pixel = MPP_ALIGN(hor_stride_pixel, 64);
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switch ((fmt & MPP_FRAME_FMT_MASK)) {
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switch ((fmt & MPP_FRAME_FMT_MASK)) {
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case MPP_FMT_YUV420SP_10BIT : {
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case MPP_FMT_YUV420SP_10BIT : {
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size = get_afbc_min_size(hor_stride_pixel, hal_ver_stride, 15);
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size = get_afbc_min_size(hor_stride_pixel, hal_ver_stride, 15);
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