From 9eb347a5aecfade4b4d1689a0330a3b875de91d6 Mon Sep 17 00:00:00 2001 From: "sayon.chen" Date: Thu, 17 Jun 2021 18:02:53 +0800 Subject: [PATCH] [h264d]: Support hw resolution capability check Add hw capability to parser and check resolustion based on hardware capability. Change-Id: Id9b719b238c74d6b77f78fd8d583a3de854a94f4 Signed-off-by: sayon.chen --- mpp/codec/dec/h264/h264d_api.c | 1 + mpp/codec/dec/h264/h264d_global.h | 3 ++- mpp/codec/dec/h264/h264d_slice.c | 34 +++++++++++++++++++++---- mpp/codec/inc/parser_api.h | 10 +++++--- mpp/codec/mpp_dec.cpp | 1 + mpp/hal/rkdec/h264d/hal_h264d_rkv_reg.c | 16 ++++++++++++ osal/mpp_soc.cpp | 2 +- 7 files changed, 56 insertions(+), 11 deletions(-) diff --git a/mpp/codec/dec/h264/h264d_api.c b/mpp/codec/dec/h264/h264d_api.c index bb185277..bafa4d45 100644 --- a/mpp/codec/dec/h264/h264d_api.c +++ b/mpp/codec/dec/h264/h264d_api.c @@ -336,6 +336,7 @@ MPP_RET h264d_init(void *decoder, ParserCfg *init) p_Dec->p_Vid->p_Dec = p_Dec; p_Dec->p_Vid->p_Inp = p_Dec->p_Inp; p_Dec->p_Vid->p_Cur = p_Dec->p_Cur; + p_Dec->hw_info = init->hw_info; FUN_CHECK(ret = init_input_ctx(p_Dec->p_Inp, init)); FUN_CHECK(ret = init_cur_ctx(p_Dec->p_Cur)); FUN_CHECK(ret = init_vid_ctx(p_Dec->p_Vid)); diff --git a/mpp/codec/dec/h264/h264d_global.h b/mpp/codec/dec/h264/h264d_global.h index a2473fc0..acc45aff 100644 --- a/mpp/codec/dec/h264/h264d_global.h +++ b/mpp/codec/dec/h264/h264d_global.h @@ -1132,7 +1132,8 @@ typedef struct h264_dec_ctx_t { //!< add MppBufSlots frame_slots; //!< corresponding to dpb_mark MppBufSlots packet_slots; - MppDecCfgSet *cfg; + MppDecCfgSet *cfg; + const MppDecHwCap *hw_info; MppFrame curframe; MppPacket task_pkt; diff --git a/mpp/codec/dec/h264/h264d_slice.c b/mpp/codec/dec/h264/h264d_slice.c index 0085f97d..5d56def3 100644 --- a/mpp/codec/dec/h264/h264d_slice.c +++ b/mpp/codec/dec/h264/h264d_slice.c @@ -24,7 +24,19 @@ #include "h264d_sps.h" #include "h264d_pps.h" +#define PIXW_1080P (1920) +#define PIXH_1080P (1088) +#define PIXW_4Kx2K (4096) +#define PIXH_4Kx2K (2304) +#define PIXW_8Kx4K (8192) +#define PIXH_8Kx4K (4320) +#define MAX_MBW_1080P (((PIXW_1080P) / 16) - 1) /* 119 */ +#define MAX_MBH_1080P (((PIXH_1080P) / 16) - 1) /* 67 */ +#define MAX_MBW_4Kx2K (((PIXW_4Kx2K) / 16) - 1) /* 255 */ +#define MAX_MBH_4Kx2K (((PIXH_4Kx2K) / 16) - 1) /* 143 */ +#define MAX_MBW_8Kx4K (((PIXW_8Kx4K) / 16) - 1) /* 511 */ +#define MAX_MBH_8Kx4K (((PIXH_8Kx4K) / 16) - 1) /* 269 */ static MPP_RET ref_pic_list_mvc_modification(H264_SLICE_t *currSlice) { @@ -239,10 +251,12 @@ static void init_slice_parmeters(H264_SLICE_t *currSlice) } } -static MPP_RET check_sps_pps(H264_SPS_t *sps, H264_subSPS_t *subset_sps, H264_PPS_t *pps) +static MPP_RET check_sps_pps(H264_SPS_t *sps, H264_subSPS_t *subset_sps, + H264_PPS_t *pps, const MppDecHwCap *hw_info) { RK_U32 ret = 0; - + RK_S32 max_mb_width = MAX_MBW_1080P; + RK_S32 max_mb_height = MAX_MBH_1080P; ret |= (sps->seq_parameter_set_id > 63); ret |= (sps->separate_colour_plane_flag == 1); ret |= (sps->chroma_format_idc == 3); @@ -253,8 +267,18 @@ static MPP_RET check_sps_pps(H264_SPS_t *sps, H264_subSPS_t *subset_sps, H264_PP ret |= (sps->log2_max_pic_order_cnt_lsb_minus4 > 12); ret |= (sps->num_ref_frames_in_pic_order_cnt_cycle > 255); ret |= (sps->max_num_ref_frames > 16); - ret |= (sps->pic_width_in_mbs_minus1 < 3 || sps->pic_width_in_mbs_minus1 > 255); - ret |= (sps->pic_height_in_map_units_minus1 < 3 || sps->pic_height_in_map_units_minus1 > 143); + + if (hw_info && hw_info->cap_8k) { + max_mb_width = MAX_MBW_8Kx4K; + max_mb_height = MAX_MBH_8Kx4K; + } else if (hw_info && hw_info->cap_4k) { + max_mb_width = MAX_MBW_4Kx2K; + max_mb_height = MAX_MBH_4Kx2K; + } + + ret |= (sps->pic_width_in_mbs_minus1 < 3 || sps->pic_width_in_mbs_minus1 > max_mb_width); + ret |= (sps->pic_height_in_map_units_minus1 < 3 || sps->pic_height_in_map_units_minus1 > max_mb_height); + if (ret) { H264D_ERR("sps has error, sps_id=%d", sps->seq_parameter_set_id); goto __FAILED; @@ -341,7 +365,7 @@ static MPP_RET set_slice_user_parmeters(H264_SLICE_t *currSlice) cur_sps = (cur_sps && cur_sps->Valid) ? cur_sps : NULL; VAL_CHECK(ret, cur_sps != NULL); } - VAL_CHECK(ret, check_sps_pps(cur_sps, cur_subsps, cur_pps) != MPP_NOK); + VAL_CHECK(ret, check_sps_pps(cur_sps, cur_subsps, cur_pps, p_Vid->p_Dec->hw_info) != MPP_NOK); FUN_CHECK(ret = activate_sps(p_Vid, cur_sps, cur_subsps)); FUN_CHECK(ret = activate_pps(p_Vid, cur_pps)); diff --git a/mpp/codec/inc/parser_api.h b/mpp/codec/inc/parser_api.h index 108eab79..e9cd0abf 100644 --- a/mpp/codec/inc/parser_api.h +++ b/mpp/codec/inc/parser_api.h @@ -22,6 +22,7 @@ #include "mpp_buf_slot.h" #include "mpp_dec_cfg.h" #include "hal_task.h" +#include "mpp_soc.h" /* * slots - all decoder need a slots interface to sync its internal dpb management @@ -30,10 +31,11 @@ * the reset wait for extension */ typedef struct DecParserInitCfg_t { - MppCodingType coding; - MppBufSlots frame_slots; - MppBufSlots packet_slots; - MppDecCfgSet *cfg; + MppCodingType coding; + MppBufSlots frame_slots; + MppBufSlots packet_slots; + MppDecCfgSet *cfg; + const MppDecHwCap *hw_info; } ParserCfg; diff --git a/mpp/codec/mpp_dec.cpp b/mpp/codec/mpp_dec.cpp index b1d50d98..bc1dd278 100644 --- a/mpp/codec/mpp_dec.cpp +++ b/mpp/codec/mpp_dec.cpp @@ -1641,6 +1641,7 @@ MPP_RET mpp_dec_init(MppDec *dec, MppDecInitCfg *cfg) frame_slots, packet_slots, &p->cfg, + p->hw_info, }; ret = mpp_parser_init(&parser, &parser_cfg); diff --git a/mpp/hal/rkdec/h264d/hal_h264d_rkv_reg.c b/mpp/hal/rkdec/h264d/hal_h264d_rkv_reg.c index ef2209a4..a8842a27 100644 --- a/mpp/hal/rkdec/h264d/hal_h264d_rkv_reg.c +++ b/mpp/hal/rkdec/h264d/hal_h264d_rkv_reg.c @@ -578,6 +578,22 @@ MPP_RET rkv_h264d_init(void *hal, MppHalCfg *cfg) mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, rkv_ver_align); mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align); + { + // report hw_info to parser + const MppSocInfo *info = mpp_get_soc_info(); + const void *hw_info = NULL; + + for (i = 0; i < MPP_ARRAY_ELEMS(info->dec_caps); i++) { + if (info->dec_caps[i] && info->dec_caps[i]->type == VPU_CLIENT_RKVDEC) { + hw_info = info->dec_caps[i]; + break; + } + } + + mpp_assert(hw_info); + cfg->hw_info = hw_info; + } + (void)cfg; __RETURN: return MPP_OK; diff --git a/osal/mpp_soc.cpp b/osal/mpp_soc.cpp index 20696c7c..bac660f2 100644 --- a/osal/mpp_soc.cpp +++ b/osal/mpp_soc.cpp @@ -233,7 +233,7 @@ static const MppDecHwCap vdpu34x = { .type = VPU_CLIENT_RKVDEC, .cap_fbc = 2, .cap_4k = 1, - .cap_8k = 0, + .cap_8k = 1, .cap_colmv_buf = 1, .cap_hw_h265_rps = 1, .cap_hw_vp9_prob = 1,