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feat[smt_v3]: Add parameters cfg interface

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Change-Id: If7f54c829e7d79843800a0a15fee126d152af2a8
Signed-off-by: timkingh.huang <timkingh.huang@rock-chips.com>
This commit is contained in:
timkingh.huang
2025-05-13 17:58:40 +08:00
committed by Herman Chen
parent 560ac10baf
commit 92ca648b53
6 changed files with 53 additions and 1 deletions
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12
inc/rk_venc_cmd.h
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@@ -1548,6 +1548,7 @@ typedef enum MppEncFineTuneCfgChange_e {
MPP_ENC_TUNE_CFG_CHANGE_SKIP16_WGT = (1 << 20),
MPP_ENC_TUNE_CFG_CHANGE_SKIP32_WGT = (1 << 21),
MPP_ENC_TUNE_CFG_CHANGE_SPEED = (1 << 22),
MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG = (1 << 23),
MPP_ENC_TUNE_CFG_CHANGE_ALL = (0xFFFFFFFF),
} MppEncFineTuneCfgChange;
@@ -1579,6 +1580,17 @@ typedef struct MppEncFineTuneCfg_t {
RK_S32 skip32_wgt; /* weight for skip32, 0 or [3, 8] */
RK_S32 qpmap_en;
RK_S32 speed; /*enc speed [0..3], 0:full mode; 1:fast; 2:faster; 3:fastest */
/* smart v3 only */
RK_S32 bg_delta_qp_i; /* background delta qp for i frame */
RK_S32 bg_delta_qp_p; /* background delta qp for p frame */
RK_S32 fg_delta_qp_i; /* foreground delta qp for i frame */
RK_S32 fg_delta_qp_p; /* foreground delta qp for p frame */
RK_S32 bmap_qpmin_i; /* min qp for i frame in bmap */
RK_S32 bmap_qpmin_p; /* min qp for p frame in bmap */
RK_S32 bmap_qpmax_i; /* max qp for i frame in bmap */
RK_S32 bmap_qpmax_p; /* max qp for p frame in bmap */
RK_S32 reserved[4];
} MppEncFineTuneCfg;

1
inc/rk_venc_rc.h
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@@ -38,6 +38,7 @@ typedef enum MppEncSeMode_e {
MPP_ENC_SE_MODE_BAL, // balance mode
MPP_ENC_SE_MODE_QF, // quality first mode
MPP_ENC_SE_MODE_BF, // bitrate first mode
MPP_ENC_SE_MODE_EXTERNAL, // external se mode
MPP_ENC_SE_MODE_BUTT
} MppEncSeMode;

10
mpp/base/mpp_enc_cfg.c
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@@ -264,7 +264,15 @@ static RK_U32 mpp_enc_cfg_debug = 0;
ENTRY(tune, madp16_th, S32, MPP_ENC_TUNE_CFG_CHANGE_MADP16_TH, tune, madp16_th) \
ENTRY(tune, skip16_wgt, S32, MPP_ENC_TUNE_CFG_CHANGE_SKIP16_WGT, tune, skip16_wgt) \
ENTRY(tune, skip32_wgt, S32, MPP_ENC_TUNE_CFG_CHANGE_SKIP32_WGT, tune, skip32_wgt) \
ENTRY(tune, speed, S32, MPP_ENC_TUNE_CFG_CHANGE_SPEED, tune, speed)
ENTRY(tune, speed, S32, MPP_ENC_TUNE_CFG_CHANGE_SPEED, tune, speed) \
ENTRY(tune, bg_delta_qp_i, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bg_delta_qp_i) \
ENTRY(tune, bg_delta_qp_p, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bg_delta_qp_p) \
ENTRY(tune, fg_delta_qp_i, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, fg_delta_qp_i) \
ENTRY(tune, fg_delta_qp_p, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, fg_delta_qp_p) \
ENTRY(tune, bmap_qpmin_i, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bmap_qpmin_i) \
ENTRY(tune, bmap_qpmin_p, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bmap_qpmin_p) \
ENTRY(tune, bmap_qpmax_i, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bmap_qpmax_i) \
ENTRY(tune, bmap_qpmax_p, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bmap_qpmax_p)
static void mpp_enc_cfg_srv_init()
{

10
mpp/codec/enc/h264/h264e_api_v2.c
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@@ -201,6 +201,16 @@ static void init_h264e_cfg_set(MppEncCfgSet *cfg, MppClientType type)
cfg->tune.atr_str_p = 1;
cfg->tune.anti_flicker_str = 1;
cfg->tune.deblur_str = 3;
/* smart v3 parameters */
cfg->tune.bg_delta_qp_i = -10;
cfg->tune.bg_delta_qp_p = -10;
cfg->tune.fg_delta_qp_i = 3;
cfg->tune.fg_delta_qp_p = 1;
cfg->tune.bmap_qpmin_i = 30;
cfg->tune.bmap_qpmin_p = 30;
cfg->tune.bmap_qpmax_i = 45;
cfg->tune.bmap_qpmax_p = 47;
}
static void h264e_add_syntax(H264eCtx *ctx, H264eSyntaxType type, void *p)

10
mpp/codec/enc/h265/h265e_api.c
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@@ -127,6 +127,16 @@ static MPP_RET h265e_init(void *ctx, EncImplCfg *ctrlCfg)
p->cfg->tune.rc_container = 0;
p->cfg->tune.vmaf_opt = 0;
/* smart v3 parameters */
p->cfg->tune.bg_delta_qp_i = -10;
p->cfg->tune.bg_delta_qp_p = -10;
p->cfg->tune.fg_delta_qp_i = 3;
p->cfg->tune.fg_delta_qp_p = 1;
p->cfg->tune.bmap_qpmin_i = 30;
p->cfg->tune.bmap_qpmin_p = 30;
p->cfg->tune.bmap_qpmax_i = 45;
p->cfg->tune.bmap_qpmax_p = 47;
/*
* default prep:
* 720p

11
mpp/codec/mpp_enc_impl.cpp
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@@ -973,6 +973,17 @@ MPP_RET mpp_enc_proc_tune_cfg(MppEncFineTuneCfg *dst, MppEncFineTuneCfg *src)
ret = MPP_ERR_VALUE;
}
if (change & MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG) {
dst->bg_delta_qp_i = src->bg_delta_qp_i;
dst->bg_delta_qp_p = src->bg_delta_qp_p;
dst->fg_delta_qp_i = src->fg_delta_qp_i;
dst->fg_delta_qp_p = src->fg_delta_qp_p;
dst->bmap_qpmin_i = src->bmap_qpmin_i;
dst->bmap_qpmin_p = src->bmap_qpmin_p;
dst->bmap_qpmax_i = src->bmap_qpmax_i;
dst->bmap_qpmax_p = src->bmap_qpmax_p;
}
dst->change |= change;
if (ret) {